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bsp/qoriq: Fix MMU initialization for e6500

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In case a hypervisor mode is present, then we must set MAS8 for some TLB
operations, otherwise the run-time behaviour is unpredictable.
This commit is contained in:
Sebastian Huber
2016-04-14 07:57:38 +02:00
parent 33a1a4dbdf
commit a12724f934
2 changed files with 15 additions and 2 deletions
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4
c/src/lib/libbsp/powerpc/qoriq/configure.ac
View File

@@ -164,6 +164,10 @@ RTEMS_BSPOPTS_SET([QORIQ_MMU_DEVICE_MAS7],[qoriq_t*],[0xf])
RTEMS_BSPOPTS_SET([QORIQ_MMU_DEVICE_MAS7],[*],[0x0])
RTEMS_BSPOPTS_HELP([QORIQ_MMU_DEVICE_MAS7],[MAS7 value for device TLB1 entries])
RTEMS_BSPOPTS_SET([QORIQ_HAS_HYPERVISOR_MODE],[qoriq_t*],[1])
RTEMS_BSPOPTS_SET([QORIQ_HAS_HYPERVISOR_MODE],[*],[])
RTEMS_BSPOPTS_HELP([QORIQ_HAS_HYPERVISOR_MODE],[defined if the processor core has a hypervisor mode])
RTEMS_BSPOPTS_SET([QORIQ_L2CSR0],[qoriq_t*],[0xfec20000])
RTEMS_BSPOPTS_SET([QORIQ_L2CSR0],[*],[])
RTEMS_BSPOPTS_HELP([QORIQ_L2CSR0],[address of L2CSR0 register])

13
c/src/lib/libbsp/powerpc/qoriq/startup/mmu-tlb1.S
View File

@@ -7,10 +7,10 @@
*/
/*
* Copyright (c) 2011 embedded brains GmbH. All rights reserved.
* Copyright (c) 2011, 2016 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Obere Lagerstr. 30
* Dornierstr. 4
* 82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
@@ -20,6 +20,8 @@
* http://www.rtems.org/license/LICENSE.
*/
#include <bspopts.h>
#include <libcpu/powerpc-utility.h>
.global qoriq_tlb1_write
@@ -42,6 +44,10 @@ qoriq_tlb1_write:
or r6, r8, r6
mtspr FSL_EIS_MAS3, r6
mtspr FSL_EIS_MAS7, r7
#ifdef QORIQ_HAS_HYPERVISOR_MODE
li r0, 0
mtspr FSL_EIS_MAS8, r0
#endif
tlbwe
sync
isync
@@ -56,6 +62,9 @@ qoriq_tlb1_invalidate:
mtspr FSL_EIS_MAS2, r0
mtspr FSL_EIS_MAS3, r0
mtspr FSL_EIS_MAS7, r0
#ifdef QORIQ_HAS_HYPERVISOR_MODE
mtspr FSL_EIS_MAS8, r0
#endif
tlbwe
sync
isync