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arm: Change CPU_Exception_frame

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Provide proper CPU_Exception_frame definition for ARMv4 and use it.
Remove arm_cpu_context.
This commit is contained in:
Sebastian Huber
2013-01-04 14:09:19 +01:00
parent 010c09ac19
commit 8d68773761
4 changed files with 27 additions and 33 deletions
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18
cpukit/score/cpu/arm/arm_exc_abort.S
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@@ -77,8 +77,9 @@ _ARMV4_Exception_prefetch_abort_set_handler:
_ARMV4_Exception_prefetch_abort:
/* Save context and load handler */
sub sp, #16
sub sp, #20
stmdb sp!, {r0-r12}
mov r4, #3
ldr r6, =prefetch_abort_handler
b save_more_context
@@ -86,8 +87,9 @@ _ARMV4_Exception_prefetch_abort:
_ARMV4_Exception_data_abort:
/* Save context and load handler */
sub sp, #16
sub sp, #20
stmdb sp!, {r0-r12}
mov r4, #4
ldr r6, =data_abort_handler
save_more_context:
@@ -95,15 +97,15 @@ save_more_context:
/* Save more context */
mov r2, lr
mrs r3, spsr
mrs r4, cpsr
mrs r7, cpsr
orr r5, r3, #ARM_PSR_I
bic r5, #ARM_PSR_T
msr cpsr, r5
mov r0, sp
mov r1, lr
msr cpsr, r4
add r5, sp, #68
stmdb r5!, {r0-r3}
msr cpsr, r7
add r5, sp, #72
stmdb r5!, {r0-r4}
/* Call high level handler */
ldr r2, [r6]
@@ -121,11 +123,11 @@ save_more_context:
#endif /* __thumb__ */
/* Restore context */
ldmia r5!, {r0-r3}
ldmia r5!, {r0-r4}
mov lr, r2
msr spsr, r3
ldmia sp!, {r0-r12}
add sp, #16
add sp, #20
/* Return from interrupt */
subs pc, lr, #8

2
cpukit/score/cpu/arm/arm_exc_handler_high.c
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@@ -42,7 +42,7 @@ static void _defaultExcHandler (CPU_Exception_frame *ctx)
printk("----------------------------------------------------------\n\r");
#if 1
printk("Exception 0x%x caught at PC 0x%x by thread %d\n",
ctx->register_ip, ctx->register_lr - 4,
ctx->vector, ctx->register_lr - 4,
_Thread_Executing->Object.id);
#endif
printk("----------------------------------------------------------\n\r");

2
cpukit/score/cpu/arm/rtems/score/armv4.h
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@@ -27,7 +27,7 @@ void bsp_interrupt_dispatch( void );
void _ARMV4_Exception_interrupt( void );
typedef void ARMV4_Exception_abort_handler( arm_cpu_context *context );
typedef void ARMV4_Exception_abort_handler( CPU_Exception_frame *frame );
void _ARMV4_Exception_data_abort_set_handler(
ARMV4_Exception_abort_handler handler

38
cpukit/score/cpu/arm/rtems/score/cpu.h
View File

@@ -490,26 +490,6 @@ static inline uint16_t CPU_swap_u16( uint16_t value )
* @{
*/
typedef struct {
uint32_t r0;
uint32_t r1;
uint32_t r2;
uint32_t r3;
uint32_t r4;
uint32_t r5;
uint32_t r6;
uint32_t r7;
uint32_t r8;
uint32_t r9;
uint32_t r10;
uint32_t r11;
uint32_t r12;
uint32_t sp;
uint32_t lr;
uint32_t pc;
uint32_t cpsr;
} arm_cpu_context;
typedef enum {
ARM_EXCEPTION_RESET = 0,
ARM_EXCEPTION_UNDEF = 1,
@@ -519,7 +499,8 @@ typedef enum {
ARM_EXCEPTION_RESERVED = 5,
ARM_EXCEPTION_IRQ = 6,
ARM_EXCEPTION_FIQ = 7,
MAX_EXCEPTIONS = 8
MAX_EXCEPTIONS = 8,
ARM_EXCEPTION_MAKE_ENUM_32_BIT = 0xffffffff
} Arm_symbolic_exception_name;
static inline uint32_t arm_status_irq_enable( void )
@@ -558,14 +539,25 @@ static inline void arm_status_restore( uint32_t psr )
/** @} */
/* XXX This is out of date */
typedef struct {
uint32_t register_r0;
uint32_t register_r1;
uint32_t register_r2;
uint32_t register_r3;
uint32_t register_ip;
uint32_t register_r4;
uint32_t register_r5;
uint32_t register_r6;
uint32_t register_r7;
uint32_t register_r8;
uint32_t register_r9;
uint32_t register_r10;
uint32_t register_r11;
uint32_t register_r12;
uint32_t register_sp;
uint32_t register_lr;
uint32_t register_pc;
uint32_t register_cpsr;
Arm_symbolic_exception_name vector;
} CPU_Exception_frame;
typedef CPU_Exception_frame CPU_Interrupt_frame;