forked from Imagelibrary/rtems
rtems: Simplify rtems_signal_catch()
In uniprocessor configurations, we can simplify rtems_signal_catch(). Add a validation test for the SMP special case.
This commit is contained in:
@@ -58,17 +58,35 @@ rtems_status_code rtems_signal_catch(
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asr->handler = asr_handler;
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asr->mode_set = mode_set;
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#if defined(RTEMS_SMP)
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if ( asr_handler == NULL ) {
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Chain_Node *node;
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asr->signals_pending = 0;
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/*
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* In SMP configurations, signals may be sent on other processors
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* (interrupts or threads) in parallel. This will cause an inter-processor
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* interrupt which may be blocked by the above interrupt disable.
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*/
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node = &api->Signal_action.Node;
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_Assert( asr->signals_pending == 0 || !_Chain_Is_node_off_chain( node ) );
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_Assert( asr->signals_pending != 0 || _Chain_Is_node_off_chain( node ) );
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if ( !_Chain_Is_node_off_chain( node ) ) {
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asr->signals_pending = 0;
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_Chain_Extract_unprotected( node );
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_Chain_Set_off_chain( node );
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}
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}
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#else
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/*
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* In uniprocessor configurations, as soon as interrupts are disabled above
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* nobody can send signals to the executing thread. So, pending signals at
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* this point cannot appear.
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*/
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_Assert( asr->signals_pending == 0 );
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_Assert( _Chain_Is_node_off_chain( &api->Signal_action.Node ) );
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#endif
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_Thread_State_release( executing, &lock_context );
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return RTEMS_SUCCESSFUL;
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@@ -53,6 +53,8 @@
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#endif
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#include <rtems.h>
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#include <string.h>
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#include <rtems/score/smpbarrier.h>
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#include <rtems/test.h>
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@@ -65,6 +67,12 @@
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* @{
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*/
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typedef enum {
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RtemsSignalReqCatch_Pre_Pending_Yes,
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RtemsSignalReqCatch_Pre_Pending_No,
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RtemsSignalReqCatch_Pre_Pending_NA
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} RtemsSignalReqCatch_Pre_Pending;
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typedef enum {
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RtemsSignalReqCatch_Pre_Handler_Invalid,
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RtemsSignalReqCatch_Pre_Handler_Valid,
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@@ -136,6 +144,16 @@ typedef enum {
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* @brief Test context for spec:/rtems/signal/req/catch test case.
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*/
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typedef struct {
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rtems_id runner_id;
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rtems_id worker_id;
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uint32_t pending_signals;
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SMP_barrier_Control barrier;
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SMP_barrier_State runner_barrier_state;
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uint32_t default_handler_calls;
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uint32_t handler_calls;
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@@ -155,7 +173,7 @@ typedef struct {
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/**
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* @brief This member defines the pre-condition states for the next action.
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*/
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size_t pcs[ 5 ];
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size_t pcs[ 6 ];
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/**
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* @brief This member indicates if the test action loop is currently
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@@ -167,6 +185,12 @@ typedef struct {
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static RtemsSignalReqCatch_Context
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RtemsSignalReqCatch_Instance;
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static const char * const RtemsSignalReqCatch_PreDesc_Pending[] = {
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"Yes",
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"No",
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"NA"
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};
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static const char * const RtemsSignalReqCatch_PreDesc_Handler[] = {
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"Invalid",
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"Valid",
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@@ -198,6 +222,7 @@ static const char * const RtemsSignalReqCatch_PreDesc_IntLvl[] = {
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};
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static const char * const * const RtemsSignalReqCatch_PreDesc[] = {
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RtemsSignalReqCatch_PreDesc_Pending,
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RtemsSignalReqCatch_PreDesc_Handler,
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RtemsSignalReqCatch_PreDesc_Preempt,
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RtemsSignalReqCatch_PreDesc_Timeslice,
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@@ -215,7 +240,11 @@ static void DefaultHandler( rtems_signal_set signal_set )
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ctx = T_fixture_context();
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++ctx->default_handler_calls;
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T_eq_u32( signal_set, 0xdeadbeef );
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if ( ctx->pending_signals != 0 && ctx->default_handler_calls == 1 ) {
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T_eq_u32( signal_set, 0x600df00d );
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} else {
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T_eq_u32( signal_set, 0xdeadbeef );
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}
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}
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static void SignalHandler( rtems_signal_set signal_set )
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@@ -233,7 +262,11 @@ static void SignalHandler( rtems_signal_set signal_set )
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);
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T_rsc_success( sc );
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T_eq_u32( signal_set, 0xdeadbeef );
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if ( ctx->pending_signals != 0 && ctx->handler_calls == 1 ) {
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T_eq_u32( signal_set, 0x600df00d );
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} else {
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T_eq_u32( signal_set, 0xdeadbeef );
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}
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}
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static void CheckHandlerMode( Context *ctx, rtems_mode mask, rtems_mode mode )
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@@ -244,6 +277,56 @@ static void CheckHandlerMode( Context *ctx, rtems_mode mask, rtems_mode mode )
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}
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}
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static void Worker( rtems_task_argument arg )
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{
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Context *ctx;
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SMP_barrier_State barrier_state;
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ctx = (Context *) arg;
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_SMP_barrier_State_initialize( &barrier_state );
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while ( true ) {
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rtems_status_code sc;
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_SMP_barrier_Wait( &ctx->barrier, &barrier_state, 2 );
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sc = rtems_signal_send( ctx->runner_id, 0x600df00d );
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T_rsc_success( sc );
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_SMP_barrier_Wait( &ctx->barrier, &barrier_state, 2 );
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}
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}
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static void RtemsSignalReqCatch_Pre_Pending_Prepare(
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RtemsSignalReqCatch_Context *ctx,
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RtemsSignalReqCatch_Pre_Pending state
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)
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{
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switch ( state ) {
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case RtemsSignalReqCatch_Pre_Pending_Yes: {
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/*
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* Where the system has more than one processor, when
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* rtems_signal_catch() is called, the calling task shall have pending
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* signals.
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*/
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ctx->pending_signals = ( rtems_scheduler_get_processor_maximum() > 1 ) ? 1 : 0;
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break;
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}
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case RtemsSignalReqCatch_Pre_Pending_No: {
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/*
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* When rtems_signal_catch() is called, the calling task shall have no
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* pending signals.
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*/
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ctx->pending_signals = 0;
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break;
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}
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case RtemsSignalReqCatch_Pre_Pending_NA:
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break;
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}
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}
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static void RtemsSignalReqCatch_Pre_Handler_Prepare(
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RtemsSignalReqCatch_Context *ctx,
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RtemsSignalReqCatch_Pre_Handler state
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@@ -466,10 +549,10 @@ static void RtemsSignalReqCatch_Post_Send_Check(
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if ( ctx->catch_status == RTEMS_SUCCESSFUL ) {
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T_eq_u32( ctx->default_handler_calls, 0 );
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T_eq_u32( ctx->handler_calls, 1 );
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T_eq_u32( ctx->handler_calls, 1 + ctx->pending_signals );
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T_ne_u32( ctx->handler_mode, 0xffffffff );
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} else {
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T_eq_u32( ctx->default_handler_calls, 1 );
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T_eq_u32( ctx->default_handler_calls, 1 + ctx->pending_signals );
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T_eq_u32( ctx->handler_calls, 0 );
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T_eq_u32( ctx->handler_mode, 0xffffffff );
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}
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@@ -490,7 +573,7 @@ static void RtemsSignalReqCatch_Post_Send_Check(
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T_eq_u32( ctx->handler_mode, 0xffffffff );
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} else {
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T_rsc_success( ctx->send_status );
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T_eq_u32( ctx->default_handler_calls, 1 );
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T_eq_u32( ctx->default_handler_calls, 1 + ctx->pending_signals );
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T_eq_u32( ctx->handler_calls, 0 );
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T_eq_u32( ctx->handler_mode, 0xffffffff );
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}
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@@ -627,10 +710,60 @@ static void RtemsSignalReqCatch_Post_IntLvl_Check(
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}
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}
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static void RtemsSignalReqCatch_Setup( RtemsSignalReqCatch_Context *ctx )
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{
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memset( ctx, 0, sizeof( *ctx ) );
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ctx->runner_id = rtems_task_self();
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_SMP_barrier_Control_initialize( &ctx->barrier );
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_SMP_barrier_State_initialize( &ctx->runner_barrier_state );
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if ( rtems_scheduler_get_processor_maximum() > 1 ) {
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rtems_status_code sc;
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rtems_id scheduler_id;
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sc = rtems_task_create(
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rtems_build_name( 'W', 'O', 'R', 'K' ),
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1,
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RTEMS_MINIMUM_STACK_SIZE,
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RTEMS_DEFAULT_MODES,
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RTEMS_DEFAULT_ATTRIBUTES,
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&ctx->worker_id
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);
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T_assert_rsc_success( sc );
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sc = rtems_scheduler_ident_by_processor( 1, &scheduler_id );
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T_assert_rsc_success( sc );
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sc = rtems_task_set_scheduler( ctx->worker_id, scheduler_id, 1 );
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T_assert_rsc_success( sc );
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sc = rtems_task_start(
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ctx->worker_id,
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Worker,
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(rtems_task_argument) ctx
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);
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T_assert_rsc_success( sc );
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}
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}
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static void RtemsSignalReqCatch_Setup_Wrap( void *arg )
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{
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RtemsSignalReqCatch_Context *ctx;
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ctx = arg;
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ctx->in_action_loop = false;
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RtemsSignalReqCatch_Setup( ctx );
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}
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static void RtemsSignalReqCatch_Teardown( RtemsSignalReqCatch_Context *ctx )
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{
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rtems_status_code sc;
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if ( ctx->worker_id != 0 ) {
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sc = rtems_task_delete( ctx->worker_id );
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T_rsc_success( sc );
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}
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sc = rtems_signal_catch( NULL, RTEMS_DEFAULT_MODES );
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T_rsc_success( sc );
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}
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@@ -658,7 +791,7 @@ static size_t RtemsSignalReqCatch_Scope( void *arg, char *buf, size_t n )
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}
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static T_fixture RtemsSignalReqCatch_Fixture = {
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.setup = NULL,
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.setup = RtemsSignalReqCatch_Setup_Wrap,
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.stop = NULL,
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.teardown = RtemsSignalReqCatch_Teardown_Wrap,
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.scope = RtemsSignalReqCatch_Scope,
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@@ -890,11 +1023,236 @@ static const uint8_t RtemsSignalReqCatch_TransitionMap[][ 6 ] = {
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RtemsSignalReqCatch_Post_Timeslice_No,
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RtemsSignalReqCatch_Post_ASR_No,
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RtemsSignalReqCatch_Post_IntLvl_Positive
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}, {
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RtemsSignalReqCatch_Post_Status_Ok,
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RtemsSignalReqCatch_Post_Send_NotDef,
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RtemsSignalReqCatch_Post_Preempt_Yes,
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RtemsSignalReqCatch_Post_Timeslice_Yes,
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RtemsSignalReqCatch_Post_ASR_Yes,
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RtemsSignalReqCatch_Post_IntLvl_Zero
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}, {
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RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
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RtemsSignalReqCatch_Post_Send_NotDef,
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RtemsSignalReqCatch_Post_Preempt_Yes,
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RtemsSignalReqCatch_Post_Timeslice_Yes,
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RtemsSignalReqCatch_Post_ASR_Yes,
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RtemsSignalReqCatch_Post_IntLvl_Positive
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}, {
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RtemsSignalReqCatch_Post_Status_Ok,
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RtemsSignalReqCatch_Post_Send_NotDef,
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RtemsSignalReqCatch_Post_Preempt_Yes,
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RtemsSignalReqCatch_Post_Timeslice_Yes,
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RtemsSignalReqCatch_Post_ASR_No,
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RtemsSignalReqCatch_Post_IntLvl_Zero
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}, {
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RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
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RtemsSignalReqCatch_Post_Send_NotDef,
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RtemsSignalReqCatch_Post_Preempt_Yes,
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RtemsSignalReqCatch_Post_Timeslice_Yes,
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RtemsSignalReqCatch_Post_ASR_No,
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RtemsSignalReqCatch_Post_IntLvl_Positive
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}, {
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RtemsSignalReqCatch_Post_Status_Ok,
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RtemsSignalReqCatch_Post_Send_NotDef,
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RtemsSignalReqCatch_Post_Preempt_Yes,
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RtemsSignalReqCatch_Post_Timeslice_No,
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RtemsSignalReqCatch_Post_ASR_Yes,
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RtemsSignalReqCatch_Post_IntLvl_Zero
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}, {
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RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
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RtemsSignalReqCatch_Post_Send_NotDef,
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RtemsSignalReqCatch_Post_Preempt_Yes,
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RtemsSignalReqCatch_Post_Timeslice_No,
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RtemsSignalReqCatch_Post_ASR_Yes,
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RtemsSignalReqCatch_Post_IntLvl_Positive
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}, {
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RtemsSignalReqCatch_Post_Status_Ok,
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RtemsSignalReqCatch_Post_Send_NotDef,
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RtemsSignalReqCatch_Post_Preempt_Yes,
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RtemsSignalReqCatch_Post_Timeslice_No,
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RtemsSignalReqCatch_Post_ASR_No,
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RtemsSignalReqCatch_Post_IntLvl_Zero
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}, {
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RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
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RtemsSignalReqCatch_Post_Send_NotDef,
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RtemsSignalReqCatch_Post_Preempt_Yes,
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RtemsSignalReqCatch_Post_Timeslice_No,
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RtemsSignalReqCatch_Post_ASR_No,
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RtemsSignalReqCatch_Post_IntLvl_Positive
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}, {
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RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
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RtemsSignalReqCatch_Post_Send_NotDef,
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RtemsSignalReqCatch_Post_Preempt_No,
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RtemsSignalReqCatch_Post_Timeslice_Yes,
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RtemsSignalReqCatch_Post_ASR_Yes,
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RtemsSignalReqCatch_Post_IntLvl_Zero
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}, {
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RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
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RtemsSignalReqCatch_Post_Send_NotDef,
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RtemsSignalReqCatch_Post_Preempt_No,
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RtemsSignalReqCatch_Post_Timeslice_Yes,
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RtemsSignalReqCatch_Post_ASR_Yes,
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RtemsSignalReqCatch_Post_IntLvl_Positive
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}, {
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RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
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RtemsSignalReqCatch_Post_Send_NotDef,
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RtemsSignalReqCatch_Post_Preempt_No,
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RtemsSignalReqCatch_Post_Timeslice_Yes,
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RtemsSignalReqCatch_Post_ASR_No,
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RtemsSignalReqCatch_Post_IntLvl_Zero
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}, {
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RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
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RtemsSignalReqCatch_Post_Send_NotDef,
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RtemsSignalReqCatch_Post_Preempt_No,
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RtemsSignalReqCatch_Post_Timeslice_Yes,
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RtemsSignalReqCatch_Post_ASR_No,
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RtemsSignalReqCatch_Post_IntLvl_Positive
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}, {
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RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
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RtemsSignalReqCatch_Post_Send_NotDef,
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RtemsSignalReqCatch_Post_Preempt_No,
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RtemsSignalReqCatch_Post_Timeslice_No,
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RtemsSignalReqCatch_Post_ASR_Yes,
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RtemsSignalReqCatch_Post_IntLvl_Zero
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}, {
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RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
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RtemsSignalReqCatch_Post_Send_NotDef,
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RtemsSignalReqCatch_Post_Preempt_No,
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RtemsSignalReqCatch_Post_Timeslice_No,
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RtemsSignalReqCatch_Post_ASR_Yes,
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RtemsSignalReqCatch_Post_IntLvl_Positive
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}, {
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RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
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RtemsSignalReqCatch_Post_Send_NotDef,
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RtemsSignalReqCatch_Post_Preempt_No,
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RtemsSignalReqCatch_Post_Timeslice_No,
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RtemsSignalReqCatch_Post_ASR_No,
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RtemsSignalReqCatch_Post_IntLvl_Zero
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}, {
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RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
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RtemsSignalReqCatch_Post_Send_NotDef,
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RtemsSignalReqCatch_Post_Preempt_No,
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RtemsSignalReqCatch_Post_Timeslice_No,
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RtemsSignalReqCatch_Post_ASR_No,
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RtemsSignalReqCatch_Post_IntLvl_Positive
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}, {
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RtemsSignalReqCatch_Post_Status_Ok,
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RtemsSignalReqCatch_Post_Send_New,
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RtemsSignalReqCatch_Post_Preempt_Yes,
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RtemsSignalReqCatch_Post_Timeslice_Yes,
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RtemsSignalReqCatch_Post_ASR_Yes,
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RtemsSignalReqCatch_Post_IntLvl_Zero
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}, {
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RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
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RtemsSignalReqCatch_Post_Send_New,
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RtemsSignalReqCatch_Post_Preempt_Yes,
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RtemsSignalReqCatch_Post_Timeslice_Yes,
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RtemsSignalReqCatch_Post_ASR_Yes,
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RtemsSignalReqCatch_Post_IntLvl_Positive
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}, {
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RtemsSignalReqCatch_Post_Status_Ok,
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RtemsSignalReqCatch_Post_Send_New,
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RtemsSignalReqCatch_Post_Preempt_Yes,
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RtemsSignalReqCatch_Post_Timeslice_Yes,
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RtemsSignalReqCatch_Post_ASR_No,
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RtemsSignalReqCatch_Post_IntLvl_Zero
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}, {
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RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
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RtemsSignalReqCatch_Post_Send_New,
|
||||
RtemsSignalReqCatch_Post_Preempt_Yes,
|
||||
RtemsSignalReqCatch_Post_Timeslice_Yes,
|
||||
RtemsSignalReqCatch_Post_ASR_No,
|
||||
RtemsSignalReqCatch_Post_IntLvl_Positive
|
||||
}, {
|
||||
RtemsSignalReqCatch_Post_Status_Ok,
|
||||
RtemsSignalReqCatch_Post_Send_New,
|
||||
RtemsSignalReqCatch_Post_Preempt_Yes,
|
||||
RtemsSignalReqCatch_Post_Timeslice_No,
|
||||
RtemsSignalReqCatch_Post_ASR_Yes,
|
||||
RtemsSignalReqCatch_Post_IntLvl_Zero
|
||||
}, {
|
||||
RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
|
||||
RtemsSignalReqCatch_Post_Send_New,
|
||||
RtemsSignalReqCatch_Post_Preempt_Yes,
|
||||
RtemsSignalReqCatch_Post_Timeslice_No,
|
||||
RtemsSignalReqCatch_Post_ASR_Yes,
|
||||
RtemsSignalReqCatch_Post_IntLvl_Positive
|
||||
}, {
|
||||
RtemsSignalReqCatch_Post_Status_Ok,
|
||||
RtemsSignalReqCatch_Post_Send_New,
|
||||
RtemsSignalReqCatch_Post_Preempt_Yes,
|
||||
RtemsSignalReqCatch_Post_Timeslice_No,
|
||||
RtemsSignalReqCatch_Post_ASR_No,
|
||||
RtemsSignalReqCatch_Post_IntLvl_Zero
|
||||
}, {
|
||||
RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
|
||||
RtemsSignalReqCatch_Post_Send_New,
|
||||
RtemsSignalReqCatch_Post_Preempt_Yes,
|
||||
RtemsSignalReqCatch_Post_Timeslice_No,
|
||||
RtemsSignalReqCatch_Post_ASR_No,
|
||||
RtemsSignalReqCatch_Post_IntLvl_Positive
|
||||
}, {
|
||||
RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
|
||||
RtemsSignalReqCatch_Post_Send_New,
|
||||
RtemsSignalReqCatch_Post_Preempt_No,
|
||||
RtemsSignalReqCatch_Post_Timeslice_Yes,
|
||||
RtemsSignalReqCatch_Post_ASR_Yes,
|
||||
RtemsSignalReqCatch_Post_IntLvl_Zero
|
||||
}, {
|
||||
RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
|
||||
RtemsSignalReqCatch_Post_Send_New,
|
||||
RtemsSignalReqCatch_Post_Preempt_No,
|
||||
RtemsSignalReqCatch_Post_Timeslice_Yes,
|
||||
RtemsSignalReqCatch_Post_ASR_Yes,
|
||||
RtemsSignalReqCatch_Post_IntLvl_Positive
|
||||
}, {
|
||||
RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
|
||||
RtemsSignalReqCatch_Post_Send_New,
|
||||
RtemsSignalReqCatch_Post_Preempt_No,
|
||||
RtemsSignalReqCatch_Post_Timeslice_Yes,
|
||||
RtemsSignalReqCatch_Post_ASR_No,
|
||||
RtemsSignalReqCatch_Post_IntLvl_Zero
|
||||
}, {
|
||||
RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
|
||||
RtemsSignalReqCatch_Post_Send_New,
|
||||
RtemsSignalReqCatch_Post_Preempt_No,
|
||||
RtemsSignalReqCatch_Post_Timeslice_Yes,
|
||||
RtemsSignalReqCatch_Post_ASR_No,
|
||||
RtemsSignalReqCatch_Post_IntLvl_Positive
|
||||
}, {
|
||||
RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
|
||||
RtemsSignalReqCatch_Post_Send_New,
|
||||
RtemsSignalReqCatch_Post_Preempt_No,
|
||||
RtemsSignalReqCatch_Post_Timeslice_No,
|
||||
RtemsSignalReqCatch_Post_ASR_Yes,
|
||||
RtemsSignalReqCatch_Post_IntLvl_Zero
|
||||
}, {
|
||||
RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
|
||||
RtemsSignalReqCatch_Post_Send_New,
|
||||
RtemsSignalReqCatch_Post_Preempt_No,
|
||||
RtemsSignalReqCatch_Post_Timeslice_No,
|
||||
RtemsSignalReqCatch_Post_ASR_Yes,
|
||||
RtemsSignalReqCatch_Post_IntLvl_Positive
|
||||
}, {
|
||||
RtemsSignalReqCatch_Post_Status_NotImplNoPreempt,
|
||||
RtemsSignalReqCatch_Post_Send_New,
|
||||
RtemsSignalReqCatch_Post_Preempt_No,
|
||||
RtemsSignalReqCatch_Post_Timeslice_No,
|
||||
RtemsSignalReqCatch_Post_ASR_No,
|
||||
RtemsSignalReqCatch_Post_IntLvl_Zero
|
||||
}, {
|
||||
RtemsSignalReqCatch_Post_Status_NotImplIntLvl,
|
||||
RtemsSignalReqCatch_Post_Send_New,
|
||||
RtemsSignalReqCatch_Post_Preempt_No,
|
||||
RtemsSignalReqCatch_Post_Timeslice_No,
|
||||
RtemsSignalReqCatch_Post_ASR_No,
|
||||
RtemsSignalReqCatch_Post_IntLvl_Positive
|
||||
}
|
||||
};
|
||||
|
||||
static const struct {
|
||||
uint8_t Skip : 1;
|
||||
uint8_t Pre_Pending_NA : 1;
|
||||
uint8_t Pre_Handler_NA : 1;
|
||||
uint8_t Pre_Preempt_NA : 1;
|
||||
uint8_t Pre_Timeslice_NA : 1;
|
||||
@@ -902,69 +1260,133 @@ static const struct {
|
||||
uint8_t Pre_IntLvl_NA : 1;
|
||||
} RtemsSignalReqCatch_TransitionInfo[] = {
|
||||
{
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}, {
|
||||
0, 0, 0, 0, 0, 0, 0
|
||||
}
|
||||
};
|
||||
|
||||
@@ -988,7 +1410,17 @@ static void RtemsSignalReqCatch_Action( RtemsSignalReqCatch_Context *ctx )
|
||||
rtems_status_code sc;
|
||||
rtems_mode mode;
|
||||
|
||||
ctx->catch_status = rtems_signal_catch( ctx->handler, ctx->mode );
|
||||
if ( ctx->pending_signals != 0 ) {
|
||||
rtems_interrupt_level level;
|
||||
|
||||
rtems_interrupt_local_disable(level);
|
||||
_SMP_barrier_Wait( &ctx->barrier, &ctx->runner_barrier_state, 2 );
|
||||
_SMP_barrier_Wait( &ctx->barrier, &ctx->runner_barrier_state, 2 );
|
||||
ctx->catch_status = rtems_signal_catch( ctx->handler, ctx->mode );
|
||||
rtems_interrupt_local_enable(level);
|
||||
} else {
|
||||
ctx->catch_status = rtems_signal_catch( ctx->handler, ctx->mode );
|
||||
}
|
||||
|
||||
sc = rtems_task_mode( ctx->normal_mode, RTEMS_ALL_MODE_MASKS, &mode );
|
||||
T_rsc_success( sc );
|
||||
@@ -1012,13 +1444,14 @@ T_TEST_CASE_FIXTURE( RtemsSignalReqCatch, &RtemsSignalReqCatch_Fixture )
|
||||
index = 0;
|
||||
|
||||
for (
|
||||
ctx->pcs[ 0 ] = RtemsSignalReqCatch_Pre_Handler_Invalid;
|
||||
ctx->pcs[ 0 ] < RtemsSignalReqCatch_Pre_Handler_NA;
|
||||
ctx->pcs[ 0 ] = RtemsSignalReqCatch_Pre_Pending_Yes;
|
||||
ctx->pcs[ 0 ] < RtemsSignalReqCatch_Pre_Pending_NA;
|
||||
++ctx->pcs[ 0 ]
|
||||
) {
|
||||
if ( RtemsSignalReqCatch_TransitionInfo[ index ].Pre_Handler_NA ) {
|
||||
ctx->pcs[ 0 ] = RtemsSignalReqCatch_Pre_Handler_NA;
|
||||
index += ( RtemsSignalReqCatch_Pre_Handler_NA - 1 )
|
||||
if ( RtemsSignalReqCatch_TransitionInfo[ index ].Pre_Pending_NA ) {
|
||||
ctx->pcs[ 0 ] = RtemsSignalReqCatch_Pre_Pending_NA;
|
||||
index += ( RtemsSignalReqCatch_Pre_Pending_NA - 1 )
|
||||
* RtemsSignalReqCatch_Pre_Handler_NA
|
||||
* RtemsSignalReqCatch_Pre_Preempt_NA
|
||||
* RtemsSignalReqCatch_Pre_Timeslice_NA
|
||||
* RtemsSignalReqCatch_Pre_ASR_NA
|
||||
@@ -1026,88 +1459,104 @@ T_TEST_CASE_FIXTURE( RtemsSignalReqCatch, &RtemsSignalReqCatch_Fixture )
|
||||
}
|
||||
|
||||
for (
|
||||
ctx->pcs[ 1 ] = RtemsSignalReqCatch_Pre_Preempt_Yes;
|
||||
ctx->pcs[ 1 ] < RtemsSignalReqCatch_Pre_Preempt_NA;
|
||||
ctx->pcs[ 1 ] = RtemsSignalReqCatch_Pre_Handler_Invalid;
|
||||
ctx->pcs[ 1 ] < RtemsSignalReqCatch_Pre_Handler_NA;
|
||||
++ctx->pcs[ 1 ]
|
||||
) {
|
||||
if ( RtemsSignalReqCatch_TransitionInfo[ index ].Pre_Preempt_NA ) {
|
||||
ctx->pcs[ 1 ] = RtemsSignalReqCatch_Pre_Preempt_NA;
|
||||
index += ( RtemsSignalReqCatch_Pre_Preempt_NA - 1 )
|
||||
if ( RtemsSignalReqCatch_TransitionInfo[ index ].Pre_Handler_NA ) {
|
||||
ctx->pcs[ 1 ] = RtemsSignalReqCatch_Pre_Handler_NA;
|
||||
index += ( RtemsSignalReqCatch_Pre_Handler_NA - 1 )
|
||||
* RtemsSignalReqCatch_Pre_Preempt_NA
|
||||
* RtemsSignalReqCatch_Pre_Timeslice_NA
|
||||
* RtemsSignalReqCatch_Pre_ASR_NA
|
||||
* RtemsSignalReqCatch_Pre_IntLvl_NA;
|
||||
}
|
||||
|
||||
for (
|
||||
ctx->pcs[ 2 ] = RtemsSignalReqCatch_Pre_Timeslice_Yes;
|
||||
ctx->pcs[ 2 ] < RtemsSignalReqCatch_Pre_Timeslice_NA;
|
||||
ctx->pcs[ 2 ] = RtemsSignalReqCatch_Pre_Preempt_Yes;
|
||||
ctx->pcs[ 2 ] < RtemsSignalReqCatch_Pre_Preempt_NA;
|
||||
++ctx->pcs[ 2 ]
|
||||
) {
|
||||
if ( RtemsSignalReqCatch_TransitionInfo[ index ].Pre_Timeslice_NA ) {
|
||||
ctx->pcs[ 2 ] = RtemsSignalReqCatch_Pre_Timeslice_NA;
|
||||
index += ( RtemsSignalReqCatch_Pre_Timeslice_NA - 1 )
|
||||
if ( RtemsSignalReqCatch_TransitionInfo[ index ].Pre_Preempt_NA ) {
|
||||
ctx->pcs[ 2 ] = RtemsSignalReqCatch_Pre_Preempt_NA;
|
||||
index += ( RtemsSignalReqCatch_Pre_Preempt_NA - 1 )
|
||||
* RtemsSignalReqCatch_Pre_Timeslice_NA
|
||||
* RtemsSignalReqCatch_Pre_ASR_NA
|
||||
* RtemsSignalReqCatch_Pre_IntLvl_NA;
|
||||
}
|
||||
|
||||
for (
|
||||
ctx->pcs[ 3 ] = RtemsSignalReqCatch_Pre_ASR_Yes;
|
||||
ctx->pcs[ 3 ] < RtemsSignalReqCatch_Pre_ASR_NA;
|
||||
ctx->pcs[ 3 ] = RtemsSignalReqCatch_Pre_Timeslice_Yes;
|
||||
ctx->pcs[ 3 ] < RtemsSignalReqCatch_Pre_Timeslice_NA;
|
||||
++ctx->pcs[ 3 ]
|
||||
) {
|
||||
if ( RtemsSignalReqCatch_TransitionInfo[ index ].Pre_ASR_NA ) {
|
||||
ctx->pcs[ 3 ] = RtemsSignalReqCatch_Pre_ASR_NA;
|
||||
index += ( RtemsSignalReqCatch_Pre_ASR_NA - 1 )
|
||||
if ( RtemsSignalReqCatch_TransitionInfo[ index ].Pre_Timeslice_NA ) {
|
||||
ctx->pcs[ 3 ] = RtemsSignalReqCatch_Pre_Timeslice_NA;
|
||||
index += ( RtemsSignalReqCatch_Pre_Timeslice_NA - 1 )
|
||||
* RtemsSignalReqCatch_Pre_ASR_NA
|
||||
* RtemsSignalReqCatch_Pre_IntLvl_NA;
|
||||
}
|
||||
|
||||
for (
|
||||
ctx->pcs[ 4 ] = RtemsSignalReqCatch_Pre_IntLvl_Zero;
|
||||
ctx->pcs[ 4 ] < RtemsSignalReqCatch_Pre_IntLvl_NA;
|
||||
ctx->pcs[ 4 ] = RtemsSignalReqCatch_Pre_ASR_Yes;
|
||||
ctx->pcs[ 4 ] < RtemsSignalReqCatch_Pre_ASR_NA;
|
||||
++ctx->pcs[ 4 ]
|
||||
) {
|
||||
if ( RtemsSignalReqCatch_TransitionInfo[ index ].Pre_IntLvl_NA ) {
|
||||
ctx->pcs[ 4 ] = RtemsSignalReqCatch_Pre_IntLvl_NA;
|
||||
index += ( RtemsSignalReqCatch_Pre_IntLvl_NA - 1 );
|
||||
if ( RtemsSignalReqCatch_TransitionInfo[ index ].Pre_ASR_NA ) {
|
||||
ctx->pcs[ 4 ] = RtemsSignalReqCatch_Pre_ASR_NA;
|
||||
index += ( RtemsSignalReqCatch_Pre_ASR_NA - 1 )
|
||||
* RtemsSignalReqCatch_Pre_IntLvl_NA;
|
||||
}
|
||||
|
||||
if ( RtemsSignalReqCatch_TransitionInfo[ index ].Skip ) {
|
||||
for (
|
||||
ctx->pcs[ 5 ] = RtemsSignalReqCatch_Pre_IntLvl_Zero;
|
||||
ctx->pcs[ 5 ] < RtemsSignalReqCatch_Pre_IntLvl_NA;
|
||||
++ctx->pcs[ 5 ]
|
||||
) {
|
||||
if ( RtemsSignalReqCatch_TransitionInfo[ index ].Pre_IntLvl_NA ) {
|
||||
ctx->pcs[ 5 ] = RtemsSignalReqCatch_Pre_IntLvl_NA;
|
||||
index += ( RtemsSignalReqCatch_Pre_IntLvl_NA - 1 );
|
||||
}
|
||||
|
||||
if ( RtemsSignalReqCatch_TransitionInfo[ index ].Skip ) {
|
||||
++index;
|
||||
continue;
|
||||
}
|
||||
|
||||
RtemsSignalReqCatch_Prepare( ctx );
|
||||
RtemsSignalReqCatch_Pre_Pending_Prepare( ctx, ctx->pcs[ 0 ] );
|
||||
RtemsSignalReqCatch_Pre_Handler_Prepare( ctx, ctx->pcs[ 1 ] );
|
||||
RtemsSignalReqCatch_Pre_Preempt_Prepare( ctx, ctx->pcs[ 2 ] );
|
||||
RtemsSignalReqCatch_Pre_Timeslice_Prepare( ctx, ctx->pcs[ 3 ] );
|
||||
RtemsSignalReqCatch_Pre_ASR_Prepare( ctx, ctx->pcs[ 4 ] );
|
||||
RtemsSignalReqCatch_Pre_IntLvl_Prepare( ctx, ctx->pcs[ 5 ] );
|
||||
RtemsSignalReqCatch_Action( ctx );
|
||||
RtemsSignalReqCatch_Post_Status_Check(
|
||||
ctx,
|
||||
RtemsSignalReqCatch_TransitionMap[ index ][ 0 ]
|
||||
);
|
||||
RtemsSignalReqCatch_Post_Send_Check(
|
||||
ctx,
|
||||
RtemsSignalReqCatch_TransitionMap[ index ][ 1 ]
|
||||
);
|
||||
RtemsSignalReqCatch_Post_Preempt_Check(
|
||||
ctx,
|
||||
RtemsSignalReqCatch_TransitionMap[ index ][ 2 ]
|
||||
);
|
||||
RtemsSignalReqCatch_Post_Timeslice_Check(
|
||||
ctx,
|
||||
RtemsSignalReqCatch_TransitionMap[ index ][ 3 ]
|
||||
);
|
||||
RtemsSignalReqCatch_Post_ASR_Check(
|
||||
ctx,
|
||||
RtemsSignalReqCatch_TransitionMap[ index ][ 4 ]
|
||||
);
|
||||
RtemsSignalReqCatch_Post_IntLvl_Check(
|
||||
ctx,
|
||||
RtemsSignalReqCatch_TransitionMap[ index ][ 5 ]
|
||||
);
|
||||
++index;
|
||||
continue;
|
||||
}
|
||||
|
||||
RtemsSignalReqCatch_Prepare( ctx );
|
||||
RtemsSignalReqCatch_Pre_Handler_Prepare( ctx, ctx->pcs[ 0 ] );
|
||||
RtemsSignalReqCatch_Pre_Preempt_Prepare( ctx, ctx->pcs[ 1 ] );
|
||||
RtemsSignalReqCatch_Pre_Timeslice_Prepare( ctx, ctx->pcs[ 2 ] );
|
||||
RtemsSignalReqCatch_Pre_ASR_Prepare( ctx, ctx->pcs[ 3 ] );
|
||||
RtemsSignalReqCatch_Pre_IntLvl_Prepare( ctx, ctx->pcs[ 4 ] );
|
||||
RtemsSignalReqCatch_Action( ctx );
|
||||
RtemsSignalReqCatch_Post_Status_Check(
|
||||
ctx,
|
||||
RtemsSignalReqCatch_TransitionMap[ index ][ 0 ]
|
||||
);
|
||||
RtemsSignalReqCatch_Post_Send_Check(
|
||||
ctx,
|
||||
RtemsSignalReqCatch_TransitionMap[ index ][ 1 ]
|
||||
);
|
||||
RtemsSignalReqCatch_Post_Preempt_Check(
|
||||
ctx,
|
||||
RtemsSignalReqCatch_TransitionMap[ index ][ 2 ]
|
||||
);
|
||||
RtemsSignalReqCatch_Post_Timeslice_Check(
|
||||
ctx,
|
||||
RtemsSignalReqCatch_TransitionMap[ index ][ 3 ]
|
||||
);
|
||||
RtemsSignalReqCatch_Post_ASR_Check(
|
||||
ctx,
|
||||
RtemsSignalReqCatch_TransitionMap[ index ][ 4 ]
|
||||
);
|
||||
RtemsSignalReqCatch_Post_IntLvl_Check(
|
||||
ctx,
|
||||
RtemsSignalReqCatch_TransitionMap[ index ][ 5 ]
|
||||
);
|
||||
++index;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user