2003-02-20 Till Straumann <strauman@slac.stanford.edu>

PR 349/bsps
	* startup/pgtbl_setup.c, startup/pgtbl_activate.c: New files
	* startup/Makefile.am, startup/bspstart.c, startup/linkcmds:
	Let the powerpc/shared (+derived) BSPs use pagetable support
   	from libcpu.

c/src/lib/libbsp/powerpc/shared/ChangeLog

@@ -1,3 +1,11 @@
+2003-02-20	Till Straumann <strauman@slac.stanford.edu>
+
+	PR 349/bsps
+	* startup/pgtbl_setup.c, startup/pgtbl_activate.c: New files
+	* startup/Makefile.am, startup/bspstart.c, startup/linkcmds:
+	Let the powerpc/shared (+derived) BSPs use pagetable support
+   	from libcpu.
+
 2003-02-20	Till Straumann <strauman@slac.stanford.edu>
 
 	PR 349/bsps

c/src/lib/libbsp/powerpc/shared/startup/Makefile.am

@@ -3,10 +3,10 @@
 ##
 
 
-C_FILES = bspstart.c
+C_FILES = bspstart.c pgtbl_setup.c pgtbl_activate.c 
 
 noinst_DATA = linkcmds
 
-EXTRA_DIST = bspstart.c linkcmds
+EXTRA_DIST = bspstart.c linkcmds  pgtbl_setup.c pgtbl_activate.c 
 
 include $(top_srcdir)/../../../../../automake/local.am

c/src/lib/libbsp/powerpc/shared/startup/bspstart.c

@@ -27,8 +27,10 @@
 #include <bsp/pci.h>
 #include <bsp/openpic.h>
 #include <bsp/irq.h>
+#include <bsp/VME.h>
 #include <bsp.h>
 #include <libcpu/bat.h>
+#include <libcpu/pte121.h>
 #include <libcpu/cpuIdent.h>
 #include <bsp/vectors.h>
 #include <bsp/motorola.h>
@@ -41,6 +43,13 @@ extern void L1_caches_enables();
 extern unsigned get_L2CR();
 extern void set_L2CR(unsigned);
 extern void bsp_cleanup(void);
+extern Triv121PgTbl BSP_pgtbl_setup();
+extern void			BSP_pgtbl_activate();
+extern void			BSP_vme_config();
+
+SPR_RW(SPR0)
+SPR_RW(SPR1)
+
 /*
  * Copy of residuals passed by firmware
  */
@@ -173,6 +182,7 @@ void bsp_start( void )
   ppc_cpu_revision_t myCpuRevision;
   prep_t boardManufacturer;
   motorolaBoard myBoard;
+  Triv121PgTbl	pt=0;
   /*
    * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
    * store the result in global variables so that it can be used latter...
@@ -217,8 +227,8 @@ void bsp_start( void )
  /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
   *((unsigned32 *)intrStack) = 0;
 
-  asm volatile ("mtspr	273, %0" : "=r" (intrStack) : "0" (intrStack));
-  asm volatile ("mtspr	272, %0" : "=r" (intrNestingLevel) : "0" (intrNestingLevel));
+  _write_SPR1((unsigned int)intrStack);
+  _write_SPR0(intrNestingLevel);
   /*
    * Initialize default raw exception hanlders. See vectors/vectors_init.c
    */
@@ -231,18 +241,20 @@ void bsp_start( void )
    * PC legacy IO space used for inb/outb and all PC
    * compatible hardware
    */
-  setdbat(1, 0x80000000, 0x80000000, 0x10000000, IO_PAGE);
+  setdbat(1, _IO_BASE, _IO_BASE, 0x10000000, IO_PAGE);
   /*
    * PCI devices memory area. Needed to access OPENPIC features
    * provided by the RAVEN
    */
   /* T. Straumann: give more PCI address space */
-  setdbat(2, 0xc0000000, 0xc0000000, 0x10000000, IO_PAGE);
+  setdbat(2, PCI_MEM_BASE, PCI_MEM_BASE, 0x10000000, IO_PAGE);
   /*
    * Must have acces to open pic PCI ACK registers 
    * provided by the RAVEN
+   * 
    */
   setdbat(3, 0xf0000000, 0xf0000000, 0x10000000, IO_PAGE);
+
   select_console(CONSOLE_LOG);
 
   /* We check that the keyboard is present and immediately 
@@ -304,6 +316,27 @@ void bsp_start( void )
   BSP_processor_frequency		= residualCopy.VitalProductData.ProcessorHz;
   BSP_time_base_divisor			= (residualCopy.VitalProductData.TimeBaseDivisor?
 					   residualCopy.VitalProductData.TimeBaseDivisor : 4000);
+
+  /* Allocate and set up the page table mappings
+   * This is only available on >604 CPUs.
+   *
+   * NOTE: This setup routine may modify the available memory
+   *       size. It is essential to call it before
+   *       calculating the workspace etc.
+   */
+  pt = BSP_pgtbl_setup(&BSP_mem_size);
+
+  if (!pt ||
+	  TRIV121_MAP_SUCCESS != triv121PgTblMap(
+			  							pt,
+										TRIV121_121_VSID,
+										0xfeff0000,
+										1,
+										TRIV121_ATTR_IO_PAGE,
+										TRIV121_PP_RW_PAGE
+										)) {
+	printk("WARNING: unable to setup page tables VME bridge must share PCI space\n");
+  }
   
   /*
    * Set up our hooks
@@ -335,6 +368,34 @@ void bsp_start( void )
    * Initalize RTEMS IRQ system
    */
   BSP_rtems_irq_mng_init(0);
+
+  
+  /* Activate the page table mappings only after
+   * initializing interrupts because the irq_mng_init()
+   * routine needs to modify the text
+   */           
+  if (pt) {
+#ifdef  SHOW_MORE_INIT_SETTINGS
+    printk("Page table setup finished; will activate it NOW...\n");
+#endif
+    BSP_pgtbl_activate(pt);
+  	/* finally, switch off DBAT3 */
+	setdbat(3, 0, 0, 0, 0); 
+  }
+
+  /*
+   * Initialize VME bridge - needs working PCI
+   * and IRQ subsystems...
+   */
+#ifdef SHOW_MORE_INIT_SETTINGS
+  printk("Going to initialize VME bridge\n");
+#endif
+  /* VME initialization is in a separate file so apps which don't use
+   * VME or want a different configuration may link against a customized
+   * routine.
+   */
+  BSP_vme_config();
+
 #ifdef SHOW_MORE_INIT_SETTINGS
   printk("Exit from bspstart\n");
 #endif  

c/src/lib/libbsp/powerpc/shared/startup/linkcmds

@@ -7,7 +7,7 @@ ENTRY(_start)
 PROVIDE (__stack = 0);
 MEMORY {
 	VECTORS	: ORIGIN = 0x0 ,  LENGTH = 0x3000
-	CODE : ORIGIN = 0x3000 , LENGTH = 0x100000 
+	CODE : ORIGIN = 0x3000 , LENGTH = 0x400000 
 }
 SECTIONS
 {
@@ -75,10 +75,10 @@ SECTIONS
   .rodata         : { *(.rodata*) *(.gnu.linkonce.r*) }	> CODE
   .rodata1        : { *(.rodata1) }	> CODE
   .eh_frame	  : { *.(eh_frame)		} >CODE
-  _etext = .;
-  PROVIDE (etext = .);
   .sdata2   	  : { *(.sdata2) *(.gnu.linkonce.s2.*)	} >CODE
   .sbss2   	  : { *(.sbss2) *(.gnu.linkonce.sb2.*)	} >CODE
+  _etext = .;
+  PROVIDE (etext = .);
   /* Adjust the address for the data segment.  We want to adjust up to
      the same address within the page on the next page up.  It would
      be more correct to do this:

c/src/lib/libbsp/powerpc/shared/startup/pgtbl_activate.c

@@ -0,0 +1,34 @@
+/* $Id$ */
+
+#include <rtems.h>
+#include <libcpu/pte121.h>
+#include <libcpu/bat.h>
+
+/* Default activation of the page tables. This is a weak
+ * alias, so applications may easily override this
+ * default activation procedure.
+ */
+
+/* Author: Till Straumann, <strauman@slac.stanford.edu>, 4/2002 */
+
+void
+BSP_pgtbl_activate(Triv121PgTbl) __attribute__ (( weak, alias("__BSP_default_pgtbl_activate") ));
+
+void
+__BSP_default_pgtbl_activate(Triv121PgTbl pt)
+{
+	if (!pt) return;
+
+	/* switch the text/ro sements to RO only after
+	 * initializing the interrupts because the irq_mng
+	 * installs some code...
+	 *
+	 * activate the page table; it is still masked by the
+	 * DBAT0, however
+	 */
+	triv121PgTblActivate(pt);
+
+	/* finally, switch off DBAT0 */
+	setdbat(0,0,0,0,0);
+	/* At this point, DBAT0 is available for other use... */
+}

c/src/lib/libbsp/powerpc/shared/startup/pgtbl_setup.c

@@ -0,0 +1,93 @@
+/* $Id$ */
+
+#include <rtems.h>
+#include <libcpu/mmu.h>
+#include <libcpu/page.h>
+#include <rtems/bspIo.h>
+#include <libcpu/pte121.h>
+
+
+/* Default setup of the page tables. This is a weak
+ * alias, so applications may easily override this
+ * default setup.
+ *
+ * NOTE: while it is possible to change the individual
+ *       mappings, the page table itself MUST be
+ *       allocated at the top of the physical memory!
+ *       bspstart.c RELIES on this.
+ *       Also, the 'setup' routine must reduce
+ *       *pmemsize by the size of the page table.
+ */
+
+/* Author: Till Straumann, <strauman@slac.stanford.edu>, 4/2002 */
+
+Triv121PgTbl
+BSP_pgtbl_setup(unsigned long) __attribute__ (( weak, alias("__BSP_default_pgtbl_setup") ));
+
+
+Triv121PgTbl
+__BSP_default_pgtbl_setup(unsigned int *pmemsize)
+{
+Triv121PgTbl	pt;
+unsigned		ldPtSize,tmp;
+
+  /* Allocate a page table large enough to map
+   * the entire physical memory. We put the page
+   * table at the top of the physical memory.
+   */
+
+  /* get minimal size (log base 2) of PT for
+   * this board's memory
+   */
+  ldPtSize = triv121PgTblLdMinSize(*pmemsize);
+  ldPtSize++; /* double this amount -- then why? */
+
+  /* allocate the page table at the top of the physical
+   * memory - THIS IS NOT AN OPTION - bspstart.c RELIES
+   * ON THIS LAYOUT! (the size, however may be changed)
+   */
+  if ( (pt = triv121PgTblInit(*pmemsize - (1<<ldPtSize), ldPtSize)) ) {
+	/* get those from the linker script.
+	 * NOTE THAT THE CORRECTNESS OF THE LINKER SCRIPT IS CRUCIAL
+	 */
+	extern unsigned long __DATA_START__, _etext;
+
+	/* map text and RO data read-only */
+	tmp = triv121PgTblMap(
+						pt,
+						TRIV121_121_VSID,
+						0,
+						(PAGE_ALIGN((unsigned long)&_etext) - 0) >> PG_SHIFT,
+						0, /* WIMG */
+						TRIV121_PP_RO_PAGE);
+	if (TRIV121_MAP_SUCCESS != tmp) {
+		printk("Unable to map page index %i; reverting to BAT0\n", 
+				tmp);
+		pt = 0;
+	} else {
+		/* map the rest (without the page table itself) RW */
+		tmp = triv121PgTblMap(
+						pt,
+						TRIV121_121_VSID,
+						(unsigned long)&__DATA_START__,
+						(*pmemsize - (1<<ldPtSize) -  (unsigned long)&__DATA_START__ )>> PG_SHIFT,
+						0, /* WIMG */
+						TRIV121_PP_RW_PAGE);
+		if (TRIV121_MAP_SUCCESS != tmp) {
+			printk("Unable to map page index %i; reverting to BAT0\n", 
+					tmp);
+			pt = 0;
+		}
+	}
+  } else {
+	printk("WARNING: unable to allocate page table, keeping DBAT0\n");
+  }
+  if (pt) {
+#ifdef SHOW_MORE_INIT_SETTINGS
+	printk("Setting up page table mappings; protecting text/read-only data from write access\n");
+#endif
+	/* SUCCESS; reduce available memory by size of the page table */
+	*pmemsize -= (1<<ldPtSize);
+  }
+  return pt;
+}