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2000-10-20 Joel Sherrill <joel@OARcorp.com>

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* mpc8xx/console-generic/console-generic.c: Avoid use of
	BSP definitions and rely on the new routine
	mbx8xx_console_get_configuration() to get information.  This
	routine was formerly incorrectly called
	mbx8xx_console_use_maximum_buffer_size().
	binding to the exception code.
This commit is contained in:
Joel Sherrill
2000-10-20 13:34:45 +00:00
parent 623ffdb155
commit 772f2243e2
2 changed files with 14 additions and 76 deletions
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9
c/src/lib/libcpu/powerpc/ChangeLog
View File

@@ -1,3 +1,12 @@
2000-10-20 Joel Sherrill <joel@OARcorp.com>
* mpc8xx/console-generic/console-generic.c: Avoid use of
BSP definitions and rely on the new routine
mbx8xx_console_get_configuration() to get information. This
routine was formerly incorrectly called
mbx8xx_console_use_maximum_buffer_size().
binding to the exception code.
2000-10-20 Joel Sherrill <joel@OARcorp.com>
* configure.in, Makefile.am: Explicitly specify whether an

81
c/src/lib/libcpu/powerpc/mpc8xx/console-generic/console-generic.c
View File

@@ -57,7 +57,7 @@
extern rtems_cpu_table Cpu_table;
/* BSP supplied routine */
extern int mbx8xx_console_use_maximum_buffer_size(void);
extern int mbx8xx_console_get_configuration();
#ifdef EPPCBUG_SMC1
extern unsigned32 simask_copy;
@@ -705,7 +705,7 @@ m8xx_uart_scc_initialize (int minor)
sccparms->rfcr = M8xx_RFCR_MOT | M8xx_RFCR_DMA_SPACE(0);
sccparms->tfcr = M8xx_TFCR_MOT | M8xx_TFCR_DMA_SPACE(0);
if ( mbx8xx_console_use_maximum_buffer_size() )
if ( (mbx8xx_console_get_configuration() & 0x06) == 0x02 )
sccparms->mrblr = RXBUFSIZE; /* Maximum Rx buffer size */
else
sccparms->mrblr = 1; /* Maximum Rx buffer size */
@@ -774,8 +774,7 @@ m8xx_uart_scc_initialize (int minor)
break;
#endif
}
#if NVRAM_CONFIGURE == 1
if ( (nvram->console_mode & 0x06) == 0x02 ) {
if ( (mbx8xx_console_get_configuration() & 0x06) == 0x02 ) {
switch (minor) {
case SCC2_MINOR:
rtems_interrupt_catch (m8xx_scc2_interrupt_handler,
@@ -807,43 +806,6 @@ m8xx_uart_scc_initialize (int minor)
#endif /* mpc860 */
}
}
#else /* NVRAM_CONFIGURE != 1 */
#if UARTS_IO_MODE == 1
switch (minor) {
case SCC2_MINOR:
rtems_interrupt_catch (m8xx_scc2_interrupt_handler,
PPC_IRQ_CPM_SCC2,
&old_handler[minor]);
sccregs->sccm = 3; /* Enable SCC2 Rx & Tx interrupts */
m8xx.cimr |= 1UL << 29; /* Enable SCC2 interrupts */
break;
#ifdef mpc860
case SCC3_MINOR:
rtems_interrupt_catch (m8xx_scc3_interrupt_handler,
PPC_IRQ_CPM_SCC3,
&old_handler[minor]);
sccregs->sccm = 3; /* Enable SCC2 Rx & Tx interrupts */
m8xx.cimr |= 1UL << 28; /* Enable SCC2 interrupts */
break;
case SCC4_MINOR:
rtems_interrupt_catch (m8xx_scc4_interrupt_handler,
PPC_IRQ_CPM_SCC4,
&old_handler[minor]);
sccregs->sccm = 3; /* Enable SCC2 Rx & Tx interrupts */
m8xx.cimr |= 1UL << 27; /* Enable SCC2 interrupts */
break;
#endif /* mpc860 */
}
#endif /* UARTS_IO_MODE */
#endif /* NVRAM_CONFIGURE */
}
@@ -912,18 +874,10 @@ m8xx_uart_smc_initialize (int minor)
smcparms->tbase = (char *)TxBd[minor] - (char *)&m8xx;
smcparms->rfcr = M8xx_RFCR_MOT | M8xx_RFCR_DMA_SPACE(0);
smcparms->tfcr = M8xx_TFCR_MOT | M8xx_TFCR_DMA_SPACE(0);
#if NVRAM_CONFIGURE == 1
if ( (nvram->console_mode & 0x06) == 0x02 )
if ( (mbx8xx_console_get_configuration() & 0x06) == 0x02 )
smcparms->mrblr = RXBUFSIZE; /* Maximum Rx buffer size */
else
smcparms->mrblr = 1; /* Maximum Rx buffer size */
#else
#if UARTS_IO_MODE == 1
smcparms->mrblr = RXBUFSIZE; /* Maximum Rx buffer size */
#else
smcparms->mrblr = 1; /* Maximum Rx buffer size */
#endif
#endif
/*
* Set up SMC1 parameter RAM UART-specific parameters
@@ -968,8 +922,7 @@ m8xx_uart_smc_initialize (int minor)
* Enable receiver and transmitter
*/
smcregs->smcmr |= M8xx_SMCMR_TEN | M8xx_SMCMR_REN;
#if NVRAM_CONFIGURE == 1
if ( (nvram->console_mode & 0x06) == 0x02 ) {
if ( (mbx8xx_console_get_configuration() & 0x06) == 0x02 ) {
switch (minor) {
case SMC1_MINOR:
rtems_interrupt_catch (m8xx_smc1_interrupt_handler,
@@ -990,30 +943,6 @@ m8xx_uart_smc_initialize (int minor)
break;
}
}
#else
#if UARTS_IO_MODE == 1
switch (minor) {
case SMC1_MINOR:
rtems_interrupt_catch (m8xx_smc1_interrupt_handler,
PPC_IRQ_CPM_SMC1,
&old_handler[minor]);
smcregs->smcm = 3; /* Enable SMC1 Rx & Tx interrupts */
m8xx.cimr |= 1UL << 4; /* Enable SMC1 interrupts */
break;
case SMC2_MINOR:
rtems_interrupt_catch (m8xx_smc2_interrupt_handler,
PPC_IRQ_CPM_SMC2,
&old_handler[minor]);
smcregs->smcm = 3; /* Enable SMC2 Rx & Tx interrupts */
m8xx.cimr |= 1UL << 3; /* Enable SMC2 interrupts */
break;
}
#endif
#endif
}
void