forked from Imagelibrary/rtems
2005-02-24 Jay Monkman <jtm@lopingdog.com>
PR 751/bsps
* startup/linkcmds: Cleanup.
* network/network.c: Added hardware initialization
code.
This commit is contained in:
@@ -1,3 +1,10 @@
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2005-02-24 Jay Monkman <jtm@lopingdog.com>
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PR 751/bsps
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* startup/linkcmds: Cleanup.
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* network/network.c: Added hardware initialization
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code.
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2005-01-07 Ralf Corsepius <ralf.corsepius@rtems.org>
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2005-01-07 Ralf Corsepius <ralf.corsepius@rtems.org>
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* Makefile.am: Eliminate CFLAGS_OPTIMIZE_V.
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* Makefile.am: Eliminate CFLAGS_OPTIMIZE_V.
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@@ -12,6 +12,8 @@
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#include <rtems/rtems_bsdnet.h>
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#include <rtems/rtems_bsdnet.h>
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#include <at91rm9200.h>
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#include <at91rm9200.h>
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#include <at91rm9200_emac.h>
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#include <at91rm9200_emac.h>
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#include <at91rm9200_gpio.h>
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#include <at91rm9200_pmc.h>
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#include <stdio.h>
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#include <stdio.h>
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#include <string.h>
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#include <string.h>
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@@ -308,7 +310,41 @@ void at91rm9200_emac_init(void *arg)
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void at91rm9200_emac_init_hw(at91rm9200_emac_softc_t *sc)
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void at91rm9200_emac_init_hw(at91rm9200_emac_softc_t *sc)
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{
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{
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int i;
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int i;
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/* Configure shared pins for Ethernet, not GPIO */
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PIOA_REG(PIO_PDR) = ( BIT7 | /* tx clock */
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BIT8 | /* tx enable */
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BIT9 | /* tx data 0 */
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BIT10 | /* tx data 1 */
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BIT11 | /* carrier sense */
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BIT12 | /* rx data 0 */
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BIT13 | /* rx data 1 */
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BIT14 | /* rx error */
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BIT15 | /* MII clock */
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BIT16 ); /* MII data */
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PIOB_REG(PIO_PDR) = ( BIT12 | /* tx data 2 */
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BIT13 | /* tx data 3 */
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BIT14 | /* tx error */
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BIT15 | /* rx data 2 */
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BIT16 | /* rx data 3 */
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BIT17 | /* rx data valid */
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BIT18 | /* rx collistion */
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BIT19 ); /* rx clock */
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PIOB_REG(PIO_BSR) = ( BIT12 | /* tx data 2 */
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BIT13 | /* tx data 3 */
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BIT14 | /* tx error */
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BIT15 | /* rx data 2 */
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BIT16 | /* rx data 3 */
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BIT17 | /* rx data valid */
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BIT18 | /* rx collistion */
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BIT19 ); /* rx clock */
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/* Enable the clock to the EMAC */
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PMC_REG(PMC_PCER) |= PMC_PCR_PID_EMAC;
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/* initialize our receive buffer descriptors */
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/* initialize our receive buffer descriptors */
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for (i = 0; i < NUM_RXBDS-1; i++) {
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for (i = 0; i < NUM_RXBDS-1; i++) {
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rxbuf_hdrs[i].address = (unsigned long)(&rxbuf[i * RX_BUFFER_SIZE]);
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rxbuf_hdrs[i].address = (unsigned long)(&rxbuf[i * RX_BUFFER_SIZE]);
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@@ -327,6 +363,7 @@ void at91rm9200_emac_init_hw(at91rm9200_emac_softc_t *sc)
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EMAC_REG(EMAC_RSR) &= ~(EMAC_RSR_OVR | EMAC_RSR_REC | EMAC_RSR_BNA);
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EMAC_REG(EMAC_RSR) &= ~(EMAC_RSR_OVR | EMAC_RSR_REC | EMAC_RSR_BNA);
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/* set the MII clock divder to MCK/64 */
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/* set the MII clock divder to MCK/64 */
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EMAC_REG(EMAC_CFG) &= EMAC_CFG_CLK_MASK;
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EMAC_REG(EMAC_CFG) = (EMAC_CFG_CLK_64 | EMAC_CFG_BIG | EMAC_CFG_FD);
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EMAC_REG(EMAC_CFG) = (EMAC_CFG_CLK_64 | EMAC_CFG_BIG | EMAC_CFG_FD);
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/* enable the MII interface */
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/* enable the MII interface */
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@@ -62,7 +62,7 @@ SECTIONS
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at91rm9200_emac_txbuf = .;
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at91rm9200_emac_txbuf = .;
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. += (0x600);
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. += (0x600);
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/* 4 receive buffers, 0x600 each */
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/* 8 receive buffers, 0x600 each */
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at91rm9200_emac_rxbufs = .;
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at91rm9200_emac_rxbufs = .;
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. += (0x600 * 8);
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. += (0x600 * 8);
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