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Typo corrected from John Cotton <john.cotton@nrc.ca>.

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This commit is contained in:
Joel Sherrill
2000-06-15 19:27:56 +00:00
parent 10d8a60d5e
commit 667c8a0023
1 changed files with 9 additions and 9 deletions
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18
c/src/lib/libcpu/powerpc/shared/src/cache.c
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@@ -60,7 +60,7 @@ void _CPU_cache_disable_data (
PPC_Set_HID0( value ); PPC_Set_HID0( value );
} }
void _CPU_cache_enable_inst ( void _CPU_cache_enable_instruction (
void ) void )
{ {
unsigned32 value; unsigned32 value;
@@ -69,7 +69,7 @@ void _CPU_cache_enable_inst (
PPC_Set_HID0( value ); PPC_Set_HID0( value );
} }
void _CPU_cache_disable_inst ( void _CPU_cache_disable_instruction (
void ) void )
{ {
unsigned32 value; unsigned32 value;
@@ -78,7 +78,7 @@ void _CPU_cache_disable_inst (
PPC_Set_HID0( value ); PPC_Set_HID0( value );
} }
#elif ( defined(mpc860) || defined(mpc821) ) #elif ( defined(mpx8xx) || defined(mpc860) || defined(mpc821) )
#define mtspr(_spr,_reg) \ #define mtspr(_spr,_reg) \
__asm__ volatile ( "mtspr %0, %1\n" : : "i" ((_spr)), "r" ((_reg)) ) __asm__ volatile ( "mtspr %0, %1\n" : : "i" ((_spr)), "r" ((_reg)) )
@@ -120,18 +120,18 @@ void _CPU_cache_disable_data ( void )
isync; isync;
} }
void _CPU_cache_invalidate_1_inst_line( void _CPU_cache_invalidate_1_instruction_line(
const void * _address ) const void * _address )
{ {
register const void *__address = _address; register const void *__address = _address;
asm volatile ( "icbi 0,%0" :: "r" (__address) ); asm volatile ( "icbi 0,%0" :: "r" (__address) );
} }
void _CPU_cache_invalidate_entire_inst ( void ) {} void _CPU_cache_invalidate_entire_instruction ( void ) {}
void _CPU_cache_freeze_inst ( void ) {} void _CPU_cache_freeze_instruction ( void ) {}
void _CPU_cache_unfreeze_inst ( void ) {} void _CPU_cache_unfreeze_instruction ( void ) {}
void _CPU_cache_enable_inst ( void ) void _CPU_cache_enable_instruction ( void )
{ {
unsigned32 r1; unsigned32 r1;
r1 = (0x2<<24); r1 = (0x2<<24);
@@ -139,7 +139,7 @@ void _CPU_cache_enable_inst ( void )
isync; isync;
} }
void _CPU_cache_disable_inst ( void ) void _CPU_cache_disable_instruction ( void )
{ {
unsigned32 r1; unsigned32 r1;
r1 = (0x4<<24); r1 = (0x4<<24);