RTOS/rtems
1
0
Fork 0
forked from Imagelibrary/rtems
Code Pull Requests Activity

Misc: Spell length correctly

Browse Source
This commit is contained in:
Joel Sherrill
2016-07-12 05:44:17 -05:00
parent 665f03acb3
commit 612297e813
8 changed files with 9 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
c/src/lib/libbsp/arm/lpc176x/include/can.h
View File

@@ -162,7 +162,7 @@ rtems_status_code can_register_isr(
* @param msg The created message.
* @param _id The can id for the message.
* @param _data The data of the message.
* @param _len The lenght of the message.
* @param _len The length of the message.
* @return RTEMS_SUCCESFUL if created, RTEMS_INVALID_NUMBER otherwise.
*/
rtems_status_code create_can_message(

4
c/src/lib/libbsp/arm/lpc176x/irq/irq.c
View File

@@ -30,9 +30,9 @@
#include <bsp/linker-symbols.h>
/**
* @brief Checks if the current interrupt vector lenght is valid or not.
* @brief Checks if the current interrupt vector length is valid or not.
*
* @param vector The current interrupt vector lenght .
* @param vector The current interrupt vector length.
* @return TRUE if valid.
* FALSE otherwise.
*/

2
c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h
View File

@@ -73,7 +73,7 @@ extern "C" {
#define CPU_DATA_CACHE_ALIGNMENT ARM_CACHE_L1_CPU_DATA_ALIGNMENT
#define CPU_INSTRUCTION_CACHE_ALIGNMENT ARM_CACHE_L1_CPU_INSTRUCTION_ALIGNMENT
#if defined(__ARM_ARCH_7A__)
/* Some/many ARM Cortex-A cores have L1 data line lenght 64 bytes */
/* Some/many ARM Cortex-A cores have L1 data line length 64 bytes */
#define CPU_MAXIMAL_CACHE_ALIGNMENT 64
#endif
#define CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS \

2
c/src/lib/libbsp/arm/shared/armv467ar-basic-cache/cache_.h
View File

@@ -29,7 +29,7 @@
#define CPU_DATA_CACHE_ALIGNMENT 32
#define CPU_INSTRUCTION_CACHE_ALIGNMENT 32
#if defined(__ARM_ARCH_7A__)
/* Some/many ARM Cortex-A cores have L1 data line lenght 64 bytes */
/* Some/many ARM Cortex-A cores have L1 data line length 64 bytes */
#define CPU_MAXIMAL_CACHE_ALIGNMENT 64
#endif

2
c/src/lib/libbsp/lm32/shared/tsmac/tsmac.c
View File

@@ -249,7 +249,7 @@ static void tsmac_rxDaemon(void *arg)
if (rxq == 0)
break;
/* Get lenght of frame */
/* Get length of frame */
len = tsmacread(LM32_TSMAC_RX_LEN_FIFO);
#ifdef DEBUG
printk(TSMAC_NAME ": Frames %d, len 0x%04x (%d)\n",

2
c/src/lib/libbsp/powerpc/haleakala/startup/linkcmds
View File

@@ -77,7 +77,7 @@ SECTIONS
/*
* C++ constructors and destructors for static objects.
* PowerPC EABI does not use crtstuff yet, so we build "old-style"
* constructor and destructor lists that begin with the list lenght
* constructor and destructor lists that begin with the list length
* end terminate with a NULL entry.
*/

2
c/src/lib/libbsp/powerpc/mpc8260ads/startup/linkcmds
View File

@@ -95,7 +95,7 @@ SECTIONS
/*
* C++ constructors and destructors for static objects.
* PowerPC EABI does not use crtstuff yet, so we build "old-style"
* constructor and destructor lists that begin with the list lenght
* constructor and destructor lists that begin with the list length
* end terminate with a NULL entry.
*/

2
cpukit/libfs/src/nfsclient/src/nfs.c
View File

@@ -249,7 +249,7 @@ typedef struct strbuf {
/* Read 'readlink' results into a 'strbuf'.
* This is convenient as it avoids
* one extra step of copying / lenght
* one extra step of copying / length
* checking.
*/
typedef struct readlinkres_strbuf {