lpc24xx: new BSP

c/src/lib/libbsp/arm/lpc24xx/ChangeLog

@@ -0,0 +1,7 @@
+2008-09-22	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* bsp_specs, clock/clock-config.c, configure.ac,
+	console/console-config.c, include/bsp.h, include/irq-config.h,
+	include/irq.h, include/lpc24xx.h, include/system-clocks.h, irq/irq.c,
+	Makefile.am, misc/system-clocks.c, preinstall.am, README,
+	rtc/rtc-config.c, startup/bspstart.c, startup/linkcmds: New files.

c/src/lib/libbsp/arm/lpc24xx/Makefile.am

@@ -0,0 +1,114 @@
+##
+#
+# @file
+#
+# @brief Makefile of LibBSP for the LPC247X boards.
+#
+
+# $Id$
+
+ACLOCAL_AMFLAGS = -I ../../../../aclocal
+
+include $(top_srcdir)/../../../../automake/compile.am
+include $(top_srcdir)/../../bsp.am
+
+include_bspdir = $(includedir)/bsp
+
+libcpudir = ../../../libcpu/@RTEMS_CPU@
+
+###############################################################################
+#                  Header                                                     #
+###############################################################################
+
+include_HEADERS = include/bsp.h
+
+nodist_include_HEADERS = include/bspopts.h
+
+include_bsp_HEADERS = ../../shared/include/irq-generic.h \
+	../../shared/tod.h \
+	../shared/include/linker-symbols.h \
+	../shared/include/start.h \
+	include/irq-config.h \
+	include/irq.h \
+	include/lpc24xx.h \
+	include/system-clocks.h
+
+###############################################################################
+#                  Data                                                       #
+###############################################################################
+
+EXTRA_DIST = ../shared/start/start.S
+
+project_lib_DATA = start.$(OBJEXT)
+
+dist_project_lib_DATA = ../shared/startup/linkcmds.base \
+	startup/linkcmds \
+	bsp_specs
+
+###############################################################################
+#                  LibBSP                                                     #
+###############################################################################
+
+shared_SOURCES = ../../shared/bootcard.c \
+	../../shared/bspclean.c \
+	../../shared/bspgetworkarea.c \
+	../../shared/bsplibc.c \
+	../../shared/bsppost.c \
+	../../shared/bsppredriverhook.c \
+	../../shared/bsppretaskinghook.c \
+	../../shared/gnatinstallhandler.c \
+	../../shared/sbrk.c \
+	../shared/abort/simple_abort.c
+
+startup_SOURCES = startup/bspstart.c
+
+irq_SOURCES = ../../shared/src/irq-generic.c \
+	../../shared/src/irq-legacy.c \
+	../shared/irq/irq_asm.S \
+	irq/irq.c
+
+console_SOURCES = ../../shared/console.c \
+	console/console-config.c
+
+clock_SOURCES = clock/clock-config.c
+
+rtc_SOURCES = ../../shared/tod.c \
+	rtc/rtc-config.c
+
+misc_SOURCES = misc/system-clocks.c
+
+noinst_LIBRARIES = libbsp.a
+
+libbsp_a_SOURCES = $(clock_SOURCES) \
+	$(console_SOURCES) \
+	$(irq_SOURCES) \
+	$(misc_SOURCES) \
+	$(rtc_SOURCES) \
+	$(shared_SOURCES) \
+	$(startup_SOURCES)
+
+###############################################################################
+#                  Network                                                    #
+###############################################################################
+
+if HAS_NETWORKING
+
+noinst_PROGRAMS = network.rel
+
+network_rel_SOURCES = network/network.c
+network_rel_CPPFLAGS = $(AM_CPPFLAGS) -D__INSIDE_RTEMS_BSD_TCPIP_STACK__
+network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
+
+libbsp_a_LIBADD = network.rel
+
+endif
+
+###############################################################################
+#                  Special Rules                                              #
+###############################################################################
+
+start.$(OBJEXT): ../shared/start/start.S
+	$(CPPASCOMPILE) -o $@ -c $<
+
+include $(srcdir)/preinstall.am
+include $(top_srcdir)/../../../../automake/local.am

c/src/lib/libbsp/arm/lpc24xx/README

@@ -0,0 +1,6 @@
+Development Board: QVGA Base Board from Embedded Artists
+
+Drivers:
+	o Console
+	o Clock
+	o RTC

c/src/lib/libbsp/arm/lpc24xx/bsp_specs

@@ -0,0 +1,13 @@
+%rename endfile old_endfile
+%rename startfile old_startfile
+%rename link old_link
+
+*startfile:
+%{!qrtems: %(old_startfile)} \
+%{!nostdlib: %{qrtems: start.o%s crti.o%s crtbegin.o%s}}
+
+*link:
+%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N -e start}
+
+*endfile:
+%{!qrtems: *(old_endfiles)} %{qrtems: crtend.o%s crtn.o%s }

c/src/lib/libbsp/arm/lpc24xx/clock/clock-config.c

@@ -0,0 +1,125 @@
+/**
+ * @file
+ *
+ * @ingroup lpc24xx
+ *
+ * @brief Clock driver configuration.
+ */
+
+/*
+ * Copyright (c) 2008
+ * Embedded Brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * rtems@embedded-brains.de
+ *
+ * The license and distribution terms for this file may be found in the file
+ * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
+ */
+
+#define RTEMS_STATUS_CHECKS_USE_PRINTK
+
+#include <rtems/status-checks.h>
+
+#include <bsp.h>
+#include <bsp/lpc24xx.h>
+#include <bsp/irq.h>
+#include <bsp/system-clocks.h>
+
+/* This is defined in ../../../shared/clockdrv_shell.c */
+rtems_isr Clock_isr( rtems_vector_number vector);
+
+#define Clock_driver_support_at_tick() \
+ do { \
+   T0IR = TIR_MR0; \
+ } while (0)
+
+static void lpc24xx_clock_handler_install( void)
+{
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
+
+  sc = rtems_interrupt_handler_install(
+    LPC24XX_IRQ_TIMER_0,
+    "Clock",
+    RTEMS_INTERRUPT_UNIQUE,
+    (rtems_interrupt_handler) Clock_isr,
+    NULL
+  );
+  CHECK_SC_VOID( sc, "Install clock interrupt handler");
+}
+
+static void lpc24xx_clock_initialize( void)
+{
+  rtems_interrupt_level level;
+  uint64_t interval = ((uint64_t) lpc24xx_cclk()
+    * (uint64_t) rtems_configuration_get_microseconds_per_tick()) / 1000000;
+
+  /* Set timer pclk to cclk */
+  rtems_interrupt_disable( level);
+  SET_PCLKSEL0_PCLK_TIMER0( PCLKSEL0, 1);
+  rtems_interrupt_enable( level);
+
+  /* Reset timer */
+  T0TCR = TCR_RST;
+
+  /* Clear interrupt flags */
+  T0IR = 0xff;
+
+  /* Set timer mode */
+  T0CCR = 0;
+
+  /* Timer is incremented every pclk tick */
+  T0PR = 0;
+
+  /* Set match registers */
+  T0MR0 = (uint32_t) interval;
+  T0MR1 = 0xdeadbeef;
+  T0MR2 = 0xdeadbeef;
+  T0MR3 = 0xdeadbeef;
+
+  /* Generate interrupt and reset counter on match with MR0 */
+  T0MCR = TMCR_MR0I | TMCR_MR0R;
+
+  /* No external match */
+  T0EMR = 0;
+
+  /* Enable timer */
+  T0TCR = TCR_EN;
+}
+
+static void lpc24xx_clock_cleanup( void)
+{
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
+
+  /* Disable timer */
+  T0TCR = 0;
+
+  /* Remove interrupt handler */
+  sc = rtems_interrupt_handler_remove(
+    LPC24XX_IRQ_TIMER_0,
+    (rtems_interrupt_handler) Clock_isr,
+    NULL
+  );
+  CHECK_SC_VOID( sc, "Remove clock interrupt handler");
+}
+
+static uint32_t lpc24xx_clock_nanoseconds_since_last_tick( void)
+{
+  uint64_t clock = lpc24xx_cclk();
+  uint32_t clicks = T0TC;
+  uint64_t ns = ((uint64_t) clicks * 1000000000) / clock;
+  
+  return (uint32_t) ns;
+}
+ 
+#define Clock_driver_support_initialize_hardware() lpc24xx_clock_initialize()
+
+#define Clock_driver_support_install_isr( isr, old_isr) lpc24xx_clock_handler_install()
+
+#define Clock_driver_support_shutdown_hardware() lpc24xx_clock_cleanup()
+  
+#define Clock_driver_nanoseconds_since_last_tick lpc24xx_clock_nanoseconds_since_last_tick
+
+/* Include shared source clock driver code */
+#include "../../../../libbsp/shared/clockdrv_shell.c"

c/src/lib/libbsp/arm/lpc24xx/configure.ac

@@ -0,0 +1,29 @@
+##
+#
+# @file
+#
+# @ingroup mpc55xx_config
+#
+# @brief Configure script of LibBSP for the LPC247X boards.
+#
+
+AC_PREREQ(2.59)
+AC_INIT([rtems-c-src-lib-libbsp-arm-lpc247x],[_RTEMS_VERSION],[rtems-bugs@rtems.com])
+AC_CONFIG_SRCDIR([bsp_specs])
+RTEMS_TOP(../../../../../..)
+
+RTEMS_CANONICAL_TARGET_CPU
+AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.9])
+RTEMS_BSP_CONFIGURE
+
+RTEMS_PROG_CC_FOR_TARGET([-fasm])
+RTEMS_CANONICALIZE_TOOLS
+RTEMS_PROG_CCAS
+
+RTEMS_CHECK_NETWORKING 
+AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
+
+RTEMS_BSP_BOOTCARD_HANDLES_RAM_ALLOCATION
+
+AC_CONFIG_FILES([Makefile])
+AC_OUTPUT

c/src/lib/libbsp/arm/lpc24xx/console/console-config.c

@@ -0,0 +1,69 @@
+/**
+ * @file
+ *
+ * @ingroup lpc24xx
+ *
+ * @brief Console configuration.
+ */
+
+/*
+ * Copyright (c) 2008
+ * Embedded Brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * rtems@embedded-brains.de
+ *
+ * The license and distribution terms for this file may be found in the file
+ * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
+ */
+
+#include <libchip/serial.h>
+#include <libchip/ns16550.h>
+
+#include <bsp/lpc24xx.h>
+#include <bsp/irq.h>
+
+#define LPC24XX_UART_NUMBER 1
+
+static uint8_t lpc24xx_uart_register( uint32_t addr, uint8_t i)
+{
+  volatile uint32_t *reg = (volatile uint32_t *) addr;
+
+  return (uint8_t) reg [i];
+}
+
+static void lpc24xx_uart_set_register( uint32_t addr, uint8_t i, uint8_t val)
+{
+  volatile uint32_t *reg = (volatile uint32_t *) addr;
+
+  reg [i] = val; 
+}
+
+unsigned long Console_Port_Count = LPC24XX_UART_NUMBER;
+
+rtems_device_minor_number  Console_Port_Minor = 0;
+
+console_data  Console_Port_Data [LPC24XX_UART_NUMBER];
+
+console_tbl Console_Port_Tbl [LPC24XX_UART_NUMBER] = {
+  {
+    .sDeviceName = "/dev/ttyS0",
+    .deviceType = SERIAL_NS16550,
+    .pDeviceFns = &ns16550_fns,
+    .deviceProbe = NULL,
+    .pDeviceFlow = NULL,
+    .ulMargin = 16,
+    .ulHysteresis = 8,
+    .pDeviceParams = (void *) 38400,
+    .ulCtrlPort1 = UART0_BASE_ADDR,
+    .ulCtrlPort2 = 0,
+    .ulDataPort = UART0_BASE_ADDR,
+    .getRegister = lpc24xx_uart_register,
+    .setRegister = lpc24xx_uart_set_register,
+    .getData = NULL,
+    .setData = NULL,
+    .ulClock = 57600000,
+    .ulIntVector = LPC24XX_IRQ_UART_0
+  }
+};

c/src/lib/libbsp/arm/lpc24xx/include/bsp.h

@@ -0,0 +1,42 @@
+/**
+ * @file
+ *
+ * @ingroup lpc24xx
+ *
+ * @brief Global BSP variables and functions.
+ */
+
+/*
+ * Copyright (c) 2008
+ * Embedded Brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * rtems@embedded-brains.de
+ *
+ * The license and distribution terms for this file may be found in the file
+ * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_LPC24XX_BSP_H
+#define LIBBSP_ARM_LPC24XX_BSP_H
+
+#include <rtems.h>
+#include <rtems/console.h>
+#include <rtems/clockdrv.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#define BSP_FEATURE_IRQ_EXTENSION
+
+#ifndef ASM
+
+#endif /* ASM */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_LPC24XX_BSP_H */

c/src/lib/libbsp/arm/lpc24xx/include/irq-config.h

@@ -0,0 +1,26 @@
+/**
+ * @file
+ *
+ * @ingroup bsp_interrupt
+ *
+ * @brief LPC24XX interrupt support configuration.
+ */
+
+/*
+ * Copyright (c) 2008
+ * Embedded Brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * rtems@embedded-brains.de
+ *
+ * The license and distribution terms for this file may be found in the file
+ * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_LPC24XX_IRQ_CONFIG_H
+#define LIBBSP_ARM_LPC24XX_IRQ_CONFIG_H
+
+#include <bsp/irq.h>
+
+#endif /* LIBBSP_ARM_LPC24XX_IRQ_CONFIG_H */

c/src/lib/libbsp/arm/lpc24xx/include/irq.h

@@ -0,0 +1,85 @@
+/**
+ * @file
+ *
+ * @ingroup bsp_interrupt
+ *
+ * @brief LPC24XX interrupt definitions.
+ */
+
+/*
+ * Copyright (c) 2008
+ * Embedded Brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * rtems@embedded-brains.de
+ *
+ * The license and distribution terms for this file may be found in the file
+ * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_LPC24XX_IRQ_H
+#define LIBBSP_ARM_LPC24XX_IRQ_H
+
+#ifndef ASM
+
+#include <rtems.h>
+#include <rtems/irq.h>
+#include <rtems/irq-extension.h>
+
+/**
+ * @addtogroup bsp_interrupt
+ *
+ * @{
+ */
+
+#define LPC24XX_IRQ_WDT 0
+#define LPC24XX_IRQ_SOFTWARE 1
+#define LPC24XX_IRQ_ARM CORE_0 2
+#define LPC24XX_IRQ_ARM CORE_1 3
+#define LPC24XX_IRQ_TIMER_0 4
+#define LPC24XX_IRQ_TIMER_1 5
+#define LPC24XX_IRQ_UART_0 6
+#define LPC24XX_IRQ_UART_1 7
+#define LPC24XX_IRQ_PWM 8
+#define LPC24XX_IRQ_I2C_0 9
+#define LPC24XX_IRQ_SPI_SSP0 10
+#define LPC24XX_IRQ_SSP1 11
+#define LPC24XX_IRQ_PLL 12
+#define LPC24XX_IRQ_RTC 13
+#define LPC24XX_IRQ_EINT_0 14
+#define LPC24XX_IRQ_EINT_1 15
+#define LPC24XX_IRQ_EINT_2 16
+#define LPC24XX_IRQ_EINT_3 17
+#define LPC24XX_IRQ_ADC_0 18
+#define LPC24XX_IRQ_I2C_1 19
+#define LPC24XX_IRQ_BOD 20
+#define LPC24XX_IRQ_ETHERNET 21
+#define LPC24XX_IRQ_USB 22
+#define LPC24XX_IRQ_CAN 23
+#define LPC24XX_IRQ_SD_MMC 24
+#define LPC24XX_IRQ_DMA 25
+#define LPC24XX_IRQ_TIMER_2 26
+#define LPC24XX_IRQ_TIMER_3 27
+#define LPC24XX_IRQ_UART2 28
+#define LPC24XX_IRQ_UART3 29
+#define LPC24XX_IRQ_I2C_2 30
+#define LPC24XX_IRQ_I2S 31
+
+/**
+ * @brief Minimum vector number.
+ */
+#define BSP_INTERRUPT_VECTOR_MIN LPC24XX_IRQ_WDT
+
+/**
+ * @brief Maximum vector number.
+ */
+#define BSP_INTERRUPT_VECTOR_MAX LPC24XX_IRQ_I2S
+
+#define BSP_FEATURE_IRQ_EXTENSION
+
+/** @} */
+
+#endif /* ASM */
+
+#endif /* LIBBSP_ARM_LPC24XX_IRQ_H */

c/src/lib/libbsp/arm/lpc24xx/include/system-clocks.h

@@ -0,0 +1,36 @@
+/**
+ * @file
+ *
+ * @ingroup lpc24xx
+ *
+ * @brief System clocks.
+ */
+
+/*
+ * Copyright (c) 2008
+ * Embedded Brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * rtems@embedded-brains.de
+ *
+ * The license and distribution terms for this file may be found in the file
+ * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_LPC24XX_SYSTEM_CLOCKS_H
+#define LIBBSP_ARM_LPC24XX_SYSTEM_CLOCKS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+unsigned lpc24xx_cclk( void);
+
+void lpc24xx_set_pll( unsigned clksrc, unsigned nsel, unsigned msel, unsigned cclksel);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_LPC24XX_SYSTEM_CLOCKS_H */

c/src/lib/libbsp/arm/lpc24xx/irq/irq.c

@@ -0,0 +1,90 @@
+/**
+ * @file
+ *
+ * @ingroup bsp_interrupt
+ *
+ * @brief LPC24XX interrupt support.
+ */
+
+/*
+ * Copyright (c) 2008
+ * Embedded Brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * rtems@embedded-brains.de
+ *
+ * The license and distribution terms for this file may be found in the file
+ * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
+ */
+
+#include <bsp.h>
+#include <bsp/irq.h>
+#include <bsp/irq-generic.h>
+#include <bsp/lpc24xx.h>
+
+void ExecuteITHandler( void)
+{
+  /* Read current vector number */
+  rtems_vector_number vector = VICVectAddr;
+
+  /* Acknowledge interrupt */
+  VICVectAddr = 0;
+
+  /* Dispatch interrupt handlers */
+  bsp_interrupt_handler_dispatch( vector);
+}
+
+rtems_status_code bsp_interrupt_vector_enable( rtems_vector_number vector)
+{
+  VICIntEnable = 1U << vector;
+
+  return RTEMS_SUCCESSFUL;
+}
+
+rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number vector)
+{
+  VICIntEnClear = 1U << vector;
+
+  return RTEMS_SUCCESSFUL;
+}
+
+rtems_status_code bsp_interrupt_facility_initialize( void)
+{
+  volatile uint32_t *addr = VICVectAddrBase;
+  volatile uint32_t *prio = VICVectPriorityBase;
+  rtems_vector_number i = 0;
+
+  /* Disable all interrupts */
+  VICIntEnClear = 0xffffffff;
+
+  /* Clear all software interrupts */
+  VICSoftIntClear = 0xffffffff;
+
+  /* Use IRQ category */
+  VICIntSelect = 0;
+
+  for (i = BSP_INTERRUPT_VECTOR_MIN; i <= BSP_INTERRUPT_VECTOR_MAX; ++i) {
+    /* Use the vector address register to store the vector number */
+    addr [i] = i;
+
+    /* Give vector lowest priority */
+    prio [i] = 15;
+  }
+
+  /* Reset priority mask register */
+  VICSWPrioMask = 0xffff;
+
+  /* Acknowledge interrupt */
+  VICVectAddr = 0;
+
+  /* Install the IRQ exception handler */
+  _CPU_ISR_install_vector( ARM_EXCEPTION_IRQ, _ISR_Handler, NULL);
+
+  return RTEMS_SUCCESSFUL;
+}
+
+void bsp_interrupt_handler_default( rtems_vector_number vector)
+{
+  printk( "Spurious interrupt: %u\n", vector);
+}

c/src/lib/libbsp/arm/lpc24xx/misc/system-clocks.c

@@ -0,0 +1,152 @@
+/**
+ * @file
+ *
+ * @ingroup lpc24xx
+ *
+ * @brief System clocks.
+ */
+
+/*
+ * Copyright (c) 2008
+ * Embedded Brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * rtems@embedded-brains.de
+ *
+ * The license and distribution terms for this file may be found in the file
+ * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
+ */
+
+#include <libcpu/utility.h>
+
+#include <bsp.h>
+#include <bsp/lpc24xx.h>
+#include <bsp/system-clocks.h>
+
+/**
+ * @brief Internal RC oscillator frequency in [Hz].
+ */
+#define LPC24XX_OSCILLATOR_INTERNAL 4000000U
+
+#ifdef LPC2478
+  /**
+   * @brief Main oscillator frequency in [Hz].
+   */
+  #define LPC24XX_OSCILLATOR_MAIN 12000000U
+
+  /**
+   * @brief RTC oscillator frequency in [Hz].
+   */
+  #define LPC24XX_OSCILLATOR_RTC 32768
+#else
+  #error Unknown oscillator frequencies
+#endif
+
+/**
+ * @brief Returns the CPU clock frequency in [Hz].
+ */
+unsigned lpc24xx_cclk( void)
+{
+  unsigned clksrc = GET_CLKSRCSEL_CLKSRC( CLKSRCSEL);
+  unsigned pllinclk = 0;
+  unsigned pllclk = 0;
+  unsigned cclk = 0;
+
+  /* Get PLL input frequency */
+  switch (clksrc) {
+    case 0:
+      pllinclk = LPC24XX_OSCILLATOR_INTERNAL;
+      break;
+    case 1:
+      pllinclk = LPC24XX_OSCILLATOR_MAIN;
+      break;
+    case 2:
+      pllinclk = LPC24XX_OSCILLATOR_RTC;
+      break;
+    default:
+      while (1) {
+        /* Spin forever */
+      }
+      return 0;
+  }
+
+  /* Get PLL output frequency */
+  if (REG_FLAG_IS_SET( PLLSTAT, PLLSTAT_PLLC)) {
+    uint32_t pllcfg = PLLCFG;
+    unsigned n = GET_PLLCFG_NSEL( pllcfg) + 1;
+    unsigned m = GET_PLLCFG_MSEL( pllcfg) + 1;
+
+    pllclk = (pllinclk / n) * 2 * m;
+  } else {
+    pllclk = pllinclk;
+  }
+
+  /* Get CPU clock frequency */
+  cclk = pllclk / (GET_CCLKCFG_CCLKSEL( CCLKCFG) + 1);
+
+  return cclk;
+}
+
+static void lpc24xx_pll_config( uint32_t val)
+{
+  PLLCON = val;
+  PLLFEED = 0xaa;
+  PLLFEED = 0x55;
+}
+
+/**
+ * @brief Sets the Phase Locked Loop (PLL).
+ *
+ * @param clksrc Selects the clock source for the PLL.
+ *
+ * @param nsel Selects PLL pre-divider value (sometimes named psel).
+ *
+ * @param msel Selects PLL multiplier value.
+ *
+ * @param cclksel Selects the divide value for creating the CPU clock (CCLK)
+ * from the PLL output.
+ *
+ * @note All parameter values are the actual register field values.
+ */
+void lpc24xx_set_pll( unsigned clksrc, unsigned nsel, unsigned msel, unsigned cclksel)
+{
+  bool pll_enabled = REG_FLAG_IS_SET( PLLSTAT, PLLSTAT_PLLE);
+
+  /* Disconnect PLL if necessary */
+  if (REG_FLAG_IS_SET( PLLSTAT, PLLSTAT_PLLC)) {
+    if (pll_enabled) {
+      lpc24xx_pll_config( PLLCON_PLLE);
+    } else {
+      lpc24xx_pll_config( 0);
+    }
+  }
+
+  /* Set CPU clock divider to a reasonable save value */
+  CCLKCFG = SET_CCLKCFG_CCLKSEL( 0, 1);
+
+  /* Disable PLL if necessary */
+  if (pll_enabled) {
+    lpc24xx_pll_config( 0);
+  }
+
+  /* Select clock source */
+  CLKSRCSEL = SET_CLKSRCSEL_CLKSRC( 0, clksrc);
+
+  /* Set PLL Configuration Register */
+  PLLCFG = SET_PLLCFG_NSEL( 0, nsel) | SET_PLLCFG_MSEL( 0, msel);
+
+  /* Enable PLL */
+  lpc24xx_pll_config( PLLCON_PLLE);
+
+  /* Wait for lock */
+  while (REG_FLAG_IS_CLEARED( PLLSTAT, PLLSTAT_PLOCK)) {
+    /* Wait */
+  }
+
+  /* Set CPU clock divider and ensure that we have an odd value */
+  CCLKCFG = SET_CCLKCFG_CCLKSEL( 0, cclksel | 1);
+
+  /* Connect PLL */
+  lpc24xx_pll_config( PLLCON_PLLE | PLLCON_PLLC);
+}

c/src/lib/libbsp/arm/lpc24xx/preinstall.am

@@ -0,0 +1,96 @@
+## Automatically generated by ampolish3 - Do not edit
+
+if AMPOLISH3
+$(srcdir)/preinstall.am: Makefile.am
+	$(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
+endif
+
+PREINSTALL_DIRS =
+DISTCLEANFILES = $(PREINSTALL_DIRS)
+
+all-local: $(TMPINSTALL_FILES)
+
+TMPINSTALL_FILES =
+CLEANFILES = $(TMPINSTALL_FILES)
+
+all-am: $(PREINSTALL_FILES)
+
+PREINSTALL_FILES =
+CLEANFILES += $(PREINSTALL_FILES)
+
+$(PROJECT_LIB)/$(dirstamp):
+	@$(MKDIR_P) $(PROJECT_LIB)
+	@: > $(PROJECT_LIB)/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
+
+$(PROJECT_INCLUDE)/$(dirstamp):
+	@$(MKDIR_P) $(PROJECT_INCLUDE)
+	@: > $(PROJECT_INCLUDE)/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
+
+$(PROJECT_INCLUDE)/bsp/$(dirstamp):
+	@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
+	@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+
+../../../libcpu/@RTEMS_CPU@/$(dirstamp):
+	@$(MKDIR_P) ../../../libcpu/@RTEMS_CPU@
+	@: > ../../../libcpu/@RTEMS_CPU@/$(dirstamp)
+PREINSTALL_DIRS += ../../../libcpu/@RTEMS_CPU@/$(dirstamp)
+
+$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
+
+$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
+
+$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
+
+$(PROJECT_INCLUDE)/bsp/tod.h: ../../shared/tod.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/tod.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/tod.h
+
+$(PROJECT_INCLUDE)/bsp/linker-symbols.h: ../shared/include/linker-symbols.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/linker-symbols.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/linker-symbols.h
+
+$(PROJECT_INCLUDE)/bsp/start.h: ../shared/include/start.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/start.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/start.h
+
+$(PROJECT_INCLUDE)/bsp/irq-config.h: include/irq-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-config.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-config.h
+
+$(PROJECT_INCLUDE)/bsp/irq.h: include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
+
+$(PROJECT_INCLUDE)/bsp/lpc24xx.h: include/lpc24xx.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc24xx.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc24xx.h
+
+$(PROJECT_INCLUDE)/bsp/system-clocks.h: include/system-clocks.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/system-clocks.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/system-clocks.h
+
+$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
+TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
+
+$(PROJECT_LIB)/linkcmds.base: ../shared/startup/linkcmds.base $(PROJECT_LIB)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.base
+PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.base
+
+$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
+PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
+
+$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
+PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
+

c/src/lib/libbsp/arm/lpc24xx/rtc/rtc-config.c

@@ -0,0 +1,93 @@
+/**
+ * @file
+ *
+ * @ingroup lpc24xx
+ *
+ * @brief RTC configuration.
+ */
+
+/*
+ * Copyright (c) 2008
+ * Embedded Brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * rtems@embedded-brains.de
+ *
+ * The license and distribution terms for this file may be found in the file
+ * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
+ */
+
+#include <libchip/rtc.h>
+
+#include <bsp/lpc24xx.h>
+
+#define LPC24XX_RTC_NUMBER 1
+
+static void lpc24xx_rtc_initialize( int minor)
+{
+  /* Enable the RTC and use external clock */
+  RTC_CCR = RTC_CCR_CLKEN | RTC_CCR_CLKSRC;
+
+  /* Disable interrupts */
+  RTC_CIIR = 0;
+  RTC_CISS = 0;
+  RTC_AMR = 0xff;
+
+  /* Clear interrupts */
+  RTC_ILR = RTC_ILR_RTCCIF | RTC_ILR_RTCALF | RTC_ILR_RTSSF;
+}
+
+static int lpc24xx_rtc_get_time( int minor, rtems_time_of_day *tod)
+{
+  tod->ticks = 0;
+  tod->second = RTC_SEC;
+  tod->minute = RTC_MIN;
+  tod->hour = RTC_HOUR;
+  tod->day = RTC_DOM;
+  tod->month = RTC_MONTH;
+  tod->year = RTC_YEAR;
+
+  return 0;
+}
+
+static int lpc24xx_rtc_set_time( int minor, const rtems_time_of_day *tod)
+{
+  RTC_SEC = tod->second;
+  RTC_MIN = tod->minute;
+  RTC_HOUR = tod->hour;
+  RTC_DOM = tod->day;
+  RTC_MONTH = tod->month;
+  RTC_YEAR = tod->year;
+
+  return 0;
+}
+
+static bool lpc24xx_rtc_probe( int minor)
+{
+  return true;
+}
+
+const rtc_fns lpc24xx_rtc_ops = {
+  .deviceInitialize = lpc24xx_rtc_initialize,
+  .deviceGetTime = lpc24xx_rtc_get_time,
+  .deviceSetTime = lpc24xx_rtc_set_time
+};
+
+unsigned long RTC_Count = LPC24XX_RTC_NUMBER;
+
+rtems_device_minor_number RTC_Minor = 0;
+
+rtc_tbl	RTC_Table [LPC24XX_RTC_NUMBER] = {
+  {
+    .sDeviceName = "/dev/rtc",
+    .deviceType = RTC_CUSTOM,
+    .pDeviceFns = &lpc24xx_rtc_ops,
+    .deviceProbe = lpc24xx_rtc_probe,
+    .pDeviceParams = NULL,
+    .ulCtrlPort1 = 0,
+    .ulDataPort = 0,
+    .getRegister = NULL,
+    .setRegister = NULL
+  }
+};

c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c

@@ -0,0 +1,88 @@
+/**
+ * @file
+ *
+ * @ingroup lpc24xx
+ *
+ * @brief Startup code.
+ */
+
+/*
+ * Copyright (c) 2008
+ * Embedded Brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * rtems@embedded-brains.de
+ *
+ * The license and distribution terms for this file may be found in the file
+ * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
+ */
+
+#include <string.h>
+
+#include <bsp.h>
+#include <bsp/bootcard.h>
+#include <bsp/irq.h>
+#include <bsp/linker-symbols.h>
+#include <bsp/lpc24xx.h>
+#include <bsp/start.h>
+#include <bsp/system-clocks.h>
+
+void bsp_start_hook_0( void)
+{
+  /* Re-map interrupt vectors to internal RAM */
+  SET_MEMMAP_MAP( MEMMAP, 2);
+}
+
+void bsp_start_hook_1( void)
+{
+  unsigned zero = 0;
+  unsigned *out = bsp_section_bss_start;
+
+  /* Clear BSS */
+  while (out < bsp_section_bss_end) {
+    *out = zero;
+    ++out;
+  }
+}
+
+void bsp_start( void)
+{
+  printk( "CPU Clock: %u\n", lpc24xx_cclk());
+
+  /* Exceptions */
+  rtems_exception_init_mngt();
+
+  /* Interrupts */
+  if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
+    /* FIXME */
+    printk( "Cannot intitialize interrupt support\n");
+    while (1) {
+      /* Spin forever */
+    }
+  }
+}
+
+void bsp_reset( void)
+{
+  /* Do nothing */
+}
+
+#define ULSR_THRE 0x00000020U
+
+static void my_BSP_output_char( char c)
+{
+  while (REG_FLAG_IS_CLEARED( U0LSR, ULSR_THRE)) {
+    /* Wait */
+  }
+  U0THR = c;
+
+  if (c == '\n') {
+    while (REG_FLAG_IS_CLEARED( U0LSR, ULSR_THRE)) {
+      /* Wait */
+    }
+    U0THR = '\r';
+  }
+}
+
+BSP_output_char_function_type BSP_output_char = my_BSP_output_char;