forked from Imagelibrary/rtems
@@ -1,81 +0,0 @@
|
||||
MVME147
|
||||
=======
|
||||
|
||||
MVME147 port for TNI - Telecom Bretagne
|
||||
by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
|
||||
May 1996
|
||||
|
||||
|
||||
This bsp is essentially based on the mvme136 bsp.
|
||||
|
||||
Summary
|
||||
-------
|
||||
* include
|
||||
|
||||
- bsp.h
|
||||
Peripheral Channel Controller memory mapping
|
||||
Z8530 memory mapping
|
||||
|
||||
* startup
|
||||
|
||||
- bspstart.c
|
||||
main () setup for VME roundrobin mode
|
||||
setup for the PCC interrupt vector base
|
||||
- bspclean.c
|
||||
bsp_cleanup () disable timer 1 & 2 interruptions
|
||||
- linkcmds set the RAM start (0x5000) and size (4Meg - 0x5000)
|
||||
- setvec.c unchanged
|
||||
- sbrk.c unchanged
|
||||
|
||||
* console
|
||||
|
||||
- console.c taken from the dmv152 bsp (Zilog Z8530)
|
||||
with no modification
|
||||
|
||||
* clock
|
||||
|
||||
- ckinit.c entirely rewritten for the PCC tick timer 2
|
||||
|
||||
* timer
|
||||
|
||||
- timerisr.s and timer.c
|
||||
entirely rewritten for the PCC tick timer 1
|
||||
now gives results un 6.25 us units (mininum timer delay,
|
||||
suprising big grain)
|
||||
|
||||
* times
|
||||
|
||||
- updated results for the mvme147 (beware of the 6.25 us grain)
|
||||
|
||||
* Makefiles
|
||||
|
||||
- compilation of shmsupp simply removed
|
||||
|
||||
|
||||
To be done:
|
||||
|
||||
* add VMEchip memory mapping to include/bsp.h
|
||||
|
||||
* update the overheads in coverhead.h
|
||||
|
||||
* add support for serila ports 2,3 and 4.
|
||||
|
||||
Other notes:
|
||||
|
||||
* There is no MP support (no more shmsupp) because I have no
|
||||
experience of the VME bus. The mvme136 shared memory support
|
||||
does not seem applicable on the VMEchip of the mvme147, so
|
||||
I don't know where to start. Suggestions are welcome.
|
||||
|
||||
* All the timing tests and sp tests have been run.
|
||||
|
||||
|
||||
Future work
|
||||
-----------
|
||||
* Add gdb serial remote support.
|
||||
|
||||
* Shared memory support (I don't really need it, but I can do
|
||||
it if it's simple).
|
||||
|
||||
* Message passing on VME bus, with Ada 95 annex E (distributed
|
||||
systems) in mind.
|
||||
@@ -1,86 +0,0 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* MVME147 port for TNI - Telecom Bretagne
|
||||
* by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
|
||||
* May 1996
|
||||
*/
|
||||
|
||||
#include <rtems/btimer.h>
|
||||
#include <bsp.h>
|
||||
|
||||
#define TIMER_INT_LEVEL 6
|
||||
|
||||
#define COUNTDOWN_VALUE 0
|
||||
/* Allows 0.4096 second delay betwin ints */
|
||||
/* Each tick is 6.25 us */
|
||||
|
||||
int Ttimer_val;
|
||||
bool benchmark_timer_find_average_overhead;
|
||||
|
||||
rtems_isr timerisr(rtems_vector_number);
|
||||
|
||||
void benchmark_timer_initialize(void)
|
||||
{
|
||||
(void) set_vector(timerisr, TIMER_1_VECTOR, 0); /* install ISR */
|
||||
|
||||
Ttimer_val = 0; /* clear timer ISR count */
|
||||
pcc->timer1_int_control = 0x00; /* Disable T1 Interr. */
|
||||
pcc->timer1_preload = COUNTDOWN_VALUE;
|
||||
/* write countdown preload value */
|
||||
pcc->timer1_control = 0x00; /* load preload value */
|
||||
pcc->timer1_control = 0x07; /* clear T1 overflow counter, enable counter */
|
||||
pcc->timer1_int_control = TIMER_INT_LEVEL|0x08;
|
||||
/* Enable Timer 1 and set its int. level */
|
||||
|
||||
}
|
||||
|
||||
#define AVG_OVERHEAD 0 /* No need to start/stop the timer to read
|
||||
its value on the MVME147 PCC: reads are not
|
||||
synchronized whith the counter updates*/
|
||||
#define LEAST_VALID 10 /* Don't trust a value lower than this */
|
||||
|
||||
benchmark_timer_t benchmark_timer_read(void)
|
||||
{
|
||||
uint32_t total;
|
||||
uint16_t counter_value;
|
||||
|
||||
counter_value = pcc->timer1_count; /* read the counter value */
|
||||
|
||||
total = ((Ttimer_val * 0x10000) + counter_value); /* in 6.25 us units */
|
||||
/* DC note : just look at the assembly generated
|
||||
to see gcc's impressive optimization ! */
|
||||
return total;
|
||||
|
||||
}
|
||||
|
||||
void benchmark_timer_disable_subtracting_average_overhead(
|
||||
bool find_flag
|
||||
)
|
||||
{
|
||||
benchmark_timer_find_average_overhead = find_flag;
|
||||
}
|
||||
@@ -1,26 +0,0 @@
|
||||
/* timer_isr()
|
||||
*
|
||||
* This routine provides the ISR for the PCC timer on the MVME147
|
||||
* board. The timer is set up to generate an interrupt at maximum
|
||||
* intervals.
|
||||
*
|
||||
* MVME147 port for TNI - Telecom Bretagne
|
||||
* by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
|
||||
* May 1996
|
||||
*/
|
||||
|
||||
#include <rtems/asm.h>
|
||||
|
||||
BEGIN_CODE
|
||||
|
||||
.set T1_CONTROL_REGISTER, 0xfffe1018 | timer 1 control register
|
||||
|
||||
PUBLIC (timerisr)
|
||||
SYM (timerisr):
|
||||
orb #0x80, T1_CONTROL_REGISTER | clear T1 int status bit
|
||||
addql #1, SYM (Ttimer_val) | increment timer value
|
||||
end_timerisr:
|
||||
rte
|
||||
|
||||
END_CODE
|
||||
END
|
||||
@@ -1,95 +0,0 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/*
|
||||
* This routine initializes the Tick Timer 2 on the MVME147 board.
|
||||
* The tick frequency is 1 millisecond.
|
||||
*/
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* MVME147 port for TNI - Telecom Bretagne
|
||||
* by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
|
||||
* May 1996
|
||||
*/
|
||||
|
||||
#include <stdlib.h>
|
||||
|
||||
#include <bsp.h>
|
||||
#include <rtems/clockdrv.h>
|
||||
|
||||
#define MS_COUNT 65376 /* 1ms */
|
||||
/* MS_COUNT = 0x10000 - 1e-3/6.25e-6 */
|
||||
#define CLOCK_INT_LEVEL 6 /* T2's interrupt level */
|
||||
|
||||
uint32_t Clock_isrs; /* ISRs until next tick */
|
||||
volatile uint32_t Clock_driver_ticks; /* ticks since initialization */
|
||||
rtems_isr_entry Old_ticker;
|
||||
|
||||
static void Clock_exit( void );
|
||||
|
||||
/*
|
||||
* ISR Handler
|
||||
*/
|
||||
static rtems_isr Clock_isr(rtems_vector_number vector)
|
||||
{
|
||||
Clock_driver_ticks += 1;
|
||||
pcc->timer2_int_control |= 0x80; /* Acknowledge interr. */
|
||||
|
||||
if (Clock_isrs == 1) {
|
||||
rtems_clock_tick();
|
||||
Clock_isrs = rtems_configuration_get_microseconds_per_tick() / 1000;
|
||||
}
|
||||
else
|
||||
Clock_isrs -= 1;
|
||||
}
|
||||
|
||||
static void Install_clock(rtems_isr_entry clock_isr )
|
||||
{
|
||||
|
||||
Clock_driver_ticks = 0;
|
||||
Clock_isrs = rtems_configuration_get_microseconds_per_tick() / 1000;
|
||||
|
||||
Old_ticker = (rtems_isr_entry) set_vector( clock_isr, TIMER_2_VECTOR, 1 );
|
||||
|
||||
pcc->timer2_int_control = 0x00; /* Disable T2 Interr. */
|
||||
pcc->timer2_preload = MS_COUNT;
|
||||
/* write preload value */
|
||||
pcc->timer2_control = 0x07; /* clear T2 overflow counter, enable counter */
|
||||
pcc->timer2_int_control = CLOCK_INT_LEVEL|0x08;
|
||||
/* Enable Timer 2 and set its int. level */
|
||||
|
||||
atexit( Clock_exit );
|
||||
}
|
||||
|
||||
void Clock_exit( void )
|
||||
{
|
||||
pcc->timer2_int_control = 0x00; /* Disable T2 Interr. */
|
||||
}
|
||||
|
||||
void _Clock_Initialize( void )
|
||||
{
|
||||
Install_clock( Clock_isr );
|
||||
}
|
||||
@@ -1,17 +0,0 @@
|
||||
#
|
||||
# Config file for the mvme147 BSP
|
||||
#
|
||||
|
||||
include $(RTEMS_ROOT)/make/custom/default.cfg
|
||||
|
||||
RTEMS_CPU=m68k
|
||||
|
||||
# This contains the compiler options necessary to select the CPU model
|
||||
# and (hopefully) optimize for it.
|
||||
CPU_CFLAGS = -mcpu=68030
|
||||
|
||||
# optimize flag: typically -O2
|
||||
CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer
|
||||
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
|
||||
|
||||
LDFLAGS = -Wl,--gc-sections
|
||||
@@ -1,222 +0,0 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/*
|
||||
* This file contains the MVME147 console IO package.
|
||||
*/
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* MVME147 port for TNI - Telecom Bretagne
|
||||
* by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
|
||||
* May 1996
|
||||
*
|
||||
* This file was taken from the DMV152 bsp
|
||||
*/
|
||||
|
||||
#define M147_INIT
|
||||
|
||||
#include <rtems/console.h>
|
||||
#include <rtems/libio.h>
|
||||
#include <rtems/zilog/z8530.h>
|
||||
#include <rtems/iosupp.h>
|
||||
#include <bsp.h>
|
||||
|
||||
/* console_initialize
|
||||
*
|
||||
* This routine initializes the console IO driver.
|
||||
*/
|
||||
rtems_device_driver console_initialize(
|
||||
rtems_device_major_number major,
|
||||
rtems_device_minor_number minor,
|
||||
void *arg
|
||||
)
|
||||
{
|
||||
rtems_status_code status;
|
||||
|
||||
status = rtems_io_register_name(
|
||||
"/dev/console",
|
||||
major,
|
||||
(rtems_device_minor_number) 0
|
||||
);
|
||||
|
||||
if (status != RTEMS_SUCCESSFUL)
|
||||
rtems_fatal_error_occurred(status);
|
||||
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
/* inbyte
|
||||
*
|
||||
* This routine reads a character from the SCC.
|
||||
*/
|
||||
static char inbyte( void )
|
||||
{
|
||||
uint8_t rr_0;
|
||||
char ch;
|
||||
|
||||
for ( ; ; ) {
|
||||
Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
|
||||
if ( (rr_0 & RR_0_RX_DATA_AVAILABLE) != 0 )
|
||||
break;
|
||||
}
|
||||
|
||||
Z8x30_READ_DATA( CONSOLE_DATA, ch );
|
||||
return ( ch );
|
||||
}
|
||||
|
||||
/* outbyte
|
||||
*
|
||||
* This routine transmits a character out the SCC. It supports
|
||||
* XON/XOFF flow control.
|
||||
*/
|
||||
static void outbyte(
|
||||
char ch
|
||||
)
|
||||
{
|
||||
uint8_t rr_0;
|
||||
char flow_control;
|
||||
|
||||
for ( ; ; ) {
|
||||
Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
|
||||
if ( (rr_0 & RR_0_TX_BUFFER_EMPTY) != 0 )
|
||||
break;
|
||||
}
|
||||
|
||||
for ( ; ; ) {
|
||||
Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
|
||||
if ( (rr_0 & RR_0_RX_DATA_AVAILABLE) == 0 )
|
||||
break;
|
||||
|
||||
Z8x30_READ_DATA( CONSOLE_DATA, flow_control );
|
||||
|
||||
if ( flow_control == XOFF )
|
||||
do {
|
||||
do {
|
||||
Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
|
||||
} while ( (rr_0 & RR_0_RX_DATA_AVAILABLE) == 0 );
|
||||
Z8x30_READ_DATA( CONSOLE_DATA, flow_control );
|
||||
} while ( flow_control != XON );
|
||||
}
|
||||
|
||||
Z8x30_WRITE_DATA( CONSOLE_DATA, ch );
|
||||
}
|
||||
|
||||
/*
|
||||
* Open entry point
|
||||
*/
|
||||
rtems_device_driver console_open(
|
||||
rtems_device_major_number major,
|
||||
rtems_device_minor_number minor,
|
||||
void * arg
|
||||
)
|
||||
{
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Close entry point
|
||||
*/
|
||||
rtems_device_driver console_close(
|
||||
rtems_device_major_number major,
|
||||
rtems_device_minor_number minor,
|
||||
void * arg
|
||||
)
|
||||
{
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
/*
|
||||
* read bytes from the serial port. We only have stdin.
|
||||
*/
|
||||
rtems_device_driver console_read(
|
||||
rtems_device_major_number major,
|
||||
rtems_device_minor_number minor,
|
||||
void * arg
|
||||
)
|
||||
{
|
||||
rtems_libio_rw_args_t *rw_args;
|
||||
char *buffer;
|
||||
int maximum;
|
||||
int count = 0;
|
||||
|
||||
rw_args = (rtems_libio_rw_args_t *) arg;
|
||||
|
||||
buffer = rw_args->buffer;
|
||||
maximum = rw_args->count;
|
||||
|
||||
for (count = 0; count < maximum; count++) {
|
||||
buffer[ count ] = inbyte();
|
||||
if (buffer[ count ] == '\n' || buffer[ count ] == '\r') {
|
||||
buffer[ count++ ] = '\n';
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
rw_args->bytes_moved = count;
|
||||
return (count >= 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED;
|
||||
}
|
||||
|
||||
/*
|
||||
* write bytes to the serial port. Stdout and stderr are the same.
|
||||
*/
|
||||
rtems_device_driver console_write(
|
||||
rtems_device_major_number major,
|
||||
rtems_device_minor_number minor,
|
||||
void * arg
|
||||
)
|
||||
{
|
||||
int count;
|
||||
int maximum;
|
||||
rtems_libio_rw_args_t *rw_args;
|
||||
char *buffer;
|
||||
|
||||
rw_args = (rtems_libio_rw_args_t *) arg;
|
||||
|
||||
buffer = rw_args->buffer;
|
||||
maximum = rw_args->count;
|
||||
|
||||
for (count = 0; count < maximum; count++) {
|
||||
if ( buffer[ count ] == '\n') {
|
||||
outbyte('\r');
|
||||
}
|
||||
outbyte( buffer[ count ] );
|
||||
}
|
||||
|
||||
rw_args->bytes_moved = maximum;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* IO Control entry point
|
||||
*/
|
||||
rtems_device_driver console_control(
|
||||
rtems_device_major_number major,
|
||||
rtems_device_minor_number minor,
|
||||
void * arg
|
||||
)
|
||||
{
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
@@ -1,156 +0,0 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup RTEMSBSPsM68kMVME147
|
||||
*
|
||||
* @brief Global BSP definitions.
|
||||
*/
|
||||
|
||||
/* bsp.h
|
||||
*
|
||||
* This include file contains all MVME147 board IO definitions.
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* MVME147 port for TNI - Telecom Bretagne
|
||||
* by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
|
||||
* May 1996
|
||||
*/
|
||||
|
||||
#ifndef LIBBSP_M68K_MVME147_BSP_H
|
||||
#define LIBBSP_M68K_MVME147_BSP_H
|
||||
|
||||
/**
|
||||
* @defgroup RTEMSBSPsM68kMVME147 MVME147
|
||||
*
|
||||
* @ingroup RTEMSBSPsM68k
|
||||
*
|
||||
* @brief MVME147 Board Support Package.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include <bspopts.h>
|
||||
#include <bsp/default-initial-extension.h>
|
||||
|
||||
#include <rtems.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Constants */
|
||||
|
||||
#define RAM_START 0x00005000
|
||||
#define RAM_END 0x00400000
|
||||
|
||||
/* MVME 147 Peripheral controller chip
|
||||
see MVME147/D1, 3.4 */
|
||||
|
||||
struct pcc_map {
|
||||
/* 32 bit registers */
|
||||
uint32_t dma_table_address; /* 0xfffe1000 */
|
||||
uint32_t dma_data_address; /* 0xfffe1004 */
|
||||
uint32_t dma_bytecount; /* 0xfffe1008 */
|
||||
uint32_t dma_data_holding; /* 0xfffe100c */
|
||||
|
||||
/* 16 bit registers */
|
||||
uint16_t timer1_preload; /* 0xfffe1010 */
|
||||
uint16_t timer1_count; /* 0xfffe1012 */
|
||||
uint16_t timer2_preload; /* 0xfffe1014 */
|
||||
uint16_t timer2_count; /* 0xfffe1016 */
|
||||
|
||||
/* 8 bit registers */
|
||||
uint8_t timer1_int_control; /* 0xfffe1018 */
|
||||
uint8_t timer1_control; /* 0xfffe1019 */
|
||||
uint8_t timer2_int_control; /* 0xfffe101a */
|
||||
uint8_t timer2_control; /* 0xfffe101b */
|
||||
|
||||
uint8_t acfail_int_control; /* 0xfffe101c */
|
||||
uint8_t watchdog_control; /* 0xfffe101d */
|
||||
|
||||
uint8_t printer_int_control; /* 0xfffe101e */
|
||||
uint8_t printer_control; /* 0xfffe102f */
|
||||
|
||||
uint8_t dma_int_control; /* 0xfffe1020 */
|
||||
uint8_t dma_control; /* 0xfffe1021 */
|
||||
uint8_t bus_error_int_control; /* 0xfffe1022 */
|
||||
uint8_t dma_status; /* 0xfffe1023 */
|
||||
uint8_t abort_int_control; /* 0xfffe1024 */
|
||||
uint8_t table_address_function_code; /* 0xfffe1025 */
|
||||
uint8_t serial_port_int_control; /* 0xfffe1026 */
|
||||
uint8_t general_purpose_control; /* 0xfffe1027 */
|
||||
uint8_t lan_int_control; /* 0xfffe1028 */
|
||||
uint8_t general_purpose_status; /* 0xfffe1029 */
|
||||
uint8_t scsi_port_int_control; /* 0xfffe102a */
|
||||
uint8_t slave_base_address; /* 0xfffe102b */
|
||||
uint8_t software_int_1_control; /* 0xfffe102c */
|
||||
uint8_t int_base_vector; /* 0xfffe102d */
|
||||
uint8_t software_int_2_control; /* 0xfffe102e */
|
||||
uint8_t revision_level; /* 0xfffe102f */
|
||||
};
|
||||
|
||||
#define pcc ((volatile struct pcc_map * const) 0xfffe1000)
|
||||
|
||||
#define z8530 0xfffe3001
|
||||
|
||||
/* interrupt vectors - see MVME146/D1 4.14 */
|
||||
#define PCC_BASE_VECTOR 0x40 /* First user int */
|
||||
#define SCC_VECTOR PCC_BASE_VECTOR+3
|
||||
#define TIMER_1_VECTOR PCC_BASE_VECTOR+8
|
||||
#define TIMER_2_VECTOR PCC_BASE_VECTOR+9
|
||||
#define SOFT_1_VECTOR PCC_BASE_VECTOR+10
|
||||
#define SOFT_2_VECTOR PCC_BASE_VECTOR+11
|
||||
|
||||
#define USE_CHANNEL_A 1 /* 1 = use channel A for console */
|
||||
#define USE_CHANNEL_B 0 /* 1 = use channel B for console */
|
||||
|
||||
#if (USE_CHANNEL_A == 1)
|
||||
#define CONSOLE_CONTROL 0xfffe3002
|
||||
#define CONSOLE_DATA 0xfffe3003
|
||||
#elif (USE_CHANNEL_B == 1)
|
||||
#define CONSOLE_CONTROL 0xfffe3000
|
||||
#define CONSOLE_DATA 0xfffe3001
|
||||
#endif
|
||||
|
||||
extern rtems_isr_entry M68Kvec[]; /* vector table address */
|
||||
|
||||
/* functions */
|
||||
|
||||
rtems_isr_entry set_vector(
|
||||
rtems_isr_entry handler,
|
||||
rtems_vector_number vector,
|
||||
int type
|
||||
);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif
|
||||
@@ -1 +0,0 @@
|
||||
#include <bsp/irq-default.h>
|
||||
@@ -1,40 +0,0 @@
|
||||
/*
|
||||
* @file
|
||||
* @ingroup m68k_mvme147
|
||||
* @brief Implementations for interrupt mechanisms for Time Test 27
|
||||
*/
|
||||
|
||||
/*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifndef _RTEMS_TMTEST27
|
||||
#error "This is an RTEMS internal file you must not include directly."
|
||||
#endif
|
||||
|
||||
#ifndef __tm27_h
|
||||
#define __tm27_h
|
||||
|
||||
/*
|
||||
* Define the interrupt mechanism for Time Test 27
|
||||
*
|
||||
* NOTE: Use the MPCSR vector for the MVME147
|
||||
*/
|
||||
|
||||
#define MUST_WAIT_FOR_INTERRUPT 0
|
||||
|
||||
#define TM27_USE_VECTOR_HANDLER
|
||||
|
||||
#define Install_tm27_vector( handler ) set_vector( (handler), \
|
||||
SOFT_1_VECTOR, 1 )
|
||||
|
||||
#define Cause_tm27_intr() pcc->software_int_1_control = 0x0c
|
||||
/* generate level 4 sotware int. */
|
||||
|
||||
#define Clear_tm27_intr() pcc->software_int_1_control = 0x00
|
||||
|
||||
#define Lower_tm27_intr() /* empty */
|
||||
|
||||
#endif
|
||||
@@ -1,68 +0,0 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/*
|
||||
* This routine returns control to 147Bug.
|
||||
*/
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 1989-2014.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* MVME147 port for TNI - Telecom Bretagne
|
||||
* by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
|
||||
* May 1996
|
||||
*/
|
||||
|
||||
#include <bsp.h>
|
||||
#include <bsp/bootcard.h>
|
||||
|
||||
extern void start(void);
|
||||
|
||||
static rtems_isr bsp_return_to_monitor_trap(
|
||||
rtems_vector_number vector
|
||||
)
|
||||
{
|
||||
register volatile void *start_addr;
|
||||
|
||||
m68k_set_vbr( 0 ); /* restore 147Bug vectors */
|
||||
__asm__ volatile( "trap #15" ); /* trap to 147Bug */
|
||||
__asm__ volatile( ".short 0x63" ); /* return to 147Bug (.RETURN) */
|
||||
/* restart program */
|
||||
start_addr = start;
|
||||
|
||||
__asm__ volatile ( "jmp %0@" : "=a" (start_addr) : "0" (start_addr) );
|
||||
}
|
||||
|
||||
void bsp_reset( rtems_fatal_source source, rtems_fatal_code code )
|
||||
{
|
||||
(void) source;
|
||||
(void) code;
|
||||
|
||||
pcc->timer1_int_control = 0; /* Disable Timer 1 */
|
||||
pcc->timer2_int_control = 0; /* Disable Timer 2 */
|
||||
|
||||
M68Kvec[ 45 ] = bsp_return_to_monitor_trap; /* install handler */
|
||||
__asm__ volatile( "trap #13" ); /* ensures SUPV mode */
|
||||
RTEMS_UNREACHABLE();
|
||||
}
|
||||
@@ -1,64 +0,0 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/*
|
||||
* This routine does the bulk of the system initialization.
|
||||
*/
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* MVME147 port for TNI - Telecom Bretagne
|
||||
* by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
|
||||
* May 1996
|
||||
*/
|
||||
|
||||
#include <bsp.h>
|
||||
#include <bsp/bootcard.h>
|
||||
|
||||
void bsp_start( void )
|
||||
{
|
||||
rtems_isr_entry *monitors_vector_table;
|
||||
int index;
|
||||
|
||||
monitors_vector_table = (rtems_isr_entry *)0; /* 135Bug Vectors are at 0 */
|
||||
m68k_set_vbr( monitors_vector_table );
|
||||
|
||||
for ( index=2 ; index<=255 ; index++ )
|
||||
M68Kvec[ index ] = monitors_vector_table[ 32 ];
|
||||
|
||||
M68Kvec[ 2 ] = monitors_vector_table[ 2 ]; /* bus error vector */
|
||||
M68Kvec[ 4 ] = monitors_vector_table[ 4 ]; /* breakpoints vector */
|
||||
M68Kvec[ 9 ] = monitors_vector_table[ 9 ]; /* trace vector */
|
||||
M68Kvec[ 47 ] = monitors_vector_table[ 47 ]; /* system call vector */
|
||||
|
||||
m68k_set_vbr( &M68Kvec );
|
||||
|
||||
pcc->int_base_vector = PCC_BASE_VECTOR; /* Set the PCC int vectors base */
|
||||
|
||||
(*(uint8_t*)0xfffe2001) = 0x08; /* make VME access round-robin */
|
||||
|
||||
rtems_cache_enable_instruction();
|
||||
rtems_cache_enable_data();
|
||||
}
|
||||
@@ -1,49 +0,0 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/*
|
||||
* This file contains directives for the GNU linker which are specific
|
||||
* to the Motorola MVME147 boards.
|
||||
*/
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 1989-2007,2016.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* MVME147 port for TNI - Telecom Bretagne
|
||||
* by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
|
||||
* May 1996
|
||||
*/
|
||||
|
||||
MEMORY
|
||||
{
|
||||
bootrom_reserved : ORIGIN = 0x00000000, LENGTH = 0x5000
|
||||
ram : ORIGIN = 0x00005000, LENGTH = 4M - 0x5000
|
||||
}
|
||||
|
||||
REGION_ALIAS ("REGION_TEXT", ram);
|
||||
REGION_ALIAS ("REGION_TEXT_LOAD", ram);
|
||||
REGION_ALIAS ("REGION_DATA", ram);
|
||||
REGION_ALIAS ("REGION_DATA_LOAD", ram);
|
||||
|
||||
INCLUDE linkcmds.base
|
||||
@@ -1,18 +0,0 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-string: null
|
||||
- split: null
|
||||
- env-append: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2020 embedded brains GmbH & Co. KG
|
||||
default:
|
||||
- enabled-by: true
|
||||
value:
|
||||
- -mcpu=68030
|
||||
description: |
|
||||
ABI flags
|
||||
enabled-by: true
|
||||
links: []
|
||||
name: ABI_FLAGS
|
||||
type: build
|
||||
@@ -1,55 +0,0 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
arch: m68k
|
||||
bsp: mvme147
|
||||
build-type: bsp
|
||||
cflags: []
|
||||
copyrights:
|
||||
- Copyright (C) 2020 embedded brains GmbH & Co. KG
|
||||
cppflags: []
|
||||
enabled-by: true
|
||||
family: mvme147
|
||||
includes: []
|
||||
install:
|
||||
- destination: ${BSP_INCLUDEDIR}
|
||||
source:
|
||||
- bsps/m68k/mvme147/include/bsp.h
|
||||
- destination: ${BSP_INCLUDEDIR}/bsp
|
||||
source:
|
||||
- bsps/m68k/mvme147/include/bsp/irq.h
|
||||
- destination: ${BSP_LIBDIR}
|
||||
source:
|
||||
- bsps/m68k/mvme147/start/linkcmds
|
||||
- bsps/m68k/shared/start/linkcmds.base
|
||||
links:
|
||||
- role: build-dependency
|
||||
uid: ../grp
|
||||
- role: build-dependency
|
||||
uid: abi
|
||||
- role: build-dependency
|
||||
uid: ../start
|
||||
- role: build-dependency
|
||||
uid: ../../obj
|
||||
- role: build-dependency
|
||||
uid: ../../objirqdflt
|
||||
- role: build-dependency
|
||||
uid: ../../objmem
|
||||
- role: build-dependency
|
||||
uid: ../../opto2
|
||||
- role: build-dependency
|
||||
uid: ../../bspopts
|
||||
source:
|
||||
- bsps/m68k/mvme147/btimer/btimer.c
|
||||
- bsps/m68k/mvme147/btimer/timerisr.S
|
||||
- bsps/m68k/mvme147/clock/ckinit.c
|
||||
- bsps/m68k/mvme147/console/console.c
|
||||
- bsps/m68k/mvme147/start/bspclean.c
|
||||
- bsps/m68k/mvme147/start/bspstart.c
|
||||
- bsps/m68k/shared/cache/cache.c
|
||||
- bsps/m68k/shared/m68kidle.c
|
||||
- bsps/m68k/shared/memProbe.c
|
||||
- bsps/shared/dev/getentropy/getentropy-cpucounter.c
|
||||
- bsps/shared/dev/serial/printk-dummy.c
|
||||
- bsps/shared/start/gettargethash-default.c
|
||||
- bsps/shared/start/sbrk.c
|
||||
- bsps/shared/start/setvec.c
|
||||
type: build
|
||||
Reference in New Issue
Block a user