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riscv: Format assembler files

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Use tabs to match the GCC generated assembler output.

Update #3433.
This commit is contained in:
Sebastian Huber
2018-06-26 07:48:06 +02:00
parent fef0a414cf
commit 52f4fb65b3
5 changed files with 424 additions and 419 deletions
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5
bsps/riscv/riscv/start/start.S
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@@ -26,6 +26,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE. * SUCH DAMAGE.
*/ */
#include <bsp/linker-symbols.h> #include <bsp/linker-symbols.h>
#include <rtems/score/riscv-utility.h> #include <rtems/score/riscv-utility.h>
#include <rtems/score/cpu.h> #include <rtems/score/cpu.h>
@@ -40,7 +41,9 @@ PUBLIC(bsp_start_vector_table_begin)
PUBLIC(bsp_start_vector_table_end) PUBLIC(bsp_start_vector_table_end)
PUBLIC(_start) PUBLIC(_start)
.section .bsp_start_text, "wax" .section .bsp_start_text, "ax", @progbits
.align 2
TYPE_FUNC(_start) TYPE_FUNC(_start)
SYM(_start): SYM(_start):
la t0, ISR_Handler la t0, ISR_Handler

4
cpukit/score/cpu/riscv/riscv-context-switch.S
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@@ -33,8 +33,8 @@
#include <rtems/asm.h> #include <rtems/asm.h>
#include <rtems/score/cpu.h> #include <rtems/score/cpu.h>
.section .text, "ax" .section .text, "ax", @progbits
.align 4 .align 2
PUBLIC(_CPU_Context_switch) PUBLIC(_CPU_Context_switch)
PUBLIC(_CPU_Context_restore) PUBLIC(_CPU_Context_restore)

4
cpukit/score/cpu/riscv/riscv-context-validate.S
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@@ -30,8 +30,8 @@
#include <rtems/asm.h> #include <rtems/asm.h>
#include <rtems/score/cpu.h> #include <rtems/score/cpu.h>
.section .text .section .text, "ax", @progbits
.align 2
PUBLIC(_CPU_Context_validate) PUBLIC(_CPU_Context_validate)
SYM(_CPU_Context_validate): SYM(_CPU_Context_validate):

3
cpukit/score/cpu/riscv/riscv-context-volatile-clobber.S
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@@ -29,7 +29,8 @@
#include <rtems/asm.h> #include <rtems/asm.h>
.section .text .section .text, "ax", @progbits
.align 2
PUBLIC(_CPU_Context_volatile_clobber) PUBLIC(_CPU_Context_volatile_clobber)
SYM(_CPU_Context_volatile_clobber): SYM(_CPU_Context_volatile_clobber):

5
cpukit/score/cpu/riscv/riscv-exception-handler.S
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@@ -45,8 +45,9 @@ EXTERN(bsp_start_vector_table_begin)
EXTERN(_Thread_Dispatch) EXTERN(_Thread_Dispatch)
PUBLIC(ISR_Handler) PUBLIC(ISR_Handler)
.section .text, "ax" .section .text, "ax", @progbits
.align 4 .align 2
TYPE_FUNC(ISR_Handler) TYPE_FUNC(ISR_Handler)
SYM(ISR_Handler): SYM(ISR_Handler):
addi sp, sp, -1 * 36 * CPU_SIZEOF_POINTER addi sp, sp, -1 * 36 * CPU_SIZEOF_POINTER