forked from Imagelibrary/rtems
Removed RTS and DTR handling code since the MC68681 seems to only have
automatic handling of RTS/CTS. This only protects the on-chip buffers and FIFOs -- not the termios queues as the RTS/CTS code in here did. It may be necessary in the future to enable this automatic support. Interrupt processing code added. In some places, channel and duart base addresses were swapped.
This commit is contained in:
@@ -30,18 +30,6 @@
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* Flow control is only supported when using interrupts
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*/
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console_flow mc68681_flow_RTSCTS =
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{
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mc68681_negate_RTS, /* deviceStopRemoteTx */
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mc68681_assert_RTS /* deviceStartRemoteTx */
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};
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console_flow mc68681_flow_DTRCTS =
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{
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mc68681_negate_DTR, /* deviceStopRemoteTx */
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mc68681_assert_DTR /* deviceStartRemoteTx */
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};
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console_fns mc68681_fns =
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{
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mc68681_probe, /* deviceProbe */
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@@ -122,6 +110,10 @@ static int mc68681_baud_rate(
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}
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if ( !acr_bit ) {
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/*
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* Baud Rate Set 1
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*/
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switch (baud & CBAUD) {
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case B50: baud_mask = 0x00; break;
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case B110: baud_mask = 0x01; break;
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@@ -148,6 +140,10 @@ static int mc68681_baud_rate(
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break;
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}
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} else {
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/*
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* Baud Rate Set 2
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*/
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switch (baud & CBAUD) {
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case B75: baud_mask = 0x00; break;
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case B110: baud_mask = 0x01; break;
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@@ -201,8 +197,8 @@ static int mc68681_set_attributes(
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setRegister_f setReg;
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rtems_interrupt_level Irql;
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pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort1;
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pMC68681 = Console_Port_Tbl[minor].ulCtrlPort2;
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pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
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pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2;
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setReg = Console_Port_Tbl[minor].setRegister;
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/*
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@@ -293,7 +289,6 @@ static void mc68681_initialize_context(
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}
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}
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pmc68681Context->ucModemCtrl = 0x00; /* XXX */
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}
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/*
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@@ -305,7 +300,8 @@ static void mc68681_initialize_context(
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*/
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static unsigned int mc68681_build_imr(
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int minor
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int minor,
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int enable_flag
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)
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{
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int mate;
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@@ -343,11 +339,13 @@ static unsigned int mc68681_build_imr(
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*/
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mask = 0;
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if ( Console_Port_Tbl[minor].pDeviceFns->deviceOutputUsesInterrupts ) {
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if ( pMC68681 == pMC68681_port )
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mask = 0x03;
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else
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mask = 0x30;
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if ( enable_flag ) {
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if ( Console_Port_Tbl[minor].pDeviceFns->deviceOutputUsesInterrupts ) {
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if ( pMC68681 == pMC68681_port )
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mask = 0x03;
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else
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mask = 0x30;
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}
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}
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return mask | mate_mask;
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@@ -373,8 +371,8 @@ static void mc68681_init(int minor)
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mc68681_initialize_context( minor, pmc68681Context );
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pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort1;
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pMC68681 = Console_Port_Tbl[minor].ulCtrlPort2;
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pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
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pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2;
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setReg = Console_Port_Tbl[minor].setRegister;
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getReg = Console_Port_Tbl[minor].getRegister;
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@@ -393,6 +391,12 @@ static void mc68681_init(int minor)
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(*setReg)( pMC68681, MC68681_MODE_REG_1A, 0x00 );
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(*setReg)( pMC68681, MC68681_MODE_REG_2A, 0x02 );
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/*
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* Disable interrupts on RX and TX for this port
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*/
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(*setReg)( pMC68681, MC68681_INTERRUPT_MASK_REG, mc68681_build_imr(minor, 0));
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}
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/*
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@@ -441,15 +445,7 @@ static int mc68681_open(
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(*setReg)( pMC68681, MC68681_INTERRUPT_VECTOR_REG, vector );
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/*
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* Assert DTR
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*/
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if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_DTRCTS) {
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mc68681_assert_DTR(minor);
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}
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return(RTEMS_SUCCESSFUL);
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return RTEMS_SUCCESSFUL;
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}
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/*
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@@ -479,14 +475,6 @@ static int mc68681_close(
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(*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_TX );
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(*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_RX );
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/*
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* Negate DTR
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*/
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if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_DTRCTS) {
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mc68681_negate_DTR(minor);
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}
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return(RTEMS_SUCCESSFUL);
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}
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@@ -539,211 +527,91 @@ static void mc68681_write_polled(
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}
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/*
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* These routines provide control of the RTS and DTR lines
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* mc68681_process
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*
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* This routine is the per port console interrupt handler.
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*/
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/*
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* mc68681_assert_RTS
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*/
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static int mc68681_assert_RTS(int minor)
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static void mc68681_process(
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int minor
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)
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{
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/* XXX */
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unsigned32 pMC68681;
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unsigned32 Irql;
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mc68681_context *pmc68681Context;
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unsigned32 pMC68681_port;
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volatile unsigned8 ucLineStatus;
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char cChar;
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getRegister_f getReg;
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setRegister_f setReg;
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pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext;
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pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
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setReg = Console_Port_Tbl[minor].setRegister;
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pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
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pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2;
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getReg = Console_Port_Tbl[minor].getRegister;
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setReg = Console_Port_Tbl[minor].setRegister;
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/*
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* Assert RTS
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* Deal with any received characters
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*/
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rtems_interrupt_disable(Irql);
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#if 0
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pmc68681Context->ucModemCtrl |= SP_MODEM_RTS;
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(*setReg)(pMC68681, MC68681_MODEM_CONTROL, pmc68681Context->ucModemCtrl);
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#endif
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rtems_interrupt_enable(Irql);
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return 0;
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}
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/*
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* mc68681_negate_RTS
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*/
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static int mc68681_negate_RTS(int minor)
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{
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/* XXX */
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unsigned32 pMC68681;
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unsigned32 Irql;
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mc68681_context *pmc68681Context;
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setRegister_f setReg;
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pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext;
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pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
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setReg = Console_Port_Tbl[minor].setRegister;
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while(TRUE) {
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ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS);
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if(!(ucLineStatus & MC68681_RX_READY)) {
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break;
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}
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/*
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* If there is a RX error, then dump all the data.
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*/
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if ( ucLineStatus & MC68681_RX_ERRORS ) {
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do {
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cChar = (*getReg)(pMC68681_port, MC68681_RX_BUFFER);
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ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS);
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} while ( ucLineStatus & MC68681_RX_READY );
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continue;
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}
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cChar = (*getReg)(pMC68681_port, MC68681_RX_BUFFER);
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rtems_termios_enqueue_raw_characters(
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Console_Port_Data[minor].termios_data,
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&cChar,
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1
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);
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}
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/*
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* Negate RTS
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* Deal with the transmitter
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*/
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rtems_interrupt_disable(Irql);
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#if 0
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pmc68681Context->ucModemCtrl &= ~SP_MODEM_RTS;
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(*setReg)(pMC68681, MC68681_MODEM_CONTROL, pmc68681Context->ucModemCtrl);
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#endif
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rtems_interrupt_enable(Irql);
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return 0;
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}
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/*
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* These flow control routines utilize a connection from the local DTR
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* line to the remote CTS line
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*/
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while(TRUE) {
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if(Ring_buffer_Is_empty(&Console_Port_Data[minor].TxBuffer)) {
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Console_Port_Data[minor].bActive = FALSE;
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/*
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* mc68681_assert_DTR
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*/
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/*
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* There is no data to transmit
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*/
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break;
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}
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static int mc68681_assert_DTR(int minor)
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{
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/* XXX */
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unsigned32 pMC68681;
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unsigned32 Irql;
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mc68681_context *pmc68681Context;
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setRegister_f setReg;
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ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS);
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if(!(ucLineStatus & (MC68681_TX_EMPTY|MC68681_TX_READY))) {
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/*
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* We'll get another interrupt when the TX can take another character.
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*/
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break;
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}
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pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext;
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Ring_buffer_Remove_character( &Console_Port_Data[minor].TxBuffer, cChar);
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/*
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* transmit character
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*/
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(*setReg)(pMC68681_port, MC68681_TX_BUFFER, cChar);
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}
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pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
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setReg = Console_Port_Tbl[minor].setRegister;
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/*
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* Assert DTR
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*/
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rtems_interrupt_disable(Irql);
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#if 0
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pmc68681Context->ucModemCtrl |= SP_MODEM_DTR;
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(*setReg)(pMC68681, MC68681_MODEM_CONTROL, pmc68681Context->ucModemCtrl);
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#endif
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rtems_interrupt_enable(Irql);
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return 0;
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}
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/*
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* mc68681_negate_DTR
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*/
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static int mc68681_negate_DTR(int minor)
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{
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/* XXX */
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unsigned32 pMC68681;
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unsigned32 Irql;
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mc68681_context *pmc68681Context;
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setRegister_f setReg;
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pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext;
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pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
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setReg = Console_Port_Tbl[minor].setRegister;
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/*
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* Negate DTR
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*/
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rtems_interrupt_disable(Irql);
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#if 0
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pmc68681Context->ucModemCtrl &= ~SP_MODEM_DTR;
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(*setReg)(pMC68681, MC68681_MODEM_CONTROL,pmc68681Context->ucModemCtrl);
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#endif
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rtems_interrupt_enable(Irql);
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return 0;
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}
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/*
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* mc68681_isr
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*
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* This routine is the console interrupt handler.
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* This is the single interrupt entry point which parcels interrupts
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* out to the various ports.
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*/
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static void mc68681_process(
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int minor
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)
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{
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/* XXX */
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unsigned32 pMC68681;
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volatile unsigned8 ucLineStatus;
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volatile unsigned8 ucInterruptId;
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char cChar;
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getRegister_f getReg;
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setRegister_f setReg;
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#if 1
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cChar = ucInterruptId = ucLineStatus = 0;
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#endif
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pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
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getReg = Console_Port_Tbl[minor].getRegister;
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setReg = Console_Port_Tbl[minor].setRegister;
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#if 0
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do {
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/*
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* Deal with any received characters
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*/
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while(TRUE) {
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ucLineStatus = (*getReg)(pMC68681, MC68681_LINE_STATUS);
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if(~ucLineStatus & SP_LSR_RDY) {
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break;
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}
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cChar = (*getReg)(pMC68681, MC68681_RECEIVE_BUFFER);
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rtems_termios_enqueue_raw_characters(
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Console_Port_Data[minor].termios_data,
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&cChar,
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1
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);
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}
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while(TRUE) {
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if(Ring_buffer_Is_empty(&Console_Port_Data[minor].TxBuffer)) {
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Console_Port_Data[minor].bActive = FALSE;
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if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_RTSCTS) {
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mc68681_negate_RTS(minor);
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}
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/*
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* There is no data to transmit
|
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*/
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break;
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}
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ucLineStatus = (*getReg)(pMC68681, MC68681_LINE_STATUS);
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if(~ucLineStatus & SP_LSR_THOLD) {
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/*
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* We'll get another interrupt when
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* the transmitter holding reg. becomes
|
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* free again
|
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*/
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break;
|
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}
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Ring_buffer_Remove_character( &Console_Port_Data[minor].TxBuffer, cChar);
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/*
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* transmit character
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*/
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(*setReg)(pMC68681, MC68681_TRANSMIT_BUFFER, cChar);
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}
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ucInterruptId = (*getReg)(pMC68681, MC68681_INTERRUPT_ID);
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}
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while((ucInterruptId&0xf) != 0x1);
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#endif
|
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}
|
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|
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static rtems_isr mc68681_isr(
|
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rtems_vector_number vector
|
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)
|
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@@ -802,7 +670,7 @@ static void mc68681_enable_interrupts(
|
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* Enable interrupts on RX and TX -- not break
|
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*/
|
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|
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(*setReg)( pMC68681, MC68681_INTERRUPT_MASK_REG, mc68681_build_imr( minor ));
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(*setReg)( pMC68681, MC68681_INTERRUPT_MASK_REG, mc68681_build_imr(minor, 1));
|
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}
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||||
|
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/*
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||||
@@ -848,9 +716,6 @@ static int mc68681_write_support_int(
|
||||
*/
|
||||
rtems_interrupt_disable(Irql);
|
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Console_Port_Data[minor].bActive = TRUE;
|
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if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_RTSCTS) {
|
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mc68681_assert_RTS(minor);
|
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}
|
||||
mc68681_process(minor);
|
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rtems_interrupt_enable(Irql);
|
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} else {
|
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@@ -881,9 +746,6 @@ static int mc68681_write_support_int(
|
||||
*/
|
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rtems_interrupt_disable(Irql);
|
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Console_Port_Data[minor].bActive = TRUE;
|
||||
if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_RTSCTS) {
|
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mc68681_assert_RTS(minor);
|
||||
}
|
||||
mc68681_process(minor);
|
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rtems_interrupt_enable(Irql);
|
||||
}
|
||||
|
||||
@@ -46,13 +46,6 @@ extern "C" {
|
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extern console_fns mc68681_fns;
|
||||
extern console_fns mc68681_fns_polled;
|
||||
|
||||
/*
|
||||
* Flow control function tables
|
||||
*/
|
||||
|
||||
extern console_flow mc68681_flow_RTSCTS;
|
||||
extern console_flow mc68681_flow_DTRCTS;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -165,6 +165,10 @@ extern "C" {
|
||||
#define MC68681_FRAMING_ERROR 0x40
|
||||
#define MC68681_RECEIVED_BREAK 0x80
|
||||
|
||||
#define MC68681_RX_ERRORS \
|
||||
(MC68681_OVERRUN_ERROR|MC68681_PARITY_ERROR| \
|
||||
MC68681_FRAMING_ERROR|MC68681_RECEIVED_BREAK)
|
||||
|
||||
/*
|
||||
* Interupt Status Register Definitions.
|
||||
*
|
||||
@@ -225,7 +229,6 @@ extern "C" {
|
||||
typedef struct _mc68681_context
|
||||
{
|
||||
int mate;
|
||||
unsigned8 ucModemCtrl;
|
||||
} mc68681_context;
|
||||
|
||||
/*
|
||||
@@ -257,22 +260,6 @@ static void mc68681_write_polled(
|
||||
char cChar
|
||||
);
|
||||
|
||||
static int mc68681_assert_RTS(
|
||||
int minor
|
||||
);
|
||||
|
||||
static int mc68681_negate_RTS(
|
||||
int minor
|
||||
);
|
||||
|
||||
static int mc68681_assert_DTR(
|
||||
int minor
|
||||
);
|
||||
|
||||
static int mc68681_negate_DTR(
|
||||
int minor
|
||||
);
|
||||
|
||||
static void mc68681_initialize_interrupts(int minor);
|
||||
|
||||
static int mc68681_flush(int major, int minor, void *arg);
|
||||
|
||||
@@ -30,18 +30,6 @@
|
||||
* Flow control is only supported when using interrupts
|
||||
*/
|
||||
|
||||
console_flow mc68681_flow_RTSCTS =
|
||||
{
|
||||
mc68681_negate_RTS, /* deviceStopRemoteTx */
|
||||
mc68681_assert_RTS /* deviceStartRemoteTx */
|
||||
};
|
||||
|
||||
console_flow mc68681_flow_DTRCTS =
|
||||
{
|
||||
mc68681_negate_DTR, /* deviceStopRemoteTx */
|
||||
mc68681_assert_DTR /* deviceStartRemoteTx */
|
||||
};
|
||||
|
||||
console_fns mc68681_fns =
|
||||
{
|
||||
mc68681_probe, /* deviceProbe */
|
||||
@@ -122,6 +110,10 @@ static int mc68681_baud_rate(
|
||||
}
|
||||
|
||||
if ( !acr_bit ) {
|
||||
/*
|
||||
* Baud Rate Set 1
|
||||
*/
|
||||
|
||||
switch (baud & CBAUD) {
|
||||
case B50: baud_mask = 0x00; break;
|
||||
case B110: baud_mask = 0x01; break;
|
||||
@@ -148,6 +140,10 @@ static int mc68681_baud_rate(
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
/*
|
||||
* Baud Rate Set 2
|
||||
*/
|
||||
|
||||
switch (baud & CBAUD) {
|
||||
case B75: baud_mask = 0x00; break;
|
||||
case B110: baud_mask = 0x01; break;
|
||||
@@ -201,8 +197,8 @@ static int mc68681_set_attributes(
|
||||
setRegister_f setReg;
|
||||
rtems_interrupt_level Irql;
|
||||
|
||||
pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort1;
|
||||
pMC68681 = Console_Port_Tbl[minor].ulCtrlPort2;
|
||||
pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
|
||||
pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2;
|
||||
setReg = Console_Port_Tbl[minor].setRegister;
|
||||
|
||||
/*
|
||||
@@ -293,7 +289,6 @@ static void mc68681_initialize_context(
|
||||
}
|
||||
}
|
||||
|
||||
pmc68681Context->ucModemCtrl = 0x00; /* XXX */
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -305,7 +300,8 @@ static void mc68681_initialize_context(
|
||||
*/
|
||||
|
||||
static unsigned int mc68681_build_imr(
|
||||
int minor
|
||||
int minor,
|
||||
int enable_flag
|
||||
)
|
||||
{
|
||||
int mate;
|
||||
@@ -343,11 +339,13 @@ static unsigned int mc68681_build_imr(
|
||||
*/
|
||||
|
||||
mask = 0;
|
||||
if ( Console_Port_Tbl[minor].pDeviceFns->deviceOutputUsesInterrupts ) {
|
||||
if ( pMC68681 == pMC68681_port )
|
||||
mask = 0x03;
|
||||
else
|
||||
mask = 0x30;
|
||||
if ( enable_flag ) {
|
||||
if ( Console_Port_Tbl[minor].pDeviceFns->deviceOutputUsesInterrupts ) {
|
||||
if ( pMC68681 == pMC68681_port )
|
||||
mask = 0x03;
|
||||
else
|
||||
mask = 0x30;
|
||||
}
|
||||
}
|
||||
|
||||
return mask | mate_mask;
|
||||
@@ -373,8 +371,8 @@ static void mc68681_init(int minor)
|
||||
|
||||
mc68681_initialize_context( minor, pmc68681Context );
|
||||
|
||||
pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort1;
|
||||
pMC68681 = Console_Port_Tbl[minor].ulCtrlPort2;
|
||||
pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
|
||||
pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2;
|
||||
setReg = Console_Port_Tbl[minor].setRegister;
|
||||
getReg = Console_Port_Tbl[minor].getRegister;
|
||||
|
||||
@@ -393,6 +391,12 @@ static void mc68681_init(int minor)
|
||||
|
||||
(*setReg)( pMC68681, MC68681_MODE_REG_1A, 0x00 );
|
||||
(*setReg)( pMC68681, MC68681_MODE_REG_2A, 0x02 );
|
||||
|
||||
/*
|
||||
* Disable interrupts on RX and TX for this port
|
||||
*/
|
||||
|
||||
(*setReg)( pMC68681, MC68681_INTERRUPT_MASK_REG, mc68681_build_imr(minor, 0));
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -441,15 +445,7 @@ static int mc68681_open(
|
||||
|
||||
(*setReg)( pMC68681, MC68681_INTERRUPT_VECTOR_REG, vector );
|
||||
|
||||
/*
|
||||
* Assert DTR
|
||||
*/
|
||||
|
||||
if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_DTRCTS) {
|
||||
mc68681_assert_DTR(minor);
|
||||
}
|
||||
|
||||
return(RTEMS_SUCCESSFUL);
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -479,14 +475,6 @@ static int mc68681_close(
|
||||
(*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_TX );
|
||||
(*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_RX );
|
||||
|
||||
/*
|
||||
* Negate DTR
|
||||
*/
|
||||
|
||||
if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_DTRCTS) {
|
||||
mc68681_negate_DTR(minor);
|
||||
}
|
||||
|
||||
return(RTEMS_SUCCESSFUL);
|
||||
}
|
||||
|
||||
@@ -539,211 +527,91 @@ static void mc68681_write_polled(
|
||||
}
|
||||
|
||||
/*
|
||||
* These routines provide control of the RTS and DTR lines
|
||||
* mc68681_process
|
||||
*
|
||||
* This routine is the per port console interrupt handler.
|
||||
*/
|
||||
|
||||
/*
|
||||
* mc68681_assert_RTS
|
||||
*/
|
||||
|
||||
static int mc68681_assert_RTS(int minor)
|
||||
static void mc68681_process(
|
||||
int minor
|
||||
)
|
||||
{
|
||||
/* XXX */
|
||||
|
||||
unsigned32 pMC68681;
|
||||
unsigned32 Irql;
|
||||
mc68681_context *pmc68681Context;
|
||||
unsigned32 pMC68681_port;
|
||||
volatile unsigned8 ucLineStatus;
|
||||
char cChar;
|
||||
getRegister_f getReg;
|
||||
setRegister_f setReg;
|
||||
|
||||
|
||||
pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext;
|
||||
|
||||
pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
|
||||
setReg = Console_Port_Tbl[minor].setRegister;
|
||||
pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
|
||||
pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2;
|
||||
getReg = Console_Port_Tbl[minor].getRegister;
|
||||
setReg = Console_Port_Tbl[minor].setRegister;
|
||||
|
||||
/*
|
||||
* Assert RTS
|
||||
* Deal with any received characters
|
||||
*/
|
||||
rtems_interrupt_disable(Irql);
|
||||
#if 0
|
||||
pmc68681Context->ucModemCtrl |= SP_MODEM_RTS;
|
||||
(*setReg)(pMC68681, MC68681_MODEM_CONTROL, pmc68681Context->ucModemCtrl);
|
||||
#endif
|
||||
rtems_interrupt_enable(Irql);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* mc68681_negate_RTS
|
||||
*/
|
||||
|
||||
static int mc68681_negate_RTS(int minor)
|
||||
{
|
||||
/* XXX */
|
||||
unsigned32 pMC68681;
|
||||
unsigned32 Irql;
|
||||
mc68681_context *pmc68681Context;
|
||||
setRegister_f setReg;
|
||||
|
||||
pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext;
|
||||
|
||||
pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
|
||||
setReg = Console_Port_Tbl[minor].setRegister;
|
||||
while(TRUE) {
|
||||
ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS);
|
||||
if(!(ucLineStatus & MC68681_RX_READY)) {
|
||||
break;
|
||||
}
|
||||
/*
|
||||
* If there is a RX error, then dump all the data.
|
||||
*/
|
||||
if ( ucLineStatus & MC68681_RX_ERRORS ) {
|
||||
do {
|
||||
cChar = (*getReg)(pMC68681_port, MC68681_RX_BUFFER);
|
||||
ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS);
|
||||
} while ( ucLineStatus & MC68681_RX_READY );
|
||||
continue;
|
||||
}
|
||||
cChar = (*getReg)(pMC68681_port, MC68681_RX_BUFFER);
|
||||
rtems_termios_enqueue_raw_characters(
|
||||
Console_Port_Data[minor].termios_data,
|
||||
&cChar,
|
||||
1
|
||||
);
|
||||
}
|
||||
|
||||
/*
|
||||
* Negate RTS
|
||||
* Deal with the transmitter
|
||||
*/
|
||||
rtems_interrupt_disable(Irql);
|
||||
#if 0
|
||||
pmc68681Context->ucModemCtrl &= ~SP_MODEM_RTS;
|
||||
(*setReg)(pMC68681, MC68681_MODEM_CONTROL, pmc68681Context->ucModemCtrl);
|
||||
#endif
|
||||
rtems_interrupt_enable(Irql);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* These flow control routines utilize a connection from the local DTR
|
||||
* line to the remote CTS line
|
||||
*/
|
||||
while(TRUE) {
|
||||
if(Ring_buffer_Is_empty(&Console_Port_Data[minor].TxBuffer)) {
|
||||
Console_Port_Data[minor].bActive = FALSE;
|
||||
|
||||
/*
|
||||
* mc68681_assert_DTR
|
||||
*/
|
||||
/*
|
||||
* There is no data to transmit
|
||||
*/
|
||||
break;
|
||||
}
|
||||
|
||||
static int mc68681_assert_DTR(int minor)
|
||||
{
|
||||
/* XXX */
|
||||
unsigned32 pMC68681;
|
||||
unsigned32 Irql;
|
||||
mc68681_context *pmc68681Context;
|
||||
setRegister_f setReg;
|
||||
ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS);
|
||||
if(!(ucLineStatus & (MC68681_TX_EMPTY|MC68681_TX_READY))) {
|
||||
/*
|
||||
* We'll get another interrupt when the TX can take another character.
|
||||
*/
|
||||
break;
|
||||
}
|
||||
|
||||
pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext;
|
||||
Ring_buffer_Remove_character( &Console_Port_Data[minor].TxBuffer, cChar);
|
||||
/*
|
||||
* transmit character
|
||||
*/
|
||||
(*setReg)(pMC68681_port, MC68681_TX_BUFFER, cChar);
|
||||
}
|
||||
|
||||
pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
|
||||
setReg = Console_Port_Tbl[minor].setRegister;
|
||||
|
||||
/*
|
||||
* Assert DTR
|
||||
*/
|
||||
rtems_interrupt_disable(Irql);
|
||||
#if 0
|
||||
pmc68681Context->ucModemCtrl |= SP_MODEM_DTR;
|
||||
(*setReg)(pMC68681, MC68681_MODEM_CONTROL, pmc68681Context->ucModemCtrl);
|
||||
#endif
|
||||
rtems_interrupt_enable(Irql);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* mc68681_negate_DTR
|
||||
*/
|
||||
|
||||
static int mc68681_negate_DTR(int minor)
|
||||
{
|
||||
/* XXX */
|
||||
unsigned32 pMC68681;
|
||||
unsigned32 Irql;
|
||||
mc68681_context *pmc68681Context;
|
||||
setRegister_f setReg;
|
||||
|
||||
pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext;
|
||||
|
||||
pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
|
||||
setReg = Console_Port_Tbl[minor].setRegister;
|
||||
|
||||
/*
|
||||
* Negate DTR
|
||||
*/
|
||||
rtems_interrupt_disable(Irql);
|
||||
#if 0
|
||||
pmc68681Context->ucModemCtrl &= ~SP_MODEM_DTR;
|
||||
(*setReg)(pMC68681, MC68681_MODEM_CONTROL,pmc68681Context->ucModemCtrl);
|
||||
#endif
|
||||
rtems_interrupt_enable(Irql);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* mc68681_isr
|
||||
*
|
||||
* This routine is the console interrupt handler.
|
||||
* This is the single interrupt entry point which parcels interrupts
|
||||
* out to the various ports.
|
||||
*/
|
||||
|
||||
static void mc68681_process(
|
||||
int minor
|
||||
)
|
||||
{
|
||||
/* XXX */
|
||||
unsigned32 pMC68681;
|
||||
volatile unsigned8 ucLineStatus;
|
||||
volatile unsigned8 ucInterruptId;
|
||||
char cChar;
|
||||
getRegister_f getReg;
|
||||
setRegister_f setReg;
|
||||
|
||||
#if 1
|
||||
cChar = ucInterruptId = ucLineStatus = 0;
|
||||
#endif
|
||||
pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
|
||||
getReg = Console_Port_Tbl[minor].getRegister;
|
||||
setReg = Console_Port_Tbl[minor].setRegister;
|
||||
|
||||
#if 0
|
||||
do {
|
||||
/*
|
||||
* Deal with any received characters
|
||||
*/
|
||||
while(TRUE) {
|
||||
ucLineStatus = (*getReg)(pMC68681, MC68681_LINE_STATUS);
|
||||
if(~ucLineStatus & SP_LSR_RDY) {
|
||||
break;
|
||||
}
|
||||
cChar = (*getReg)(pMC68681, MC68681_RECEIVE_BUFFER);
|
||||
rtems_termios_enqueue_raw_characters(
|
||||
Console_Port_Data[minor].termios_data,
|
||||
&cChar,
|
||||
1
|
||||
);
|
||||
}
|
||||
|
||||
while(TRUE) {
|
||||
if(Ring_buffer_Is_empty(&Console_Port_Data[minor].TxBuffer)) {
|
||||
Console_Port_Data[minor].bActive = FALSE;
|
||||
if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_RTSCTS) {
|
||||
mc68681_negate_RTS(minor);
|
||||
}
|
||||
|
||||
/*
|
||||
* There is no data to transmit
|
||||
*/
|
||||
break;
|
||||
}
|
||||
|
||||
ucLineStatus = (*getReg)(pMC68681, MC68681_LINE_STATUS);
|
||||
if(~ucLineStatus & SP_LSR_THOLD) {
|
||||
/*
|
||||
* We'll get another interrupt when
|
||||
* the transmitter holding reg. becomes
|
||||
* free again
|
||||
*/
|
||||
break;
|
||||
}
|
||||
|
||||
Ring_buffer_Remove_character( &Console_Port_Data[minor].TxBuffer, cChar);
|
||||
/*
|
||||
* transmit character
|
||||
*/
|
||||
(*setReg)(pMC68681, MC68681_TRANSMIT_BUFFER, cChar);
|
||||
}
|
||||
|
||||
ucInterruptId = (*getReg)(pMC68681, MC68681_INTERRUPT_ID);
|
||||
}
|
||||
while((ucInterruptId&0xf) != 0x1);
|
||||
#endif
|
||||
}
|
||||
|
||||
static rtems_isr mc68681_isr(
|
||||
rtems_vector_number vector
|
||||
)
|
||||
@@ -802,7 +670,7 @@ static void mc68681_enable_interrupts(
|
||||
* Enable interrupts on RX and TX -- not break
|
||||
*/
|
||||
|
||||
(*setReg)( pMC68681, MC68681_INTERRUPT_MASK_REG, mc68681_build_imr( minor ));
|
||||
(*setReg)( pMC68681, MC68681_INTERRUPT_MASK_REG, mc68681_build_imr(minor, 1));
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -848,9 +716,6 @@ static int mc68681_write_support_int(
|
||||
*/
|
||||
rtems_interrupt_disable(Irql);
|
||||
Console_Port_Data[minor].bActive = TRUE;
|
||||
if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_RTSCTS) {
|
||||
mc68681_assert_RTS(minor);
|
||||
}
|
||||
mc68681_process(minor);
|
||||
rtems_interrupt_enable(Irql);
|
||||
} else {
|
||||
@@ -881,9 +746,6 @@ static int mc68681_write_support_int(
|
||||
*/
|
||||
rtems_interrupt_disable(Irql);
|
||||
Console_Port_Data[minor].bActive = TRUE;
|
||||
if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_RTSCTS) {
|
||||
mc68681_assert_RTS(minor);
|
||||
}
|
||||
mc68681_process(minor);
|
||||
rtems_interrupt_enable(Irql);
|
||||
}
|
||||
|
||||
@@ -46,13 +46,6 @@ extern "C" {
|
||||
extern console_fns mc68681_fns;
|
||||
extern console_fns mc68681_fns_polled;
|
||||
|
||||
/*
|
||||
* Flow control function tables
|
||||
*/
|
||||
|
||||
extern console_flow mc68681_flow_RTSCTS;
|
||||
extern console_flow mc68681_flow_DTRCTS;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -165,6 +165,10 @@ extern "C" {
|
||||
#define MC68681_FRAMING_ERROR 0x40
|
||||
#define MC68681_RECEIVED_BREAK 0x80
|
||||
|
||||
#define MC68681_RX_ERRORS \
|
||||
(MC68681_OVERRUN_ERROR|MC68681_PARITY_ERROR| \
|
||||
MC68681_FRAMING_ERROR|MC68681_RECEIVED_BREAK)
|
||||
|
||||
/*
|
||||
* Interupt Status Register Definitions.
|
||||
*
|
||||
@@ -225,7 +229,6 @@ extern "C" {
|
||||
typedef struct _mc68681_context
|
||||
{
|
||||
int mate;
|
||||
unsigned8 ucModemCtrl;
|
||||
} mc68681_context;
|
||||
|
||||
/*
|
||||
@@ -257,22 +260,6 @@ static void mc68681_write_polled(
|
||||
char cChar
|
||||
);
|
||||
|
||||
static int mc68681_assert_RTS(
|
||||
int minor
|
||||
);
|
||||
|
||||
static int mc68681_negate_RTS(
|
||||
int minor
|
||||
);
|
||||
|
||||
static int mc68681_assert_DTR(
|
||||
int minor
|
||||
);
|
||||
|
||||
static int mc68681_negate_DTR(
|
||||
int minor
|
||||
);
|
||||
|
||||
static void mc68681_initialize_interrupts(int minor);
|
||||
|
||||
static int mc68681_flush(int major, int minor, void *arg);
|
||||
|
||||
Reference in New Issue
Block a user