RTOS/rtems
1
0
Fork 0
forked from Imagelibrary/rtems
Code Pull Requests Activity

bsps/aarch64/cache: Clean up unused fuctions

Browse Source 
When the CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS definition was added
to AArch64 cache management, it obsoleted the *_1_data/instruction_line
functions. These have been removed since they are no longer referenced.
The AArch64_instruction_cache_inner_shareable_invalidate_all function is
only used when RTEMS_SMP is defined, so only define it in that
circumstance.
This commit is contained in:
Kinsey Moore
2024-01-02 12:48:25 -06:00
committed by Joel Sherrill
parent c37fdedec2
commit 4092fbb2c0
1 changed files with 2 additions and 27 deletions
Download Patch File Download Diff File Expand all files Collapse all files

29
bsps/aarch64/shared/cache/cache.c vendored
View File

@@ -63,15 +63,6 @@ void AArch64_data_cache_clean_and_invalidate_line(const void *d_addr)
);
}
static inline void _CPU_cache_flush_1_data_line(const void *d_addr)
{
/* Flush the Data cache */
AArch64_data_cache_clean_and_invalidate_line( d_addr );
/* Wait for L1 flush to complete */
_AARCH64_Data_synchronization_barrier();
}
static inline void
_CPU_cache_flush_data_range(
const void *d_addr,
@@ -105,15 +96,6 @@ static inline void AArch64_data_cache_invalidate_line(const void *d_addr)
);
}
static inline void _CPU_cache_invalidate_1_data_line(const void *d_addr)
{
/* Invalidate the data cache line */
AArch64_data_cache_invalidate_line( d_addr );
/* Wait for L1 invalidate to complete */
_AARCH64_Data_synchronization_barrier();
}
static inline void
_CPU_cache_invalidate_data_range(
const void *d_addr,
@@ -152,15 +134,6 @@ static inline void AArch64_instruction_cache_invalidate_line(const void *i_addr)
__builtin___clear_cache((void *)i_addr, ((char *)i_addr) + sizeof(void*) - 1);
}
static inline void _CPU_cache_invalidate_1_instruction_line(const void *d_addr)
{
/* Invalidate the Instruction cache line */
AArch64_instruction_cache_invalidate_line( d_addr );
/* Wait for L1 invalidate to complete */
_AARCH64_Data_synchronization_barrier();
}
static inline void
_CPU_cache_invalidate_instruction_range( const void *i_addr, size_t n_bytes)
{
@@ -376,6 +349,7 @@ static inline void _CPU_cache_disable_data(void)
rtems_interrupt_local_enable(level);
}
#ifdef RTEMS_SMP
static inline
void AArch64_instruction_cache_inner_shareable_invalidate_all(void)
{
@@ -386,6 +360,7 @@ void AArch64_instruction_cache_inner_shareable_invalidate_all(void)
: "memory"
);
}
#endif /* RTEMS_SMP */
static inline void AArch64_instruction_cache_invalidate(void)
{