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bsps/xqspipsu: Add SFDP config space read ability

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This adds a function to allow reading of the SFDP configuration space
that describes attributes of NOR flash chips.
This commit is contained in:
Kinsey Moore
2023-06-02 15:06:09 -05:00
committed by Joel Sherrill
parent 853429c3f8
commit 3f3c646dea
3 changed files with 69 additions and 0 deletions
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20
bsps/include/dev/spi/xqspipsu-flash-helper.h
View File

@@ -170,3 +170,23 @@ u32 QspiPsu_NOR_Get_Sector_Size(XQspiPsu *QspiPsuPtr);
*
******************************************************************************/
int QspiPsu_NOR_RDID(XQspiPsu *QspiPsuPtr, u8 *ReadBfrPtr, u32 ReadLen);
/*****************************************************************************/
/**
*
* This function performs a read of the SFDP configuration space.
*
* @param QspiPsuPtr is a pointer to the QSPIPSU driver component to use.
* @param ReadBfrPtr is a pointer to a buffer to be filled with
* configuration data.
* @param ReadLen is the total length of the configuration space to read.
*
* @return XST_SUCCESS if successful, else XST_FAILURE.
*
******************************************************************************/
int QspiPsu_NOR_RDSFDP(
XQspiPsu *QspiPsuPtr,
u32 Address,
u32 ByteCount,
u8 **ReadBfrPtr
);

1
bsps/include/dev/spi/xqspipsu_flash_config.h
View File

@@ -64,6 +64,7 @@ extern "C" {
#define BULK_ERASE_CMD 0xC7
#define SEC_ERASE_CMD 0xD8
#define READ_ID 0x9F
#define READ_SFDP 0x5A
#define READ_CONFIG_CMD 0x35
#define WRITE_CONFIG_CMD 0x01
#define ENTER_4B_ADDR_MODE 0xB7

48
bsps/shared/dev/spi/xqspipsu-flash-helper.c
View File

@@ -274,6 +274,54 @@ static void QspiPsuHandler(
}
}
int QspiPsu_NOR_RDSFDP(
XQspiPsu *QspiPsuPtr,
u32 Address,
u32 ByteCount,
u8 **ReadBfrPtr
)
{
int Status;
*ReadBfrPtr = ReadBuffer;
CmdBfr[COMMAND_OFFSET] = READ_SFDP;
CmdBfr[ADDRESS_1_OFFSET] =
(u8)((Address & 0xFF0000) >> 16);
CmdBfr[ADDRESS_2_OFFSET] =
(u8)((Address & 0xFF00) >> 8);
CmdBfr[ADDRESS_3_OFFSET] =
(u8)(Address & 0xFF);
FlashMsg[0].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
FlashMsg[0].TxBfrPtr = CmdBfr;
FlashMsg[0].RxBfrPtr = NULL;
FlashMsg[0].ByteCount = 4;
FlashMsg[0].Flags = XQSPIPSU_MSG_FLAG_TX;
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
FlashMsg[1].TxBfrPtr = NULL;
FlashMsg[1].RxBfrPtr = NULL;
FlashMsg[1].ByteCount = DUMMY_CLOCKS;
FlashMsg[1].Flags = 0;
FlashMsg[2].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
FlashMsg[2].TxBfrPtr = NULL;
FlashMsg[2].RxBfrPtr = *ReadBfrPtr;
FlashMsg[2].ByteCount = ByteCount;
FlashMsg[2].Flags = XQSPIPSU_MSG_FLAG_RX;
TransferInProgress = TRUE;
Status = XQspiPsu_InterruptTransfer(QspiPsuPtr, FlashMsg, 3);
if (Status != XST_SUCCESS)
return XST_FAILURE;
while (TransferInProgress);
rtems_cache_invalidate_multiple_data_lines(ReadBuffer, ByteCount);
return 0;
}
int QspiPsu_NOR_RDID(XQspiPsu *QspiPsuPtr, u8 *ReadBfrPtr, u32 ReadLen)
{
int Status;