forked from Imagelibrary/rtems
smptests/smpcache01: Enable interrupts before waiting for other CPUs
Otherwise there is a risk that a CPU misses a cache manager message from another CPU and the test hangs.
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committed by
Sebastian Huber
parent
d3802bb5d7
commit
3641320161
@@ -120,12 +120,12 @@ static void test_func_isrdisabled_test( size_t set_size, cpu_set_t *cpu_set,
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_SMP_Multicast_action( set_size, cpu_set, test_cache_message, &ctx );
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_ISR_Enable_without_giant( isr_level );
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_SMP_barrier_Wait( &ctx.barrier, bs, rtems_get_processor_count() );
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rtems_test_assert( ctx.count[rtems_get_current_processor()] ==
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rtems_get_processor_count() );
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_ISR_Enable_without_giant( isr_level );
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}
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static void test_func_giant_taken_test( size_t set_size, cpu_set_t *cpu_set,
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