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2004-03-30 Ralf Corsepius <ralf_corsepius@rtems.org>

Browse Source 
* clock/ckinit.c, clock/clock.h, mongoosev/duart/mg5uart.c,
	mongoosev/duart/mg5uart.h, mongoosev/duart/mg5uart_reg.c,
	mongoosev/include/mongoose-v.h, mongoosev/vectorisrs/vectorisrs.c,
	shared/interrupts/vectorexceptions.c, timer/timer.c,
	tx39/include/tx3904.h: Convert to using c99 fixed size types.
This commit is contained in:
Ralf Corsepius
2004-03-31 02:02:23 +00:00
parent e96a950bcf
commit 35f9701021
11 changed files with 90 additions and 82 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
c/src/lib/libcpu/mips/ChangeLog
View File

@@ -1,3 +1,11 @@
2004-03-30 Ralf Corsepius <ralf_corsepius@rtems.org>
* clock/ckinit.c, clock/clock.h, mongoosev/duart/mg5uart.c,
mongoosev/duart/mg5uart.h, mongoosev/duart/mg5uart_reg.c,
mongoosev/include/mongoose-v.h, mongoosev/vectorisrs/vectorisrs.c,
shared/interrupts/vectorexceptions.c, timer/timer.c,
tx39/include/tx3904.h: Convert to using c99 fixed size types.
2004-03-26 Ralf Corsepius <ralf_corsepius@rtems.org>
* configure.ac: Add 2nd argument (rtems_updir) to RTEMS_TOP.

8
c/src/lib/libcpu/mips/clock/ckinit.c
View File

@@ -74,7 +74,7 @@ rtems_isr Clock_isr( rtems_vector_number vector );
* number of clock ticks since the driver was initialized.
*/
volatile rtems_unsigned32 Clock_driver_ticks;
volatile uint32_t Clock_driver_ticks;
/*
* Clock_isrs is the number of clock ISRs until the next invocation of
@@ -84,7 +84,7 @@ volatile rtems_unsigned32 Clock_driver_ticks;
* has passed.
*/
rtems_unsigned32 Clock_isrs; /* ISRs until next tick */
uint32_t Clock_isrs; /* ISRs until next tick */
/*
* These are set by clock driver during its init
@@ -101,7 +101,7 @@ rtems_isr_entry Old_ticker;
void Clock_exit( void );
static unsigned32 mips_timer_rate = 0;
static uint32_t mips_timer_rate = 0;
/*
* Isr Handler
@@ -217,7 +217,7 @@ rtems_device_driver Clock_control(
void *pargp
)
{
rtems_unsigned32 isrlevel;
uint32_t isrlevel;
rtems_libio_ioctl_args_t *args = pargp;
if (args == 0)

2
c/src/lib/libcpu/mips/clock/clock.h
View File

@@ -22,4 +22,4 @@
/* @(#)clock.h 08/20/96 1.2 */
extern void mips_set_timer( unsigned32 timer_clock_interval );
extern void mips_set_timer( uint32_t timer_clock_interval );

80
c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.c
View File

@@ -81,11 +81,11 @@ MG5UART_STATIC int mg5uart_set_attributes(
const struct termios *t
)
{
unsigned32 pMG5UART_port;
unsigned32 pMG5UART;
unsigned32 cmd, cmdSave;
unsigned32 baudcmd;
unsigned32 shift;
uint32_t pMG5UART_port;
uint32_t pMG5UART;
uint32_t cmd, cmdSave;
uint32_t baudcmd;
uint32_t shift;
rtems_interrupt_level Irql;
pMG5UART = Console_Port_Tbl[minor].ulCtrlPort1;
@@ -220,10 +220,10 @@ MG5UART_STATIC void mg5uart_initialize_context(
MG5UART_STATIC void mg5uart_init(int minor)
{
unsigned32 pMG5UART_port;
unsigned32 pMG5UART;
unsigned32 cmdSave;
unsigned32 shift;
uint32_t pMG5UART_port;
uint32_t pMG5UART;
uint32_t cmdSave;
uint32_t shift;
mg5uart_context *pmg5uartContext;
@@ -269,12 +269,12 @@ MG5UART_STATIC int mg5uart_open(
void *arg
)
{
unsigned32 pMG5UART;
unsigned32 pMG5UART_port;
unsigned32 vector;
unsigned32 cmd, cmdSave;
unsigned32 baudcmd;
unsigned32 shift;
uint32_t pMG5UART;
uint32_t pMG5UART_port;
uint32_t vector;
uint32_t cmd, cmdSave;
uint32_t baudcmd;
uint32_t shift;
rtems_interrupt_level Irql;
@@ -326,10 +326,10 @@ MG5UART_STATIC int mg5uart_close(
void *arg
)
{
unsigned32 pMG5UART;
unsigned32 pMG5UART_port;
unsigned32 cmd, cmdSave;
unsigned32 shift;
uint32_t pMG5UART;
uint32_t pMG5UART_port;
uint32_t cmd, cmdSave;
uint32_t shift;
rtems_interrupt_level Irql;
pMG5UART = Console_Port_Tbl[minor].ulCtrlPort1;
@@ -374,9 +374,9 @@ MG5UART_STATIC void mg5uart_write_polled(
char c
)
{
unsigned32 pMG5UART;
unsigned32 pMG5UART_port;
unsigned32 status;
uint32_t pMG5UART;
uint32_t pMG5UART_port;
uint32_t status;
int shift;
int timeout;
@@ -474,10 +474,10 @@ __ISR(rx_ready, MG5UART_IRQ_RX_READY)
MG5UART_STATIC void mg5uart_process_isr_rx_error(
int minor,
unsigned32 mask
uint32_t mask
)
{
unsigned32 pMG5UART;
uint32_t pMG5UART;
int shift;
pMG5UART = Console_Port_Tbl[minor].ulCtrlPort1;
@@ -519,10 +519,10 @@ MG5UART_STATIC void mg5uart_process_isr_rx_overrun_error(
MG5UART_STATIC void mg5uart_process_tx_isr(
int minor,
unsigned32 source
uint32_t source
)
{
unsigned32 pMG5UART;
uint32_t pMG5UART;
int shift;
pMG5UART = Console_Port_Tbl[minor].ulCtrlPort1;
@@ -579,7 +579,7 @@ MG5UART_STATIC void mg5uart_process_isr_rx_ready(
int minor
)
{
unsigned32 pMG5UART_port;
uint32_t pMG5UART_port;
unsigned char c;
pMG5UART_port = Console_Port_Tbl[minor].ulCtrlPort2;
@@ -638,8 +638,8 @@ MG5UART_STATIC int mg5uart_write_support_int(
int len
)
{
unsigned32 Irql;
unsigned32 pMG5UART_port;
uint32_t Irql;
uint32_t pMG5UART_port;
pMG5UART_port = Console_Port_Tbl[minor].ulCtrlPort2;
@@ -712,10 +712,10 @@ MG5UART_STATIC int mg5uart_inbyte_nonblocking_polled(
int minor
)
{
unsigned32 pMG5UART;
unsigned32 pMG5UART_port;
unsigned32 status;
unsigned32 tmp,shift;
uint32_t pMG5UART;
uint32_t pMG5UART_port;
uint32_t status;
uint32_t tmp,shift;
pMG5UART = Console_Port_Tbl[minor].ulCtrlPort1;
pMG5UART_port = Console_Port_Tbl[minor].ulCtrlPort2;
@@ -754,9 +754,9 @@ MG5UART_STATIC int mg5uart_baud_rate(
unsigned int *code
)
{
rtems_unsigned32 clock;
rtems_unsigned32 tmp_code;
rtems_unsigned32 baud_requested;
uint32_t clock;
uint32_t tmp_code;
uint32_t baud_requested;
baud_requested = baud & CBAUD;
if (!baud_requested)
@@ -764,7 +764,7 @@ MG5UART_STATIC int mg5uart_baud_rate(
baud_requested = termios_baud_to_number( baud_requested );
clock = (rtems_unsigned32) Console_Port_Tbl[minor].ulClock;
clock = (uint32_t ) Console_Port_Tbl[minor].ulClock;
if (!clock)
rtems_fatal_error_occurred(RTEMS_INVALID_NUMBER);
@@ -810,9 +810,9 @@ MG5UART_STATIC void mg5uart_enable_interrupts(
int mask
)
{
unsigned32 pMG5UART;
unsigned32 maskSave;
unsigned32 shift;
uint32_t pMG5UART;
uint32_t maskSave;
uint32_t shift;
rtems_interrupt_level Irql;
pMG5UART = Console_Port_Tbl[minor].ulCtrlPort1;

12
c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.h
View File

@@ -82,15 +82,15 @@ extern console_fns mg5uart_fns_polled;
* Default register access routines
*/
unsigned32 mg5uart_get_register( /* registers are on 32-bit boundaries */
unsigned32 ulCtrlPort, /* and accessed as word */
unsigned32 ucRegNum
uint32_t mg5uart_get_register( /* registers are on 32-bit boundaries */
uint32_t ulCtrlPort, /* and accessed as word */
uint32_t ucRegNum
);
void mg5uart_set_register(
unsigned32 ulCtrlPort,
unsigned32 ucRegNum,
unsigned32 ucData
uint32_t ulCtrlPort,
uint32_t ucRegNum,
uint32_t ucData
);
#ifdef __cplusplus

16
c/src/lib/libcpu/mips/mongoosev/duart/mg5uart_reg.c
View File

@@ -2,7 +2,7 @@
* This file contains a typical set of register access routines which may be
* used with the mg5uart chip if accesses to the chip are as follows:
*
* + registers are accessed as unsigned32's
* + registers are accessed as uint32_t 's
* + registers are only u32-aligned (no address gaps)
*
* COPYRIGHT (c) 1989-2001.
@@ -20,7 +20,7 @@
#ifndef _MG5UART_MULTIPLIER
#define _MG5UART_MULTIPLIER 1
#define _MG5UART_NAME(_X) _X
#define _MG5UART_TYPE unsigned32
#define _MG5UART_TYPE uint32_t
#endif
#define CALCULATE_REGISTER_ADDRESS( _base, _reg ) \
@@ -30,9 +30,9 @@
* MG5UART Get Register Routine
*/
unsigned8 _MG5UART_NAME(mg5uart_get_register)(
unsigned32 ulCtrlPort,
unsigned8 ucRegNum
uint8_t _MG5UART_NAME(mg5uart_get_register)(
uint32_t ulCtrlPort,
uint8_t ucRegNum
)
{
_MG5UART_TYPE *port;
@@ -47,9 +47,9 @@ unsigned8 _MG5UART_NAME(mg5uart_get_register)(
*/
void _MG5UART_NAME(mg5uart_set_register)(
unsigned32 ulCtrlPort,
unsigned8 ucRegNum,
unsigned8 ucData
uint32_t ulCtrlPort,
uint8_t ucRegNum,
uint8_t ucData
)
{
_MG5UART_TYPE *port;

8
c/src/lib/libcpu/mips/mongoosev/include/mongoose-v.h
View File

@@ -20,16 +20,16 @@
#define MONGOOSEV_READ( _base ) \
( *((volatile unsigned32 *)(_base)) )
( *((volatile uint32_t *)(_base)) )
#define MONGOOSEV_WRITE( _base, _value ) \
( *((volatile unsigned32 *)(_base)) = (_value) )
( *((volatile uint32_t *)(_base)) = (_value) )
#define MONGOOSEV_READ_REGISTER( _base, _register ) \
( *((volatile unsigned32 *)((_base) + (_register))) )
( *((volatile uint32_t *)((_base) + (_register))) )
#define MONGOOSEV_WRITE_REGISTER( _base, _register, _value ) \
( *((volatile unsigned32 *)((_base) + (_register))) = (_value) )
( *((volatile uint32_t *)((_base) + (_register))) = (_value) )

20
c/src/lib/libcpu/mips/mongoosev/vectorisrs/vectorisrs.c
View File

@@ -41,11 +41,11 @@ int mips_default_isr( int vector )
/* userspace routine to assert either software interrupt */
int assertSoftwareInterrupt( unsigned32 n )
int assertSoftwareInterrupt( uint32_t n )
{
if( n<2 )
{
unsigned32 c;
uint32_t c;
mips_get_cause(c);
c = ((n+1) << CAUSE_IPSHIFT);
@@ -76,8 +76,8 @@ int assertSoftwareInterrupt( unsigned32 n )
//
#if 0
#define SET_ISR_FLAG( offset ) *((unsigned32 *)(0x8001e000+offset)) = 1;
#define CLR_ISR_FLAG( offset ) *((unsigned32 *)(0x8001e000+offset)) = 0;
#define SET_ISR_FLAG( offset ) *((uint32_t *)(0x8001e000+offset)) = 1;
#define CLR_ISR_FLAG( offset ) *((uint32_t *)(0x8001e000+offset)) = 0;
#else
#define SET_ISR_FLAG( offset )
#define CLR_ISR_FLAG( offset )
@@ -88,10 +88,10 @@ int assertSoftwareInterrupt( unsigned32 n )
static volatile unsigned32 _ivcause, _ivsr;
static volatile uint32_t _ivcause, _ivsr;
static unsigned32 READ_CAUSE(void)
static uint32_t READ_CAUSE(void)
{
mips_get_cause( _ivcause );
_ivcause &= SR_IMASK; // mask off everything other than the interrupt bits
@@ -116,7 +116,7 @@ static unsigned32 READ_CAUSE(void)
//
void mips_vector_isr_handlers( CPU_Interrupt_frame *frame )
{
unsigned32 cshifted;
uint32_t cshifted;
/* mips_get_sr( sr ); */
_ivsr = frame->c0_sr;
@@ -190,9 +190,9 @@ void mips_vector_isr_handlers( CPU_Interrupt_frame *frame )
if ( cshifted & 0x80 ) /* IP[5] ==> INT5, peripheral interrupt */
{
unsigned32 bit;
unsigned32 pf_icr, pf_mask, pf_reset = 0;
unsigned32 i, m;
uint32_t bit;
uint32_t pf_icr, pf_mask, pf_reset = 0;
uint32_t i, m;
pf_icr = MONGOOSEV_READ( MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_CAUSE_REGISTER );

6
c/src/lib/libcpu/mips/shared/interrupts/vectorexceptions.c
View File

@@ -71,7 +71,7 @@ void mips_dump_exception_frame( CPU_Interrupt_frame *frame )
unsigned int *frame_u32;
int i, j;
frame_u32 = (unsigned32 *)frame;
frame_u32 = (uint32_t *)frame;
for(i=0; dumpregs[i].offset > -1; i++)
{
printk(" %s", dumpregs[i].name);
@@ -112,8 +112,8 @@ void mips_default_exception_code_handler( int exc, CPU_Interrupt_frame *frame )
void mips_vector_exceptions( CPU_Interrupt_frame *frame )
{
unsigned32 cause;
unsigned32 exc;
uint32_t cause;
uint32_t exc;
mips_get_cause( cause );
exc = (cause >> 2) & 0x1f;

8
c/src/lib/libcpu/mips/timer/timer.c
View File

@@ -50,10 +50,10 @@
#define CLOCKS_PER_MICROSECOND ( CPU_CLOCK_RATE_MHZ )
#define TIMER_MAX_VALUE 0xffffffff
extern unsigned32 mips_read_timer( void );
extern uint32_t mips_read_timer( void );
static rtems_boolean Timer_driver_Find_average_overhead;
static unsigned32 Timer_initial_value = 0;
static uint32_t Timer_initial_value = 0;
void Timer_initialize( void )
{
@@ -82,8 +82,8 @@ void Timer_initialize( void )
int Read_timer( void )
{
unsigned64 clicks;
unsigned32 total;
uint64_t clicks;
uint32_t total;
/*
* Read the timer and see how many clicks it has been since we started.

4
c/src/lib/libcpu/mips/tx39/include/tx3904.h
View File

@@ -28,10 +28,10 @@
#define TX3904_TIMER_TRR 0xF0
#define TX3904_TIMER_READ( _base, _register ) \
*((volatile unsigned32 *)((_base) + (_register)))
*((volatile uint32_t *)((_base) + (_register)))
#define TX3904_TIMER_WRITE( _base, _register, _value ) \
*((volatile unsigned32 *)((_base) + (_register))) = (_value)
*((volatile uint32_t *)((_base) + (_register))) = (_value)
/*
* Interrupt Vector Numbers