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validation: Test rtems_interrupt_raise_on()

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Update #3269.
This commit is contained in:
Sebastian Huber
2021-07-05 16:35:51 +02:00
parent 163c1fd1a6
commit 32c0cd8ff8
4 changed files with 722 additions and 2 deletions
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1
spec/build/testsuites/validation/validation-0.yml
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@@ -21,6 +21,7 @@ source:
- testsuites/validation/tc-intr-get-attributes.c
- testsuites/validation/tc-intr-is-pending.c
- testsuites/validation/tc-intr-raise.c
- testsuites/validation/tc-intr-raise-on.c
- testsuites/validation/tc-intr-vector-disable.c
- testsuites/validation/tc-intr-vector-enable.c
- testsuites/validation/tc-intr-vector-is-enabled.c

709
testsuites/validation/tc-intr-raise-on.c Normal file
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@@ -0,0 +1,709 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSTestCaseRtemsIntrReqRaiseOn
*/
/*
* Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* This file is part of the RTEMS quality process and was automatically
* generated. If you find something that needs to be fixed or
* worded better please post a report or patch to an RTEMS mailing list
* or raise a bug report:
*
* https://www.rtems.org/bugs.html
*
* For information on updating and regenerating please refer to the How-To
* section in the Software Requirements Engineering chapter of the
* RTEMS Software Engineering manual. The manual is provided as a part of
* a release. For development sources please refer to the online
* documentation at:
*
* https://docs.rtems.org
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <string.h>
#include <bsp/irq-generic.h>
#include <rtems/irq-extension.h>
#include "tx-support.h"
#include <rtems/test.h>
/**
* @defgroup RTEMSTestCaseRtemsIntrReqRaiseOn spec:/rtems/intr/req/raise-on
*
* @ingroup RTEMSTestSuiteTestsuitesValidation0
*
* @{
*/
typedef enum {
RtemsIntrReqRaiseOn_Pre_Vector_Valid,
RtemsIntrReqRaiseOn_Pre_Vector_Invalid,
RtemsIntrReqRaiseOn_Pre_Vector_NA
} RtemsIntrReqRaiseOn_Pre_Vector;
typedef enum {
RtemsIntrReqRaiseOn_Pre_CPU_Online,
RtemsIntrReqRaiseOn_Pre_CPU_NotOnline,
RtemsIntrReqRaiseOn_Pre_CPU_NotConf,
RtemsIntrReqRaiseOn_Pre_CPU_NA
} RtemsIntrReqRaiseOn_Pre_CPU;
typedef enum {
RtemsIntrReqRaiseOn_Pre_CanRaiseOn_Yes,
RtemsIntrReqRaiseOn_Pre_CanRaiseOn_No,
RtemsIntrReqRaiseOn_Pre_CanRaiseOn_NA
} RtemsIntrReqRaiseOn_Pre_CanRaiseOn;
typedef enum {
RtemsIntrReqRaiseOn_Post_Status_Ok,
RtemsIntrReqRaiseOn_Post_Status_InvId,
RtemsIntrReqRaiseOn_Post_Status_NotConf,
RtemsIntrReqRaiseOn_Post_Status_IncStat,
RtemsIntrReqRaiseOn_Post_Status_Unsat,
RtemsIntrReqRaiseOn_Post_Status_NA
} RtemsIntrReqRaiseOn_Post_Status;
typedef enum {
RtemsIntrReqRaiseOn_Post_Pending_Yes,
RtemsIntrReqRaiseOn_Post_Pending_No,
RtemsIntrReqRaiseOn_Post_Pending_NA
} RtemsIntrReqRaiseOn_Post_Pending;
/**
* @brief Test context for spec:/rtems/intr/req/raise-on test case.
*/
typedef struct {
/**
* @brief This member contains the count of serviced interrupts.
*/
volatile uint32_t interrupt_count;
/**
* @brief If this member is true, then the interrupt shall be cleared.
*/
bool do_clear;
/**
* @brief This member contains the current vector number.
*/
rtems_vector_number vector;
/**
* @brief This member contains some valid vector number.
*/
rtems_vector_number some_vector;
/**
* @brief If this member is true, then the ``vector`` parameter shall be
* valid.
*/
bool valid_vector;
/**
* @brief This member specifies the ``cpu_index`` parameter.
*/
uint32_t cpu_index;
/**
* @brief This member contains the return value of the
* rtems_interrupt_raise_on() call.
*/
rtems_status_code status;
/**
* @brief This member defines the pre-condition states for the next action.
*/
size_t pcs[ 3 ];
/**
* @brief This member indicates if the test action loop is currently
* executed.
*/
bool in_action_loop;
} RtemsIntrReqRaiseOn_Context;
static RtemsIntrReqRaiseOn_Context
RtemsIntrReqRaiseOn_Instance;
static const char * const RtemsIntrReqRaiseOn_PreDesc_Vector[] = {
"Valid",
"Invalid",
"NA"
};
static const char * const RtemsIntrReqRaiseOn_PreDesc_CPU[] = {
"Online",
"NotOnline",
"NotConf",
"NA"
};
static const char * const RtemsIntrReqRaiseOn_PreDesc_CanRaiseOn[] = {
"Yes",
"No",
"NA"
};
static const char * const * const RtemsIntrReqRaiseOn_PreDesc[] = {
RtemsIntrReqRaiseOn_PreDesc_Vector,
RtemsIntrReqRaiseOn_PreDesc_CPU,
RtemsIntrReqRaiseOn_PreDesc_CanRaiseOn,
NULL
};
typedef RtemsIntrReqRaiseOn_Context Context;
static bool IsEnabled( const Context *ctx )
{
rtems_status_code sc;
bool enabled;
enabled = false;
sc = rtems_interrupt_vector_is_enabled( ctx->vector, &enabled );
T_rsc_success( sc );
return enabled;
}
static bool IsPending( const Context *ctx )
{
rtems_status_code sc;
bool pending;
pending = false;
sc = rtems_interrupt_is_pending( ctx->vector, &pending );
T_rsc_success( sc );
return pending;
}
static void Disable( const Context *ctx )
{
rtems_status_code sc;
sc = rtems_interrupt_vector_disable( ctx->vector );
T_rsc_success( sc );
}
static void RaiseOn( const Context *ctx )
{
rtems_status_code sc;
sc = rtems_interrupt_raise_on( ctx->vector, ctx->cpu_index );
T_rsc_success( sc );
}
static void EntryRoutine( void *arg )
{
Context *ctx;
uint32_t count;
(void) arg;
ctx = T_fixture_context();
count = ctx->interrupt_count;
ctx->interrupt_count = count + 1;
if ( ctx->do_clear ) {
rtems_status_code sc;
sc = rtems_interrupt_clear( ctx->vector );
T_rsc_success( sc );
}
if ( count > 2 ) {
/* Some interrupts are probably cased by a peripheral */
Disable( ctx );
}
}
static void CheckUnsatisfied( const Context *ctx )
{
rtems_status_code sc;
bool pending_before;
bool pending_after;
pending_before = true;
sc = rtems_interrupt_is_pending( ctx->vector, &pending_before );
T_rsc_success( sc );
sc = rtems_interrupt_raise_on( ctx->vector, ctx->cpu_index );
T_rsc( sc, RTEMS_UNSATISFIED );
pending_after = !pending_before;
sc = rtems_interrupt_is_pending( ctx->vector, &pending_after );
T_rsc_success( sc );
T_eq( pending_before, pending_after );
}
static void CheckRaiseOn(
Context *ctx,
const rtems_interrupt_attributes *attr,
bool has_installed_entries
)
{
rtems_status_code sc;
if ( !attr->can_raise_on ) {
CheckUnsatisfied( ctx );
} else if ( has_installed_entries ) {
/* We cannot test this vector, since it is used by a device driver */
} else if ( !attr->is_maskable ) {
/* We can only safely test maskable interrupts */
} else if ( IsPending( ctx ) ) {
/*
* If there is already an interrupt pending, then it is probably raised
* by a peripheral which we cannot control.
*/
} else if (
attr->can_disable && ( attr->can_clear || attr->cleared_by_acknowledge )
) {
rtems_interrupt_entry entry;
rtems_interrupt_level level;
ctx->interrupt_count = 0;
ctx->do_clear = attr->can_clear && !attr->cleared_by_acknowledge;
rtems_interrupt_entry_initialize( &entry, EntryRoutine, ctx, "Info" );
sc = rtems_interrupt_entry_install(
ctx->vector,
RTEMS_INTERRUPT_UNIQUE,
&entry
);
T_rsc_success( sc );
if ( !IsPending( ctx) && ( attr->can_enable || IsEnabled( ctx ) ) ) {
T_false( IsPending( ctx ) );
if ( attr->can_disable ) {
Disable( ctx );
RaiseOn( ctx );
T_true( IsPending( ctx ) );
sc = rtems_interrupt_vector_enable( ctx->vector );
T_rsc_success( sc );
while ( ctx->interrupt_count < 1 ) {
/* Wait */
}
} else {
++ctx->interrupt_count;
}
T_false( IsPending( ctx ) );
rtems_interrupt_local_disable( level );
RaiseOn( ctx );
T_true( IsPending( ctx ) );
rtems_interrupt_local_enable( level );
while ( ctx->interrupt_count < 2 ) {
/* Wait */
}
T_false( IsPending( ctx ) );
}
sc = rtems_interrupt_entry_remove( ctx->vector, &entry );
T_rsc_success( sc );
}
}
static void RtemsIntrReqRaiseOn_Pre_Vector_Prepare(
RtemsIntrReqRaiseOn_Context *ctx,
RtemsIntrReqRaiseOn_Pre_Vector state
)
{
switch ( state ) {
case RtemsIntrReqRaiseOn_Pre_Vector_Valid: {
/*
* While the ``vector`` parameter is associated with an interrupt vector.
*/
ctx->valid_vector = true;
break;
}
case RtemsIntrReqRaiseOn_Pre_Vector_Invalid: {
/*
* While the ``vector`` parameter is not associated with an interrupt
* vector.
*/
ctx->valid_vector = false;
break;
}
case RtemsIntrReqRaiseOn_Pre_Vector_NA:
break;
}
}
static void RtemsIntrReqRaiseOn_Pre_CPU_Prepare(
RtemsIntrReqRaiseOn_Context *ctx,
RtemsIntrReqRaiseOn_Pre_CPU state
)
{
switch ( state ) {
case RtemsIntrReqRaiseOn_Pre_CPU_Online: {
/*
* While the ``cpu_index`` parameter is associated with a configured
* processor, while the processor specified by ``cpu_index`` is not
* online.
*/
ctx->cpu_index = 0;
break;
}
case RtemsIntrReqRaiseOn_Pre_CPU_NotOnline: {
/*
* While the ``cpu_index`` parameter is associated with a configured
* processor, while the processor specified by ``cpu_index`` is not
* online.
*/
ctx->cpu_index = 4;
break;
}
case RtemsIntrReqRaiseOn_Pre_CPU_NotConf: {
/*
* While the ``cpu_index`` parameter is not associated with a configured
* processor.
*/
ctx->cpu_index = 5;
break;
}
case RtemsIntrReqRaiseOn_Pre_CPU_NA:
break;
}
}
static void RtemsIntrReqRaiseOn_Pre_CanRaiseOn_Prepare(
RtemsIntrReqRaiseOn_Context *ctx,
RtemsIntrReqRaiseOn_Pre_CanRaiseOn state
)
{
switch ( state ) {
case RtemsIntrReqRaiseOn_Pre_CanRaiseOn_Yes: {
/*
* While the interrupt vector associated with the ``vector`` parameter
* can be raised on a processor.
*/
/*
* This pre-condition depends on the attributes of an interrupt vector,
* see CheckRaiseOn().
*/
break;
}
case RtemsIntrReqRaiseOn_Pre_CanRaiseOn_No: {
/*
* While the interrupt vector associated with the ``vector`` parameter
* cannot be raised on a processor.
*/
/*
* This pre-condition depends on the attributes of an interrupt vector,
* see CheckRaiseOn().
*/
break;
}
case RtemsIntrReqRaiseOn_Pre_CanRaiseOn_NA:
break;
}
}
static void RtemsIntrReqRaiseOn_Post_Status_Check(
RtemsIntrReqRaiseOn_Context *ctx,
RtemsIntrReqRaiseOn_Post_Status state
)
{
switch ( state ) {
case RtemsIntrReqRaiseOn_Post_Status_Ok: {
/*
* The return status of rtems_interrupt_raise_on() shall be
* RTEMS_SUCCESSFUL.
*/
/* Validation is done by CheckRaiseOn() for each interrupt vector */
break;
}
case RtemsIntrReqRaiseOn_Post_Status_InvId: {
/*
* The return status of rtems_interrupt_raise_on() shall be
* RTEMS_INVALID_ID.
*/
T_rsc( ctx->status, RTEMS_INVALID_ID );
break;
}
case RtemsIntrReqRaiseOn_Post_Status_NotConf: {
/*
* The return status of rtems_interrupt_raise_on() shall be
* RTEMS_NOT_CONFIGURED.
*/
T_rsc( ctx->status, RTEMS_NOT_CONFIGURED );
break;
}
case RtemsIntrReqRaiseOn_Post_Status_IncStat: {
/*
* The return status of rtems_interrupt_raise_on() shall be
* RTEMS_INCORRECT_STATE.
*/
T_rsc( ctx->status, RTEMS_INCORRECT_STATE );
break;
}
case RtemsIntrReqRaiseOn_Post_Status_Unsat: {
/*
* The return status of rtems_interrupt_raise_on() shall be
* RTEMS_UNSATISFIED.
*/
/* Validation is done by CheckRaiseOn() for each interrupt vector */
break;
}
case RtemsIntrReqRaiseOn_Post_Status_NA:
break;
}
}
static void RtemsIntrReqRaiseOn_Post_Pending_Check(
RtemsIntrReqRaiseOn_Context *ctx,
RtemsIntrReqRaiseOn_Post_Pending state
)
{
switch ( state ) {
case RtemsIntrReqRaiseOn_Post_Pending_Yes: {
/*
* The interrupt associated with the interrupt vector specified by
* ``vector`` shall be made pending by the rtems_interrupt_raise_on()
* call.
*/
/* Validation is done by CheckRaiseOn() for each interrupt vector */
break;
}
case RtemsIntrReqRaiseOn_Post_Pending_No: {
/*
* The interrupt associated with the interrupt vector specified by
* ``vector`` shall not be made pending by the rtems_interrupt_raise_on()
* call.
*/
/* Validation is done by CheckRaiseOn() for each interrupt vector */
break;
}
case RtemsIntrReqRaiseOn_Post_Pending_NA:
break;
}
}
static void RtemsIntrReqRaiseOn_Setup( RtemsIntrReqRaiseOn_Context *ctx )
{
ctx->some_vector = GetValidInterruptVectorNumber( NULL );
}
static void RtemsIntrReqRaiseOn_Setup_Wrap( void *arg )
{
RtemsIntrReqRaiseOn_Context *ctx;
ctx = arg;
ctx->in_action_loop = false;
RtemsIntrReqRaiseOn_Setup( ctx );
}
static void RtemsIntrReqRaiseOn_Action( RtemsIntrReqRaiseOn_Context *ctx )
{
if ( ctx->valid_vector && ctx->cpu_index == 0 ) {
for (
ctx->vector = 0;
ctx->vector < BSP_INTERRUPT_VECTOR_COUNT;
++ctx->vector
) {
rtems_status_code sc;
rtems_interrupt_attributes attr;
bool has_installed_entries;
memset( &attr, 0, sizeof( attr ) );
sc = rtems_interrupt_get_attributes( ctx->vector, &attr );
if ( sc == RTEMS_INVALID_ID ) {
continue;
}
T_rsc_success( sc );
has_installed_entries = HasInterruptVectorEntriesInstalled( ctx->vector );
CheckRaiseOn( ctx, &attr, has_installed_entries );
}
} else {
if ( ctx->valid_vector ) {
ctx->vector = ctx->some_vector;
} else {
ctx->vector = BSP_INTERRUPT_VECTOR_COUNT;
}
ctx->status = rtems_interrupt_raise_on( ctx->vector, ctx->cpu_index );
}
}
typedef struct {
uint16_t Skip : 1;
uint16_t Pre_Vector_NA : 1;
uint16_t Pre_CPU_NA : 1;
uint16_t Pre_CanRaiseOn_NA : 1;
uint16_t Post_Status : 3;
uint16_t Post_Pending : 2;
} RtemsIntrReqRaiseOn_Entry;
static const RtemsIntrReqRaiseOn_Entry
RtemsIntrReqRaiseOn_Entries[] = {
{ 0, 0, 0, 1, RtemsIntrReqRaiseOn_Post_Status_InvId,
RtemsIntrReqRaiseOn_Post_Pending_NA },
#if defined(RTEMS_SMP)
{ 0, 0, 0, 0, RtemsIntrReqRaiseOn_Post_Status_IncStat,
RtemsIntrReqRaiseOn_Post_Pending_No },
#else
{ 1, 0, 0, 0, RtemsIntrReqRaiseOn_Post_Status_NA,
RtemsIntrReqRaiseOn_Post_Pending_NA },
#endif
{ 0, 0, 0, 0, RtemsIntrReqRaiseOn_Post_Status_NotConf,
RtemsIntrReqRaiseOn_Post_Pending_No },
#if defined(RTEMS_SMP)
{ 0, 0, 0, 1, RtemsIntrReqRaiseOn_Post_Status_InvId,
RtemsIntrReqRaiseOn_Post_Pending_NA },
#else
{ 1, 0, 0, 0, RtemsIntrReqRaiseOn_Post_Status_NA,
RtemsIntrReqRaiseOn_Post_Pending_NA },
#endif
{ 0, 0, 0, 0, RtemsIntrReqRaiseOn_Post_Status_Ok,
RtemsIntrReqRaiseOn_Post_Pending_Yes },
{ 0, 0, 0, 0, RtemsIntrReqRaiseOn_Post_Status_Unsat,
RtemsIntrReqRaiseOn_Post_Pending_No }
};
static const uint8_t
RtemsIntrReqRaiseOn_Map[] = {
4, 5, 1, 1, 2, 2, 0, 0, 3, 3, 0, 0
};
static size_t RtemsIntrReqRaiseOn_Scope( void *arg, char *buf, size_t n )
{
RtemsIntrReqRaiseOn_Context *ctx;
ctx = arg;
if ( ctx->in_action_loop ) {
return T_get_scope( RtemsIntrReqRaiseOn_PreDesc, buf, n, ctx->pcs );
}
return 0;
}
static T_fixture RtemsIntrReqRaiseOn_Fixture = {
.setup = RtemsIntrReqRaiseOn_Setup_Wrap,
.stop = NULL,
.teardown = NULL,
.scope = RtemsIntrReqRaiseOn_Scope,
.initial_context = &RtemsIntrReqRaiseOn_Instance
};
static inline RtemsIntrReqRaiseOn_Entry RtemsIntrReqRaiseOn_GetEntry(
size_t index
)
{
return RtemsIntrReqRaiseOn_Entries[
RtemsIntrReqRaiseOn_Map[ index ]
];
}
/**
* @fn void T_case_body_RtemsIntrReqRaiseOn( void )
*/
T_TEST_CASE_FIXTURE( RtemsIntrReqRaiseOn, &RtemsIntrReqRaiseOn_Fixture )
{
RtemsIntrReqRaiseOn_Context *ctx;
size_t index;
ctx = T_fixture_context();
ctx->in_action_loop = true;
index = 0;
for (
ctx->pcs[ 0 ] = RtemsIntrReqRaiseOn_Pre_Vector_Valid;
ctx->pcs[ 0 ] < RtemsIntrReqRaiseOn_Pre_Vector_NA;
++ctx->pcs[ 0 ]
) {
for (
ctx->pcs[ 1 ] = RtemsIntrReqRaiseOn_Pre_CPU_Online;
ctx->pcs[ 1 ] < RtemsIntrReqRaiseOn_Pre_CPU_NA;
++ctx->pcs[ 1 ]
) {
for (
ctx->pcs[ 2 ] = RtemsIntrReqRaiseOn_Pre_CanRaiseOn_Yes;
ctx->pcs[ 2 ] < RtemsIntrReqRaiseOn_Pre_CanRaiseOn_NA;
++ctx->pcs[ 2 ]
) {
RtemsIntrReqRaiseOn_Entry entry;
size_t pcs[ 3 ];
entry = RtemsIntrReqRaiseOn_GetEntry( index );
++index;
if ( entry.Skip ) {
continue;
}
memcpy( pcs, ctx->pcs, sizeof( pcs ) );
if ( entry.Pre_CanRaiseOn_NA ) {
ctx->pcs[ 2 ] = RtemsIntrReqRaiseOn_Pre_CanRaiseOn_NA;
}
RtemsIntrReqRaiseOn_Pre_Vector_Prepare( ctx, ctx->pcs[ 0 ] );
RtemsIntrReqRaiseOn_Pre_CPU_Prepare( ctx, ctx->pcs[ 1 ] );
RtemsIntrReqRaiseOn_Pre_CanRaiseOn_Prepare( ctx, ctx->pcs[ 2 ] );
RtemsIntrReqRaiseOn_Action( ctx );
RtemsIntrReqRaiseOn_Post_Status_Check( ctx, entry.Post_Status );
RtemsIntrReqRaiseOn_Post_Pending_Check( ctx, entry.Post_Pending );
memcpy( ctx->pcs, pcs, sizeof( ctx->pcs ) );
}
}
}
}
/** @} */

12
testsuites/validation/ts-default.h
View File

@@ -177,7 +177,8 @@ static void task_stack_deallocate( void *stack )
#define CONFIGURE_INIT_TASK_CONSTRUCT_STORAGE_SIZE TASK_STORAGE_SIZE
#if defined(RTEMS_SMP) && CONFIGURE_MAXIMUM_PROCESSORS == 4
#if defined( RTEMS_SMP ) && \
( CONFIGURE_MAXIMUM_PROCESSORS == 4 || CONFIGURE_MAXIMUM_PROCESSORS == 5 )
#define CONFIGURE_SCHEDULER_EDF_SMP
@@ -194,11 +195,20 @@ RTEMS_SCHEDULER_EDF_SMP(c);
RTEMS_SCHEDULER_TABLE_EDF_SMP(b, rtems_build_name('B', ' ', ' ', ' ')), \
RTEMS_SCHEDULER_TABLE_EDF_SMP(c, rtems_build_name('C', ' ', ' ', ' '))
#if CONFIGURE_MAXIMUM_PROCESSORS == 5
#define CONFIGURE_SCHEDULER_ASSIGNMENTS \
RTEMS_SCHEDULER_ASSIGN(0, RTEMS_SCHEDULER_ASSIGN_PROCESSOR_MANDATORY), \
RTEMS_SCHEDULER_ASSIGN(1, RTEMS_SCHEDULER_ASSIGN_PROCESSOR_OPTIONAL), \
RTEMS_SCHEDULER_ASSIGN(2, RTEMS_SCHEDULER_ASSIGN_PROCESSOR_OPTIONAL), \
RTEMS_SCHEDULER_ASSIGN(2, RTEMS_SCHEDULER_ASSIGN_PROCESSOR_OPTIONAL), \
RTEMS_SCHEDULER_ASSIGN_NO_SCHEDULER
#else
#define CONFIGURE_SCHEDULER_ASSIGNMENTS \
RTEMS_SCHEDULER_ASSIGN(0, RTEMS_SCHEDULER_ASSIGN_PROCESSOR_MANDATORY), \
RTEMS_SCHEDULER_ASSIGN(1, RTEMS_SCHEDULER_ASSIGN_PROCESSOR_OPTIONAL), \
RTEMS_SCHEDULER_ASSIGN(2, RTEMS_SCHEDULER_ASSIGN_PROCESSOR_OPTIONAL), \
RTEMS_SCHEDULER_ASSIGN(2, RTEMS_SCHEDULER_ASSIGN_PROCESSOR_OPTIONAL)
#endif
#endif /* RTEMS_SMP */

2
testsuites/validation/ts-validation-0.c
View File

@@ -70,7 +70,7 @@
const char rtems_test_name[] = "Validation0";
#define CONFIGURE_MAXIMUM_PROCESSORS 4
#define CONFIGURE_MAXIMUM_PROCESSORS 5
#include "ts-default.h"