forked from Imagelibrary/rtems
score: Remove _CPU_Initialize_vectors()
This CPU port macro was not used. Since the _ISR_Vector_table[] is statically allocated, CPU ports could initialize this table in _CPU_Initialize() if necessary. Remove _CPU_Initialize_vectors() to simplify the CPU port interface.
This commit is contained in:
@@ -307,15 +307,6 @@ typedef struct {
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*/
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/**@{**/
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/**
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* Support routine to initialize the RTEMS vector table after it is allocated.
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*
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* Port Specific Information:
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*
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* XXX document implementation including references if appropriate
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*/
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#define _CPU_Initialize_vectors()
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/**
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* Disable all interrupts for an RTEMS critical section. The previous
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* level is returned in @a _isr_cookie.
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@@ -414,15 +414,6 @@ extern Context_Control_fp _CPU_Null_fp_context;
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*/
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/**@{**/
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/**
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* Support routine to initialize the RTEMS vector table after it is allocated.
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*
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* Port Specific Information:
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*
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* XXX document implementation including references if appropriate
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*/
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#define _CPU_Initialize_vectors()
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/**
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* Disable all interrupts for an RTEMS critical section. The previous
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* level is returned in @a _isr_cookie.
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@@ -350,15 +350,12 @@ extern void* _VBR;
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* ISR handler macros
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*
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* These macros perform the following functions:
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* + initialize the RTEMS vector table
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* + disable all maskable CPU interrupts
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* + restore previous interrupt level (enable)
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* + temporarily restore interrupts (flash)
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* + set a particular level
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*/
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#define _CPU_Initialize_vectors()
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#define _CPU_ISR_Disable( _level ) \
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m68k_disable_interrupts( _level )
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@@ -255,11 +255,6 @@ typedef struct {
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* ISR handler macros
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*/
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/*
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* Support routine to initialize the RTEMS vector table after it is allocated.
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*/
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#define _CPU_Initialize_vectors()
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/*
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* Disable all interrupts for an RTEMS critical section. The previous
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* level is returned in _level.
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@@ -172,8 +172,6 @@ typedef struct {
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uint32_t ipending;
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} CPU_Exception_frame;
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#define _CPU_Initialize_vectors()
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/**
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* @brief Macro to disable interrupts.
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*
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@@ -615,17 +615,6 @@ extern Context_Control_fp _CPU_Null_fp_context;
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* ISR handler macros
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*/
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/**
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* @addtogroup RTEMSScoreCPUExampleInterrupt
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*
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* Support routine to initialize the RTEMS vector table after it is allocated.
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*
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* Port Specific Information:
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*
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* XXX document implementation including references if appropriate
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*/
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#define _CPU_Initialize_vectors()
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/**
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* @addtogroup RTEMSScoreCPUExampleInterrupt
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*
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@@ -243,16 +243,6 @@ typedef Context_Control CPU_Interrupt_frame;
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/* ISR handler macros */
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/*
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* Support routine to initialize the RTEMS vector table after it is allocated.
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*
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* NO_CPU Specific Information:
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*
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* XXX document implementation including references if appropriate
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*/
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#define _CPU_Initialize_vectors()
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/*
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* Disable all interrupts for an RTEMS critical section. The previous
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* level is returned in _level.
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@@ -147,8 +147,6 @@ typedef struct {
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#define CPU_PROVIDES_ISR_IS_IN_PROGRESS FALSE
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#define _CPU_Initialize_vectors()
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static inline uint32_t riscv_interrupt_disable( void )
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{
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unsigned long mstatus;
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@@ -366,14 +366,6 @@ void CPU_delay( uint32_t microseconds );
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* ISR handler macros
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*/
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/*
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* Support routine to initialize the RTEMS vector table after it is allocated.
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*
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* SH Specific Information: NONE
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*/
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#define _CPU_Initialize_vectors()
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/*
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* Disable all interrupts for an RTEMS critical section. The previous
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* level is returned in _level.
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@@ -747,11 +747,6 @@ extern const CPU_Trap_table_entry _CPU_Trap_slot_template;
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* ISR handler macros
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*/
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/**
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* Support routine to initialize the RTEMS vector table after it is allocated.
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*/
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#define _CPU_Initialize_vectors()
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/**
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* Disable all interrupts for a critical section. The previous
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* level is returned in _level.
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@@ -651,12 +651,6 @@ extern const CPU_Trap_table_entry _CPU_Trap_slot_template;
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* ISR handler macros
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*/
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/*
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* Support routine to initialize the RTEMS vector table after it is allocated.
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*/
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#define _CPU_Initialize_vectors()
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/*
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* Disable all interrupts for a critical section. The previous
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* level is returned in _level.
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@@ -155,8 +155,6 @@ typedef struct {
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#ifndef ASM
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#define _CPU_Initialize_vectors()
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#define _CPU_ISR_Enable(_level) \
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{ \
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amd64_enable_interrupts(); \
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@@ -44,10 +44,6 @@ void _ISR_Handler_initialization( void )
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_ISR_Nest_level = 0;
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#if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
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_CPU_Initialize_vectors();
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#endif
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stack_size = rtems_configuration_get_interrupt_stack_size();
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cpu_max = rtems_configuration_get_maximum_processors();
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stack_low = _ISR_Stack_area_begin;
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