2002-11-01 Joel Sherrill <joel@OARcorp.com>

* cpu.c: Currently only the mpc8260 BSP supports interrupt nesting.
	NOTE: These needs to be generalized as the patch is applied to other
	BSPs.

c/src/lib/libbsp/powerpc/support/new_exception_processing/ChangeLog

@@ -1,3 +1,9 @@
+2002-11-01	Joel Sherrill <joel@OARcorp.com>
+
+	* cpu.c: Currently only the mpc8260 BSP supports interrupt nesting.
+	NOTE: These needs to be generalized as the patch is applied to other
+	BSPs.
+
 2002-10-21	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
 
 	* .cvsignore: Reformat.

c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c

@@ -130,11 +130,19 @@ void _CPU_Install_interrupt_stack( void )
 
 boolean _ISR_Is_in_progress( void )
 {
+  /* 
+   *  Until the patch on PR288 is in all new exception BSPs, this is
+   *  the safest thing to do.
+   */
+#ifdef mpc8260
+  return (_ISR_Nest_level != 0);
+#else
   register unsigned int isr_nesting_level;
   /*
    * Move from special purpose register 0 (mfspr SPRG0, r3)
    */
   asm volatile ("mfspr	%0, 272" : "=r" (isr_nesting_level));
   return isr_nesting_level;
+#endif
 }
 

c/src/lib/libcpu/powerpc/new-exceptions/ChangeLog

@@ -1,3 +1,9 @@
+2002-11-01	Joel Sherrill <joel@OARcorp.com>
+
+	* cpu.c: Currently only the mpc8260 BSP supports interrupt nesting.
+	NOTE: These needs to be generalized as the patch is applied to other
+	BSPs.
+
 2002-10-21	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
 
 	* .cvsignore: Reformat.

c/src/lib/libcpu/powerpc/new-exceptions/cpu.c

@@ -130,11 +130,19 @@ void _CPU_Install_interrupt_stack( void )
 
 boolean _ISR_Is_in_progress( void )
 {
+  /* 
+   *  Until the patch on PR288 is in all new exception BSPs, this is
+   *  the safest thing to do.
+   */
+#ifdef mpc8260
+  return (_ISR_Nest_level != 0);
+#else
   register unsigned int isr_nesting_level;
   /*
    * Move from special purpose register 0 (mfspr SPRG0, r3)
    */
   asm volatile ("mfspr	%0, 272" : "=r" (isr_nesting_level));
   return isr_nesting_level;
+#endif
 }