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Patch from Eric Valette <valette@crf.canon.fr> and Yacine El Kolli

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<elkolli@crf.canon.fr> to add support for the mbx860_005b.
This commit is contained in:
Joel Sherrill
2000-07-06 20:36:48 +00:00
parent 55e4dcf30e
commit 168ba07c84
6 changed files with 151 additions and 19 deletions
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4
c/src/exec/sapi/include/confdefs.h
View File

@@ -991,7 +991,7 @@ rtems_configuration_table Configuration = {
(CONFIGURE_MAXIMUM_POSIX_THREADS == 0) && \
(CONFIGURE_MAXIMUM_ADA_TASKS == 0) && \
(CONFIGURE_MAXIMUM_ITRON_TASKS == 0)
#error "CONFIGURATION ERROR: No tasks or threads configured!!
#error "CONFIGURATION ERROR: No tasks or threads configured!!"
#endif
/*
@@ -1002,7 +1002,7 @@ rtems_configuration_table Configuration = {
#if !defined(CONFIGURE_RTEMS_INIT_TASKS_TABLE) && \
!defined(CONFIGURE_POSIX_INIT_THREAD_TABLE) && \
!defined(CONFIGURE_ITRON_INIT_TASK_TABLE)
#error "CONFIGURATION ERROR: No initialization tasks or threads configured!!
#error "CONFIGURATION ERROR: No initialization tasks or threads configured!!"
#endif
#endif

58
c/src/lib/libbsp/powerpc/mbx8xx/startup/imbx8xx.c
View File

@@ -274,12 +274,33 @@ void _InitMBX8xx (void)
m8xx.plprck = M8xx_UNLOCK_KEY; /* unlock PLPRCR */
#if ( defined(mbx821_001) || defined(mbx821_001b) || defined(mbx860_001b) )
m8xx.plprcr = 0x5F500000;
#else
#elif ( defined(mbx860_005b) )
/* Set the multiplication factor to 0 and clear the timer interrupt status*/
m8xx.plprcr = 0x00005000;
#elif ( defined(mbx860_001) || \
defined(mbx860_002) || \
defined(mbx860_003) || \
defined(mbx860_004) || \
defined(mbx860_005) || \
defined(mbx860_002b) || \
defined(mbx860_003b) || \
defined(mbx860_004b) || \
defined(mbx860_006b) || \
defined(mbx821_002) || \
defined(mbx821_003) || \
defined(mbx821_004) || \
defined(mbx821_005) || \
defined(mbx821_002b) || \
defined(mbx821_003b) || \
defined(mbx821_004b) || \
defined(mbx821_005b) )
defined(mbx821_006b) )
m8xx.plprcr = 0x4C400000;
#else
#error "MBX board not defined"
#endif
/* Unlock the timebase and decrementer registers. */
m8xx.tbk = M8xx_UNLOCK_KEY;
/*
* Initialize decrementer register to a large value to
* guarantee that a decrementer interrupt will not be
@@ -458,8 +479,37 @@ void _InitMBX8xx (void)
* m8xx.memc[1]._or = 0xFFC00400;
* m8xx.memc[1]._br = 0x00000081;
*/
m8xx.memc[1]._or = M8xx_MEMC_OR_4M | M8xx_MEMC_OR_ATM(0) |
M8xx_MEMC_OR_ACS_QRTR | M8xx_MEMC_OR_SCY(0);
#if ( defined(mbx860_001b) )
m8xx.memc[1]._or = M8xx_MEMC_OR_2M | M8xx_MEMC_OR_ATM(0) |
M8xx_MEMC_OR_ACS_QRTR | M8xx_MEMC_OR_SCY(0);
#elif ( defined(mbx860_002b) || \
defined(mbx860_003b) || \
defined(mbx821_001b) || \
defined(mbx821_002b) || \
defined(mbx821_003b) || \
defined(mbx860_001) || \
defined(mbx860_002) || \
defined(mbx860_003) || \
defined(mbx821_001) || \
defined(mbx821_002) || \
defined(mbx821_003) )
m8xx.memc[1]._or = M8xx_MEMC_OR_4M | M8xx_MEMC_OR_ATM(0) |
M8xx_MEMC_OR_ACS_QRTR | M8xx_MEMC_OR_SCY(0);
#elif ( defined(mbx860_004) || \
defined(mbx860_005) || \
defined(mbx860_004b) || \
defined(mbx860_005b) || \
defined(mbx860_006b) || \
defined(mbx821_004) || \
defined(mbx821_005) || \
defined(mbx821_004b) || \
defined(mbx821_005b) || \
defined(mbx821_006b) )
m8xx.memc[1]._or = M8xx_MEMC_OR_16M | M8xx_MEMC_OR_ATM(0) |
M8xx_MEMC_OR_ACS_QRTR | M8xx_MEMC_OR_SCY(0);
#else
#error "MBX board not defined"
#endif
m8xx.memc[1]._br = M8xx_BR_BA(0x00000000) | M8xx_BR_AT(0) | M8xx_BR_PS32 |
M8xx_BR_MS_UPMA | M8xx_MEMC_BR_V;

62
c/src/lib/libbsp/powerpc/mbx8xx/startup/mmutlbtab.c
View File

@@ -31,21 +31,65 @@
* location is equal to its real address.
*/
MMU_TLB_table_t MMU_TLB_table[] = {
/*
#if ( defined(mbx860_001b) )
/*
* DRAM: CS1, Start address 0x00000000, 2M,
* ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy,
* R/W,X for all, no ASID comparison, not cache-inhibited.
* Last 512K block is cache-inhibited, but not guarded for use by EPPCBug.
* EPN TWC RPN
*/
{ 0x00000200, 0x05, 0x000009FD }, /* DRAM - PS=512K */
{ 0x00080200, 0x05, 0x000809FD }, /* DRAM - PS=512K */
{ 0x00100200, 0x05, 0x001009FD }, /* DRAM - PS=512K */
{ 0x00180200, 0x05, 0x001809FF }, /* DRAM - PS=512K, cache-inhibited */
#elif ( defined(mbx860_002b) || \
defined(mbx860_003b) || \
defined(mbx821_001b) || \
defined(mbx821_002b) || \
defined(mbx821_003b) || \
defined(mbx860_001) || \
defined(mbx860_002) || \
defined(mbx860_003) || \
defined(mbx821_001) || \
defined(mbx821_002) || \
defined(mbx821_003) )
/*
* DRAM: CS1, Start address 0x00000000, 4M,
* ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy,
* R/W,X for all, no ASID comparison, not cache-inhibited.
* Last 512K block is cache-inhibited, but not guarded for use by EPPCBug.
* EPN TWC RPN
*/
{ 0x00000200, 0x05, 0x000009FD }, /* DRAM - PS=512K */
{ 0x00080200, 0x05, 0x000809FD }, /* DRAM - PS=512K */
{ 0x00100200, 0x05, 0x001009FD }, /* DRAM - PS=512K */
{ 0x00180200, 0x05, 0x001809FD }, /* DRAM - PS=512K */
{ 0x00200200, 0x05, 0x002009FD }, /* DRAM - PS=512K */
{ 0x00280200, 0x05, 0x002809FD }, /* DRAM - PS=512K */
{ 0x00300200, 0x05, 0x003009FD }, /* DRAM - PS=512K */
{ 0x00380200, 0x05, 0x003809FF }, /* DRAM - PS=512K, cache-inhibited */
{ 0x00000200, 0x05, 0x000009FD }, /* DRAM - PS=512K */
{ 0x00080200, 0x05, 0x000809FD }, /* DRAM - PS=512K */
{ 0x00100200, 0x05, 0x001009FD }, /* DRAM - PS=512K */
{ 0x00180200, 0x05, 0x001809FD }, /* DRAM - PS=512K */
{ 0x00200200, 0x05, 0x002009FD }, /* DRAM - PS=512K */
{ 0x00280200, 0x05, 0x002809FD }, /* DRAM - PS=512K */
{ 0x00300200, 0x05, 0x003009FD }, /* DRAM - PS=512K */
{ 0x00380200, 0x05, 0x003809FF }, /* DRAM - PS=512K, cache-inhibited */
#elif ( defined(mbx860_004) || \
defined(mbx860_005) || \
defined(mbx860_004b) || \
defined(mbx860_005b) || \
defined(mbx860_006b) || \
defined(mbx821_004) || \
defined(mbx821_005) || \
defined(mbx821_004b) || \
defined(mbx821_005b) || \
defined(mbx821_006b) )
/*
* DRAM: CS1, Start address 0x00000000, 16M,
* ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy,
* R/W,X for all, no ASID comparison, not cache-inhibited.
* EPN TWC RPN
*/
{ 0x00000200, 0x0D, 0x000009FD }, /* DRAM - PS=8M */
{ 0x00800200, 0x0D, 0x008009FD }, /* DRAM - PS=8M */
#else
#error "MBX board not defined"
#endif
/*
*
* NVRAM: CS4, Start address 0xFA000000, 32K,