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Remove stray white spaces.

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This commit is contained in:
Ralf Corsepius
2004-04-16 21:51:30 +00:00
parent 3906b3eaa1
commit 0fdc099473
36 changed files with 209 additions and 209 deletions
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6
c/src/lib/libbsp/sh/gensh1/include/bsp.h
View File

@@ -10,7 +10,7 @@
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*
*
*
* COPYRIGHT (c) 1998.
* On-Line Applications Research Corporation (OAR).
@@ -106,7 +106,7 @@ extern uint32_t WorkSpaceEnd ;
extern void *CPU_Interrupt_stack_low ;
extern void *CPU_Interrupt_stack_high ;
/* miscellaneous stuff assumed to exist */
extern rtems_configuration_table BSP_Configuration;
@@ -125,7 +125,7 @@ extern void bsp_cleanup( void );
BSP_CONSOLE_DRIVER_TABLE_ENTRY, \
{ console_initialize, console_open, console_close, \
console_read, console_write, console_control }
/*
* NOTE: Use the standard Clock driver entry
*/

4
c/src/lib/libbsp/sh/gensh1/include/coverhd.h
View File

@@ -15,7 +15,7 @@
* all calling overhead including passing of arguments.
*
*
* These are the figures tmoverhd.exe reported with egcs-980205 -O3
* These are the figures tmoverhd.exe reported with egcs-980205 -O3
* on a Diesner OktagonSH/Amos-2.1 board with SH7032/20MHz
*
* These results are assumed to be applicable to most SH7032/20MHz boards
@@ -27,7 +27,7 @@
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*
*
*
* COPYRIGHT (c) 1998.
* On-Line Applications Research Corporation (OAR).

4
c/src/lib/libbsp/sh/gensh1/start/start.S
View File

@@ -53,7 +53,7 @@ SYM (start):
mov.l vects_k,r0 ! update vbr to point to vectab
ldc r0,vbr
! call the mainline
! call the mainline
mov #0,r4 ! argc
mov.l main_k,r0
jsr @r0
@@ -69,7 +69,7 @@ SYM (start):
.align 2
stack_k:
.long SYM(stack)
.long SYM(stack)
edata_k:
.long SYM(edata)
end_k:

6
c/src/lib/libbsp/sh/gensh1/startup/bspclean.c
View File

@@ -17,9 +17,9 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*
* You should have received a copy of the GNU General Public License
* along with this program; If not, write to the Free Software Foundation,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
* along with this program; If not, write to the Free Software Foundation,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*
* COPYRIGHT (c) 1998.
* On-Line Applications Research Corporation (OAR).

24
c/src/lib/libbsp/sh/gensh1/startup/bspstart.c
View File

@@ -29,7 +29,7 @@
#include <bsp.h>
#include <rtems/libio.h>
#include <rtems/libcsupport.h>
/*
* The original table from the application and our copy of it with
* some changes.
@@ -46,7 +46,7 @@ char *rtems_progname;
/*
* Use the shared implementations of the following routines
*/
void bsp_postdriver_hook(void);
void bsp_libc_init( void *, uint32_t, int );
@@ -62,11 +62,11 @@ void bsp_libc_init( void *, uint32_t, int );
* not yet initialized.
*
*/
void bsp_pretasking_hook(void)
{
bsp_libc_init(&HeapStart, (char *)&HeapEnd - (char *)&HeapStart, 0);
#ifdef RTEMS_DEBUG
rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
#endif
@@ -81,13 +81,13 @@ void bsp_pretasking_hook(void)
void bsp_start(void)
{
/*
For real boards you need to setup the hardware
For real boards you need to setup the hardware
and need to copy the vector table from rom to ram.
Depending on the board this can either be done from inside the rom
Depending on the board this can either be done from inside the rom
startup code, rtems startup code or here.
*/
/*
* Allocate the memory for the RTEMS Work Space. This can come from
* a variety of places: hard coded address, malloc'ed from outside
@@ -103,10 +103,10 @@ void bsp_start(void)
*/
BSP_Configuration.work_space_start = (void *) &WorkSpaceStart ;
BSP_Configuration.work_space_size =
(uint32_t) &WorkSpaceEnd -
BSP_Configuration.work_space_size =
(uint32_t) &WorkSpaceEnd -
(uint32_t) &WorkSpaceStart ;
/*
* initialize the CPU table for this BSP
*/
@@ -115,7 +115,7 @@ void bsp_start(void)
_CPU_Interrupt_stack_low = &CPU_Interrupt_stack_low ;
_CPU_Interrupt_stack_high = &CPU_Interrupt_stack_high ;
Cpu_table.interrupt_stack_size =
Cpu_table.interrupt_stack_size =
(uint32_t) (&CPU_Interrupt_stack_high) -
(uint32_t) (&CPU_Interrupt_stack_low) ;
#endif
@@ -123,7 +123,7 @@ void bsp_start(void)
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
Cpu_table.postdriver_hook = bsp_postdriver_hook;
#if ( CPU_ALLOCATE_INTERRUPT_STACK == TRUE )
Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
#endif

8
c/src/lib/libbsp/sh/gensh2/console/config.c
View File

@@ -1,4 +1,4 @@
/*
/*
* This file contains the TTY driver table. The implementation is
* based on libchip/serial drivers, but it uses internal SHx SCI so
* the implementation of the driver is placed in
@@ -25,7 +25,7 @@
#include <rtems/termiostypes.h>
/*
/*
* Function set for interrupt enabled termios console
*/
console_fns sh_sci_fns =
@@ -41,7 +41,7 @@ console_fns sh_sci_fns =
TERMIOS_IRQ_DRIVEN /* deviceOutputUsesInterrupts */
};
/*
/*
* Function set for polled termios console
*/
console_fns sh_sci_fns_polled =
@@ -81,7 +81,7 @@ static const struct termios term2 = {
0,
{ 0 }
};
console_tbl Console_Port_Tbl[] = {
{

4
c/src/lib/libbsp/sh/gensh2/include/bsp.h
View File

@@ -10,7 +10,7 @@
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*
*
*
* COPYRIGHT (c) 1998.
* On-Line Applications Research Corporation (OAR).
@@ -123,7 +123,7 @@ extern uint32_t WorkSpaceEnd ;
extern void *CPU_Interrupt_stack_low ;
extern void *CPU_Interrupt_stack_high ;
/* miscellaneous stuff assumed to exist */
extern rtems_configuration_table BSP_Configuration;

4
c/src/lib/libbsp/sh/gensh2/include/coverhd.h
View File

@@ -15,7 +15,7 @@
* all calling overhead including passing of arguments.
*
*
* These are the figures tmoverhd.exe reported with gcc-2.95.1 -O4
* These are the figures tmoverhd.exe reported with gcc-2.95.1 -O4
* on a Hitachi SH7045F Evaluation Board with SH7045F at 29 MHz
*
* These results are assumed to be applicable to most SH7045/29MHz boards
@@ -27,7 +27,7 @@
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.

8
c/src/lib/libbsp/sh/gensh2/start/start.S
View File

@@ -13,7 +13,7 @@
* TGA Technologies, Inc.
* 100 Pinnacle Way, Suite 140
* Norcross, GA 30071 U.S.A.
*
*
*
* This modified file may be copied and distributed in accordance
* the above-referenced license. It is provided for critique and
@@ -75,7 +75,7 @@ SYM (start):
mova vects_k,r0
mov.l @r0, r1 ! Shadow vect tbl addr
stc vbr, r2 ! Original vect tbl addr
and #0, r0
and #0, r0
mov r0, r4 ! 0 in r4 and r0
!trapa #32
@@ -135,7 +135,7 @@ SYM (start):
ldc r0,vbr
#endif /* ! STANDALONE_EVB */
! call the mainline
! call the mainline
mov #0,r4 ! argc
mov.l main_k,r0
jsr @r0
@@ -157,7 +157,7 @@ SYM (start):
.align 2
stack_k:
.long SYM(stack)
.long SYM(stack)
edata_k:
.long SYM(edata)
end_k:

6
c/src/lib/libbsp/sh/gensh2/startup/bspclean.c
View File

@@ -17,9 +17,9 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*
* You should have received a copy of the GNU General Public License
* along with this program; If not, write to the Free Software Foundation,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
* along with this program; If not, write to the Free Software Foundation,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*
* COPYRIGHT (c) 1998.
* On-Line Applications Research Corporation (OAR).

18
c/src/lib/libbsp/sh/gensh2/startup/bspstart.c
View File

@@ -29,7 +29,7 @@
#include <bsp.h>
#include <rtems/libio.h>
#include <rtems/libcsupport.h>
/*
* The original table from the application and our copy of it with
* some changes.
@@ -48,7 +48,7 @@ char *rtems_progname;
/*
* Use the shared implementations of the following routines
*/
void bsp_postdriver_hook(void);
void bsp_libc_init( void *, uint32_t, int );
@@ -64,11 +64,11 @@ void bsp_libc_init( void *, uint32_t, int );
* not yet initialized.
*
*/
void bsp_pretasking_hook(void)
{
bsp_libc_init(&HeapStart, (char *)&HeapEnd - (char *)&HeapStart, 0);
#ifdef RTEMS_DEBUG
rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
#endif
@@ -83,10 +83,10 @@ void bsp_pretasking_hook(void)
void bsp_start(void)
{
/*
For real boards you need to setup the hardware
For real boards you need to setup the hardware
and need to copy the vector table from rom to ram.
Depending on the board this can ether be done from inside the rom
Depending on the board this can ether be done from inside the rom
startup code, rtems startup code or here.
*/
@@ -110,9 +110,9 @@ void bsp_start(void)
*/
BSP_Configuration.work_space_start = (void *) &WorkSpaceStart ;
BSP_Configuration.work_space_size =
BSP_Configuration.work_space_size =
&WorkSpaceEnd - &WorkSpaceStart ;
/*
* initialize the CPU table for this BSP
*/
@@ -122,7 +122,7 @@ void bsp_start(void)
_CPU_Interrupt_stack_high = &CPU_Interrupt_stack_high ;
/* This isn't used anywhere */
Cpu_table.interrupt_stack_size =
Cpu_table.interrupt_stack_size =
&CPU_Interrupt_stack_high - &CPU_Interrupt_stack_low ;
#endif

6
c/src/lib/libbsp/sh/gensh2/startup/hw_init.c
View File

@@ -27,7 +27,7 @@
* TGA Technologies, Inc.
* 100 Pinnacle Way, Suite 140
* Norcross, GA 30071 U.S.A.
*
*
*
* This file may be copied and distributed in accordance
* the above-referenced license. It is provided for critique and
@@ -74,7 +74,7 @@ void early_hw_init (void)
};
/* to be called from 'bspstart.c' */
void bsp_hw_init (void)
void bsp_hw_init (void)
{
uint16_t temp16;
@@ -83,7 +83,7 @@ void bsp_hw_init (void)
/* no STANDALONE_EVB: accepts defaults, adds RESET */
/* FIXME: replace 'magic numbers' */
write16(0x5000, PFC_PACRH); /* Pin function controller - WRHH, WRHL */
write16(0x1550, PFC_PACRL1); /* Pin fun. controller - WRH,WRL,RD,CS1 */
write16(0x0000, PFC_PBCR1); /* Pin function controller - default */

16
c/src/lib/libbsp/sh/gensh4/console/console.c
View File

@@ -159,10 +159,10 @@ console_first_open(int major, int minor, void *arg)
args->iop->data1, /* tty */
minor+1, /* channel */
(console_mode == CONSOLE_MODE_INT));
if (sc == RTEMS_SUCCESSFUL)
sc = sh4uart_reset(&sh4_uarts[minor]);
return sc;
}
@@ -182,7 +182,7 @@ console_last_close(int major, int minor, void *arg)
{
if (console_mode != CONSOLE_MODE_IPL)
/* working from gdb we should not disable port operations */
return sh4uart_disable(&sh4_uarts[minor],
return sh4uart_disable(&sh4_uarts[minor],
!(boot_mode == SH4_BOOT_MODE_IPL));
else
return RTEMS_SUCCESSFUL;
@@ -200,7 +200,7 @@ console_last_close(int major, int minor, void *arg)
void
console_reserve_resources(rtems_configuration_table *configuration)
{
if ((console_mode != CONSOLE_MODE_RAW) &&
if ((console_mode != CONSOLE_MODE_RAW) &&
(console_mode != CONSOLE_MODE_IPL))
rtems_termios_reserve_resources (configuration, 2);
}
@@ -240,7 +240,7 @@ console_initialize(rtems_device_major_number major,
if ((console_mode != CONSOLE_MODE_RAW) &&
(console_mode != CONSOLE_MODE_IPL))
rtems_termios_initialize ();
/*
* Register the devices
*/
@@ -272,7 +272,7 @@ console_initialize(rtems_device_major_number major,
sc = sh4uart_reset(&sh4_uarts[1]);
return sc;
}
}
return RTEMS_SUCCESSFUL;
}
@@ -355,7 +355,7 @@ console_close(rtems_device_major_number major,
return rtems_termios_close (arg);
else
return RTEMS_SUCCESSFUL;
}
}
/* console_read --
* Read from the console device
@@ -432,7 +432,7 @@ console_write(rtems_device_major_number major,
char *buf = argp->buffer;
int count = argp->count;
int i;
for (i = 0; i < count; i++)
{
if (*buf == '\n')

60
c/src/lib/libbsp/sh/gensh4/hw_init/hw_init.c
View File

@@ -39,12 +39,12 @@ early_hw_init(void)
{
/* Explicitly turn off the MMU */
write32(0, SH7750_MMUCR);
/* Disable instruction and operand caches */
write32(0, SH7750_CCR);
/* Setup Clock Generator */
/*
/*
* Input clock frequency is 16 MHz, MD0=1,
* CPU clock frequency already selected to 96MHz.
* Bus clock frequency should be set to 48 MHz, therefore divider 2
@@ -57,7 +57,7 @@ early_hw_init(void)
SH7750_WTCSR_KEY, SH7750_WTCSR);
write16(SH7750_WTCSR_MODE_IT | SH7750_WTCSR_CKS_DIV4096 |
SH7750_WTCSR_KEY, SH7750_WTCSR);
/* Turn PLL1 on */
write16(0x40 | SH7750_WTCNT_KEY, SH7750_WTCNT);
write16(read16(SH7750_FRQCR) | SH7750_FRQCR_PLL1EN, SH7750_FRQCR);
@@ -71,7 +71,7 @@ early_hw_init(void)
/* Turn PLL2 on */
write16(0x40 | SH7750_WTCNT_KEY, SH7750_WTCNT);
write16(read16(SH7750_FRQCR) | SH7750_FRQCR_PLL2EN, SH7750_FRQCR);
/* Bus State Controller Initialization */
/*
* Area assignments:
@@ -93,7 +93,7 @@ early_hw_init(void)
SH7750_BCR1_DRAMTP_2SDRAM_3SDRAM /* Select Area 2 SDRAM type */
/* Area 5,6 programmed as a SRAM interface (not PCMCIA) */,
SH7750_BCR1);
write16(
(SH7750_BCR2_SZ_8 << SH7750_BCR2_A0SZ_S) | /* These bits is read-only
and set during reset */
@@ -105,7 +105,7 @@ early_hw_init(void)
(SH7750_BCR2_SZ_32 << SH7750_BCR2_A1SZ_S) | /* GDC is 32-bit width */
SH7750_BCR2_PORTEN, /* Use D32-D51 as a port */
SH7750_BCR2);
write32(
(0 << SH7750_WCR1_DMAIW_S) | /* 0 required for SDRAM RAS down mode */
(7 << SH7750_WCR1_A6IW_S) | /* Area 6 not used */
@@ -125,9 +125,9 @@ early_hw_init(void)
(SH7750_WCR2_WS15 << SH7750_WCR2_A4W_S) | /* Area 4 not used */
(SH7750_WCR2_WS15 << SH7750_WCR2_A3W_S) | /*Area 3 not used*/
(SH7750_WCR2_SDRAM_CAS_LAT2 << SH7750_WCR2_A2W_S) | /* SDRAM CL = 2 */
(SH7750_WCR2_WS15 << SH7750_WCR2_A1W_S) | /* Area 1 (GDC)
(SH7750_WCR2_WS15 << SH7750_WCR2_A1W_S) | /* Area 1 (GDC)
requirements not known*/
(SH7750_WCR2_WS6 << SH7750_WCR2_A0W_S) | /* 4 wait states required
(SH7750_WCR2_WS6 << SH7750_WCR2_A0W_S) | /* 4 wait states required
at 48MHz for 70ns mem.,
set closest greater */
(SH7750_WCR2_BPWS7 << SH7750_WCR2_A0B_S), /* burst mode disabled for
@@ -171,21 +171,21 @@ early_hw_init(void)
/* Clear refresh timer counter */
write16(SH7750_RTCNT_KEY | 0, SH7750_RTCNT);
/* Time between auto-refresh commands is 15.6 microseconds; refresh
timer counter frequency is 12 MHz; 1.56e-5*1.2e7= 187.2, therefore
program the refresh timer divider to 187 */
write16(SH7750_RTCOR_KEY | 187, SH7750_RTCOR);
write16(SH7750_RTCOR_KEY | 187, SH7750_RTCOR);
/* Clear refresh counter */
write16(SH7750_RFCR_KEY | 0, SH7750_RFCR);
/* Select refresh counter base frequency as bus frequency/4 = 12 MHz */
write16(SH7750_RTCSR_CKS_CKIO_DIV4 | SH7750_RTCSR_KEY, SH7750_RTCSR);
/* Initialize Memory Control Register; disable refresh */
write32((MCRDEF & ~SH7750_MCR_RFSH) | SH7750_MCR_PALL, SH7750_MCR);
/* SDRAM power-up initialization require 100 microseconds delay after
stable power and clock fed; 100 microseconds corresponds to 7 refresh
intervals */
@@ -193,10 +193,10 @@ early_hw_init(void)
/* Clear refresh timer counter */
write16(SH7750_RTCNT_KEY | 0, SH7750_RTCNT);
/* Clear refresh counter */
write16(SH7750_RFCR_KEY | 0, SH7750_RFCR);
/* Execute Precharge All command */
write32(0, SH7750_SDRAM_MODE_A2_32BIT(0));
@@ -210,27 +210,27 @@ early_hw_init(void)
/* SDRAM data width is 32 bit (4 bytes), cache line size is 32 bytes,
therefore burst length is 8 (32 / 4) */
write8(0,SH7750_SDRAM_MODE_A2_32BIT(
SDRAM_MODE_BL_8 |
SDRAM_MODE_BT_SEQ | /* Only sequential burst mode supported
SDRAM_MODE_BL_8 |
SDRAM_MODE_BT_SEQ | /* Only sequential burst mode supported
in SH7750 */
SDRAM_MODE_CL_2 | /* CAS latency is 2 */
SDRAM_MODE_OPC_BRBW) /* Burst read/burst write */
);
/* Bus State Controller initialized now */
/* Disable DMA controller */
write32(0, SH7750_DMAOR);
/* I/O port setup */
/* Configure all port bits as output - to fasciliate debugging */
write32(
SH7750_PCTRA_PBOUT(0) | SH7750_PCTRA_PBOUT(1) |
SH7750_PCTRA_PBOUT(0) | SH7750_PCTRA_PBOUT(1) |
SH7750_PCTRA_PBOUT(2) | SH7750_PCTRA_PBOUT(3) |
SH7750_PCTRA_PBOUT(4) | SH7750_PCTRA_PBOUT(5) |
SH7750_PCTRA_PBOUT(4) | SH7750_PCTRA_PBOUT(5) |
SH7750_PCTRA_PBOUT(6) | SH7750_PCTRA_PBOUT(7) |
SH7750_PCTRA_PBOUT(8) | SH7750_PCTRA_PBOUT(9) |
SH7750_PCTRA_PBOUT(8) | SH7750_PCTRA_PBOUT(9) |
SH7750_PCTRA_PBOUT(10) | SH7750_PCTRA_PBOUT(11) |
SH7750_PCTRA_PBOUT(12) | SH7750_PCTRA_PBOUT(13) |
SH7750_PCTRA_PBOUT(12) | SH7750_PCTRA_PBOUT(13) |
SH7750_PCTRA_PBOUT(14) | SH7750_PCTRA_PBOUT(15),
SH7750_PCTRA);
write32(
@@ -240,7 +240,7 @@ early_hw_init(void)
/* Clear data in port */
write32(0, SH7750_PDTRA);
write32(0, SH7750_PDTRB);
/* Interrupt Controller Initialization */
write16(SH7750_ICR_IRLM, SH7750_ICR); /* IRLs serves as an independent
interrupt request lines */
@@ -254,7 +254,7 @@ early_hw_init(void)
write16(
(0 << SH7750_IPRB_WDT_S) |
(0 << SH7750_IPRB_REF_S) |
(0 << SH7750_IPRB_SCI1_S),
(0 << SH7750_IPRB_SCI1_S),
SH7750_IPRB);
write16(
(0 << SH7750_IPRC_GPIO_S) |
@@ -265,17 +265,17 @@ early_hw_init(void)
}
/*
/*
* cache_on --
* Enable instruction and operand caches
* Enable instruction and operand caches
*/
void bsp_cache_on(void)
{
switch (boot_mode)
{
case SH4_BOOT_MODE_FLASH:
write32(SH7750_CCR_ICI | SH7750_CCR_ICE |
SH7750_CCR_OCI | SH7750_CCR_CB | SH7750_CCR_OCE,
write32(SH7750_CCR_ICI | SH7750_CCR_ICE |
SH7750_CCR_OCI | SH7750_CCR_CB | SH7750_CCR_OCE,
SH7750_CCR);
break;
case SH4_BOOT_MODE_IPL:

6
c/src/lib/libbsp/sh/gensh4/include/bsp.h
View File

@@ -14,7 +14,7 @@
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*
*
*
* COPYRIGHT (c) 1998-2001.
* On-Line Applications Research Corporation (OAR).
@@ -140,7 +140,7 @@ extern void *CPU_Interrupt_stack_high ;
extern uint32_t boot_mode;
#define SH4_BOOT_MODE_FLASH 0
#define SH4_BOOT_MODE_IPL 1
/* miscellaneous stuff assumed to exist */
extern rtems_configuration_table BSP_Configuration;
@@ -159,7 +159,7 @@ extern void bsp_cleanup( void );
#define CONSOLE_DRIVER_TABLE_ENTRY \
{ console_initialize, console_open, console_close, \
console_read, console_write, console_control }
/*
* NOTE: Use the standard Clock driver entry
*/

4
c/src/lib/libbsp/sh/gensh4/include/coverhd.h
View File

@@ -15,7 +15,7 @@
* all calling overhead including passing of arguments.
*
*
* These are the figures tmoverhd.exe reported with gcc-2.95.1 -O4
* These are the figures tmoverhd.exe reported with gcc-2.95.1 -O4
* on a Hitachi SH7045F Evaluation Board with SH7045F at 29 MHz
*
* These results are assumed to be applicable to most SH7045/29MHz boards
@@ -27,7 +27,7 @@
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.

2
c/src/lib/libbsp/sh/gensh4/include/sdram.h
View File

@@ -8,7 +8,7 @@
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
*
* @(#) $Id$
*/

10
c/src/lib/libbsp/sh/gensh4/start/start.S
View File

@@ -19,7 +19,7 @@
* TGA Technologies, Inc.
* 100 Pinnacle Way, Suite 140
* Norcross, GA 30071 U.S.A.
*
*
*
* This modified file may be copied and distributed in accordance
* the above-referenced license. It is provided for critique and
@@ -74,7 +74,7 @@ fake_func:
movt r9 ! r9 == ! boot_mode
neg r9, r9
add #1, r9 ! r9 == boot_mode
! what is in boot_mode?
cmp/pl r9 ! r9 > 0 -> T = 1
@@ -84,7 +84,7 @@ fake_func:
#if defined(START_HW_INIT) /* from $RTEMS_BSP.cfg */
! Initialize minimal hardware
! to run hw_init we need to calculate its address
! to run hw_init we need to calculate its address
! as it is before data coping
mov.l hw_init_k, r0
mov.l copy_start_k, r1
@@ -172,7 +172,7 @@ zero_bss:
lds r0,fpscr
! call the mainline
! call the mainline
mov #0,r4 ! argc
mov.l main_k,r0
jsr @r0
@@ -213,7 +213,7 @@ _vbr_base_k:
__VBR_Saved_k:
.long SYM(_VBR_Saved)
stack_k:
.long SYM(stack)
.long SYM(stack)
__bss_start_k:
.long __bss_start
__bss_end_k:

24
c/src/lib/libbsp/sh/gensh4/startup/bspstart.c
View File

@@ -26,11 +26,11 @@
#include <bsp.h>
#include <rtems/libio.h>
#include <rtems/libcsupport.h>
#include <string.h>
/*
* The original table from the application and our copy of it with
* some changes.
@@ -49,7 +49,7 @@ char *rtems_progname;
/*
* Use the shared implementations of the following routines
*/
void bsp_postdriver_hook(void);
void bsp_libc_init( void *, uint32_t, int );
@@ -65,11 +65,11 @@ void bsp_libc_init( void *, uint32_t, int );
* not yet initialized.
*
*/
void bsp_pretasking_hook(void)
{
bsp_libc_init(&HeapStart, (char *)&HeapEnd - (char *)&HeapStart, 0);
#ifdef RTEMS_DEBUG
rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
#endif
@@ -84,10 +84,10 @@ void bsp_pretasking_hook(void)
void bsp_start(void)
{
/*
For real boards you need to setup the hardware
For real boards you need to setup the hardware
and need to copy the vector table from rom to ram.
Depending on the board this can ether be done from inside the rom
Depending on the board this can ether be done from inside the rom
startup code, rtems startup code or here.
*/
@@ -111,10 +111,10 @@ void bsp_start(void)
*/
BSP_Configuration.work_space_start = (void *) &WorkSpaceStart ;
BSP_Configuration.work_space_size =
(uint32_t) &WorkSpaceEnd -
BSP_Configuration.work_space_size =
(uint32_t) &WorkSpaceEnd -
(uint32_t) &WorkSpaceStart ;
/*
* initialize the CPU table for this BSP
*/
@@ -124,7 +124,7 @@ void bsp_start(void)
_CPU_Interrupt_stack_high = &CPU_Interrupt_stack_high ;
/* This isn't used anywhere */
Cpu_table.interrupt_stack_size =
Cpu_table.interrupt_stack_size =
(uint32_t) (&CPU_Interrupt_stack_high) -
(uint32_t) (&CPU_Interrupt_stack_low) ;
#endif

16
c/src/lib/libbsp/sh/shared/console.c
View File

@@ -1,12 +1,12 @@
/*
* /dev/console for Hitachi SH 703X
*
* The SH doesn't have a designated console device. Therefore we "alias"
* another device as /dev/console and revector all calls to /dev/console
* The SH doesn't have a designated console device. Therefore we "alias"
* another device as /dev/console and revector all calls to /dev/console
* to this device.
*
* This approach is similar to installing a sym-link from one device to
* another device. If rtems once will support sym-links for devices files,
* This approach is similar to installing a sym-link from one device to
* another device. If rtems once will support sym-links for devices files,
* this implementation could be dropped.
*
* Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de)
@@ -16,7 +16,7 @@
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*
*
*
* COPYRIGHT (c) 1998.
* On-Line Applications Research Corporation (OAR).
@@ -57,7 +57,7 @@ rtems_device_driver console_initialize(
)
{
rtems_device_driver status;
status = rtems_io_register_name(
"/dev/console",
major,
@@ -89,7 +89,7 @@ rtems_device_driver console_open(
low_level_device_info.minor,
arg );
}
/*
* Close entry point
*/
@@ -121,7 +121,7 @@ rtems_device_driver console_read(
}
/*
* write bytes to the serial port. Stdout and stderr are the same.
* write bytes to the serial port. Stdout and stderr are the same.
*/
rtems_device_driver console_write(

2
c/src/lib/libbsp/sh/shared/setvec.c
View File

@@ -1,7 +1,7 @@
/* set_vector
*
* NOTE: This function is considered OBSOLETE and may vanish soon.
* Calls to set_vector should be replaced by calls to
* Calls to set_vector should be replaced by calls to
* rtems_interrupt_catch or _CPU_ISR_install_raw_handler.
*
* This routine installs an interrupt vector on the target Board/CPU.

52
c/src/lib/libbsp/sh/shsim/gdbsci/gdbsci.c
View File

@@ -33,12 +33,12 @@
#include <sh/sh7_pfc.h>
#include <sh/sci.h>
/*
* gdb assumes area 5/char access (base address & 0x0500000),
/*
* gdb assumes area 5/char access (base address & 0x0500000),
* the RTEMS's sh7045 code however defaults to area 5/int/short/char access
* [Very likely a bug in the sh7045 code, RC.]
*/
#define GDBSCI_BASE 0x05ffffff
#define GDBSCI0_SMR (SCI0_SMR & GDBSCI_BASE)
@@ -58,7 +58,7 @@
/*
* NOTE: Only device 1 is valid for the simulator
*/
#define SH_GDBSCI_MINOR_DEVICES 2
/* Force SIGBUS by using an unsupported address for /dev/gdbsci0 */
@@ -91,13 +91,13 @@ static int _sci_set_cflags(
{
uint8_t smr;
uint8_t brr;
if ( c_cflag & CBAUD )
{
if ( _sci_get_brparms( c_cflag, &smr, &brr ) != 0 )
return -1 ;
}
if ( c_cflag & CSIZE )
{
if ( c_cflag & CS8 )
@@ -122,28 +122,28 @@ static int _sci_set_cflags(
smr |= SCI_ODD_PARITY ;
else
smr &= ~SCI_ODD_PARITY;
write8( smr, sci_dev->addr + SCI_SMR );
write8( brr, sci_dev->addr + SCI_BRR );
return 0 ;
}
#endif
static void _sci_init(
static void _sci_init(
rtems_device_minor_number minor )
{
#if NOT_SUPPORTED_BY_GDB
uint16_t temp16 ;
/* Pin function controller initialisation for asynchronous mode */
/* Pin function controller initialisation for asynchronous mode */
if( minor == 0)
{
temp16 = read16( PFC_PBCR1);
temp16 &= ~( PB8MD | PB9MD );
temp16 |= (PB_TXD0 | PB_RXD0);
write16( temp16, PFC_PBCR1);
}
}
else
{
temp16 = read16( PFC_PBCR1);
@@ -173,7 +173,7 @@ static void _sci_tx_polled(
const char buf )
{
struct scidev_t *scidev = &sci_device[minor] ;
#if NOT_SUPPORTED_BY_GDB
#if NOT_SUPPORTED_BY_GDB
int8_t ssr ;
while ( !inb((scidev->addr + SCI_SSR) & SCI_TDRE ))
@@ -181,18 +181,18 @@ static void _sci_tx_polled(
#endif
write8(buf,scidev->addr+SCI_TDR);
#if NOT_SUPPORTED_BY_GDB
#if NOT_SUPPORTED_BY_GDB
ssr = inb(scidev->addr+SCI_SSR);
ssr &= ~SCI_TDRE ;
write8(ssr,scidev->addr+SCI_SSR);
#endif
}
}
static int _sci_rx_polled (
int minor)
{
struct scidev_t *scidev = &sci_device[minor] ;
unsigned char c;
#if NOT_SUPPORTED_BY_GDB
char ssr ;
@@ -203,9 +203,9 @@ static int _sci_rx_polled (
if ( !(ssr & SCI_RDRF) )
return -1;
#endif
#endif
c = read8(scidev->addr + SCI_RDR) ;
#if NOT_SUPPORTED_BY_GDB
#if NOT_SUPPORTED_BY_GDB
write8(ssr & ~SCI_RDRF,scidev->addr + SCI_SSR);
#endif
return c;
@@ -222,7 +222,7 @@ rtems_device_driver sh_gdbsci_initialize(
{
rtems_device_driver status ;
rtems_device_minor_number i;
/*
* register all possible devices.
* the initialization of the hardware is done by sci_open
@@ -239,7 +239,7 @@ rtems_device_driver sh_gdbsci_initialize(
}
/* default hardware setup */
return RTEMS_SUCCESSFUL;
}
@@ -261,14 +261,14 @@ rtems_device_driver sh_gdbsci_open(
{
return RTEMS_INVALID_NUMBER;
}
/* device already opened */
if ( sci_device[minor].opened > 0 )
{
sci_device[minor].opened++ ;
return RTEMS_SUCCESSFUL ;
}
_sci_init( minor );
#if NOT_SUPPORTED_BY_GDB
@@ -291,17 +291,17 @@ rtems_device_driver sh_gdbsci_open(
/* FIXME: Should be one bit delay */
CPU_delay(50000); /* microseconds */
temp8 |= SCI_RE | SCI_TE;
write8(temp8, sci_device[minor].addr + SCI_SCR); /* Enable clock output */
}
}
#endif
sci_device[minor].opened++ ;
return RTEMS_SUCCESSFUL ;
}
/*
* Close entry point
*/
@@ -318,7 +318,7 @@ rtems_device_driver sh_gdbsci_close(
}
sci_device[minor].opened-- ;
return RTEMS_SUCCESSFUL ;
}
@@ -333,7 +333,7 @@ rtems_device_driver sh_gdbsci_read(
)
{
int count = 0;
rtems_libio_rw_args_t *rw_args = (rtems_libio_rw_args_t *) arg;
char * buffer = rw_args->buffer;
int maximum = rw_args->count;

10
c/src/lib/libbsp/sh/shsim/include/bsp.h
View File

@@ -10,7 +10,7 @@
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*
*
* COPYRIGHT (c) 2001.
* On-Line Applications Research Corporation (OAR).
*
@@ -78,9 +78,9 @@ extern "C" {
/*
* Simple spin delay in microsecond units for device drivers.
* This is very dependent on the clock speed of the target.
*
*
* FIXME: Not applicable with gdb's simulator
* Kept for sourcecode compatibility with other sh-BSPs
* Kept for sourcecode compatibility with other sh-BSPs
*/
#define rtems_bsp_delay( microseconds ) CPU_delay(microseconds)
#define sh_delay( microseconds ) CPU_delay(microseconds)
@@ -97,7 +97,7 @@ extern uint32_t WorkSpaceEnd ;
extern void *CPU_Interrupt_stack_low ;
extern void *CPU_Interrupt_stack_high ;
/* miscellaneous stuff assumed to exist */
extern rtems_configuration_table BSP_Configuration;
@@ -116,7 +116,7 @@ extern void bsp_cleanup( void );
BSP_CONSOLE_DRIVER_TABLE_ENTRY, \
{ console_initialize, console_open, console_close, \
console_read, console_write, console_control }
/*
* NOTE: Use the standard Clock driver entry
*/

4
c/src/lib/libbsp/sh/shsim/include/gdbsci.h
View File

@@ -8,7 +8,7 @@
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*
*
* $Id$
*/
@@ -20,7 +20,7 @@ extern "C" {
#endif
/*
*/
*/
#define DEVGDBSCI_DRIVER_TABLE_ENTRY \
{ sh_gdbsci_initialize, sh_gdbsci_open, sh_gdbsci_close, sh_gdbsci_read, \

4
c/src/lib/libbsp/sh/shsim/start/start.S
View File

@@ -53,7 +53,7 @@ SYM (start):
mov.l vects_k,r0 ! update vbr to point to vectab
ldc r0,vbr
! call the mainline
! call the mainline
mov #0,r4 ! argc
mov.l main_k,r0
jsr @r0
@@ -69,7 +69,7 @@ SYM (start):
.align 2
stack_k:
.long SYM(stack)
.long SYM(stack)
edata_k:
.long SYM(edata)
end_k:

22
c/src/lib/libbsp/sh/shsim/startup/bspstart.c
View File

@@ -43,7 +43,7 @@ char *rtems_progname;
/*
* Use the shared implementations of the following routines
*/
void bsp_postdriver_hook(void);
void bsp_libc_init( void *, uint32_t, int );
@@ -59,11 +59,11 @@ void bsp_libc_init( void *, uint32_t, int );
* not yet initialized.
*
*/
void bsp_pretasking_hook(void)
{
bsp_libc_init(&HeapStart, (char *)&HeapEnd - (char *)&HeapStart, 0);
#ifdef RTEMS_DEBUG
rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
#endif
@@ -78,13 +78,13 @@ void bsp_pretasking_hook(void)
void bsp_start( void )
{
/*
For real boards you need to setup the hardware
For real boards you need to setup the hardware
and need to copy the vector table from rom to ram.
Depending on the board this can either be done from inside the rom
Depending on the board this can either be done from inside the rom
startup code, rtems startup code or here.
*/
/*
* Allocate the memory for the RTEMS Work Space. This can come from
* a variety of places: hard coded address, malloc'ed from outside
@@ -100,10 +100,10 @@ void bsp_start( void )
*/
BSP_Configuration.work_space_start = (void *) &WorkSpaceStart ;
BSP_Configuration.work_space_size =
(uint32_t) &WorkSpaceEnd -
BSP_Configuration.work_space_size =
(uint32_t) &WorkSpaceEnd -
(uint32_t) &WorkSpaceStart ;
/*
* initialize the CPU table for this BSP
*/
@@ -112,7 +112,7 @@ void bsp_start( void )
_CPU_Interrupt_stack_low = &CPU_Interrupt_stack_low ;
_CPU_Interrupt_stack_high = &CPU_Interrupt_stack_high ;
Cpu_table.interrupt_stack_size =
Cpu_table.interrupt_stack_size =
(uint32_t) (&CPU_Interrupt_stack_high) -
(uint32_t) (&CPU_Interrupt_stack_low) ;
#endif
@@ -120,7 +120,7 @@ void bsp_start( void )
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
Cpu_table.postdriver_hook = bsp_postdriver_hook;
#if ( CPU_ALLOCATE_INTERRUPT_STACK == TRUE )
Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
#endif

4
c/src/lib/libbsp/sh/shsim/trap34/console-io.c
View File

@@ -2,7 +2,7 @@
* This file contains the hardware specific portions of the TTY driver
* for the simulators stdin/out.
*
* Logic based on newlib-1.8.2/newlib/libc/sys/sh/syscalls.c
* Logic based on newlib-1.8.2/newlib/libc/sys/sh/syscalls.c
*
* COPYRIGHT (c) 1989-2000.
* On-Line Applications Research Corporation (OAR).
@@ -56,7 +56,7 @@ void console_outbyte_polled(
}
/*
* console_inbyte_nonblocking
* console_inbyte_nonblocking
*
* This routine polls for a character.
*/

2
c/src/lib/libbsp/sh/shsim/trap34/console-support.S
View File

@@ -14,7 +14,7 @@ ___trap34:
ret:
rts
nop
.align 2
perrno:
.long _errno

22
c/src/lib/libbsp/sh/simsh4/clock/ckinit.c
View File

@@ -29,7 +29,7 @@ volatile uint32_t Clock_driver_ticks;
/*
* These are set by clock driver during its init
*/
rtems_device_major_number rtems_clock_major = ~0;
rtems_device_minor_number rtems_clock_minor;
@@ -39,8 +39,8 @@ static void
set_clock_period(uint32_t period)
{
asm volatile ("\tmov %0,r0\n"
"\ttrapa\t#4\n"
:
"\ttrapa\t#4\n"
:
: "r" (period)
: "r0" );
}
@@ -103,15 +103,15 @@ Install_clock(rtems_isr_entry clock_isr)
if (BSP_Configuration.ticks_per_timeslice)
{
rtems_isr_entry old_isr;
period = Cpu_table.clicks_per_second /
period = Cpu_table.clicks_per_second /
BSP_Configuration.ticks_per_timeslice;
/* Configure timer interrupts */
set_clock_period(period);
/* Register the interrupt handler */
rtems_interrupt_catch(clock_isr, CLOCK_VECTOR, &old_isr);
/* Register the driver exit procedure so we can shutdown */
atexit(Clock_exit);
}
@@ -137,14 +137,14 @@ Clock_initialize(rtems_device_major_number major,
void *pargp)
{
Install_clock (Clock_isr);
/* Make major/minor avail to others such as shared memory driver */
rtems_clock_major = major;
rtems_clock_minor = minor;
return RTEMS_SUCCESSFUL;
}
/* Clock_control --
* I/O control (IOCTL) function for Clock driver. At this moment this
@@ -174,7 +174,7 @@ Clock_control(rtems_device_major_number major,
* This is hokey, but until we get a defined interface
* to do this, it will just be this simple...
*/
if (args->command == rtems_build_name('I', 'S', 'R', ' '))
if (args->command == rtems_build_name('I', 'S', 'R', ' '))
{
Clock_isr(CLOCK_VECTOR);
}

14
c/src/lib/libbsp/sh/simsh4/console/console.c
View File

@@ -164,7 +164,7 @@ console_first_open(int major, int minor, void *arg)
{
return RTEMS_INVALID_NUMBER; /* Single console supported */
}
return RTEMS_SUCCESSFUL;
}
@@ -251,8 +251,8 @@ console_initialize(rtems_device_major_number major,
* RETURNS:
* RTEMS error code
*/
rtems_device_driver
console_open(rtems_device_major_number major,
rtems_device_driver
console_open(rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg)
{
@@ -281,10 +281,10 @@ console_open(rtems_device_major_number major,
{
case CONSOLE_MODE_RAW:
return RTEMS_SUCCESSFUL;
case CONSOLE_MODE_INT:
return rtems_termios_open(major, minor, arg, &intr_callbacks);
case CONSOLE_MODE_POLL:
return rtems_termios_open(major, minor, arg, &poll_callbacks);
@@ -305,7 +305,7 @@ console_open(rtems_device_major_number major,
* RETURNS:
* RTEMS error code
*/
rtems_device_driver
rtems_device_driver
console_close(rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg)
@@ -415,7 +415,7 @@ rtems_device_driver
console_control(rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg)
{
{
if (console_mode != CONSOLE_MODE_RAW)
{
return rtems_termios_ioctl (arg);

8
c/src/lib/libbsp/sh/simsh4/include/bsp.h
View File

@@ -15,7 +15,7 @@
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*
*
*
* COPYRIGHT (c) 1998-2001.
* On-Line Applications Research Corporation (OAR).
@@ -116,7 +116,7 @@ extern uint32_t WorkSpaceEnd ;
extern void *CPU_Interrupt_stack_low ;
extern void *CPU_Interrupt_stack_high ;
/* miscellaneous stuff assumed to exist */
extern rtems_configuration_table BSP_Configuration;
@@ -137,8 +137,8 @@ extern void bsp_cleanup( void );
#define RAMDISK_DRIVER_TABLE_ENTRY \
{ ramdisk_initialize, ramdisk_open, ramdisk_close, \
ramdisk_read, ramdisk_write, ramdisk_control }
/*
* NOTE: Use the standard Clock driver entry
*/

2
c/src/lib/libbsp/sh/simsh4/include/coverhd.h
View File

@@ -18,7 +18,7 @@
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
*
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.

8
c/src/lib/libbsp/sh/simsh4/start/start.S
View File

@@ -19,7 +19,7 @@
* TGA Technologies, Inc.
* 100 Pinnacle Way, Suite 140
* Norcross, GA 30071 U.S.A.
*
*
*
* This modified file may be copied and distributed in accordance
* the above-referenced license. It is provided for critique and
@@ -81,7 +81,7 @@ SYM (start):
mov.l initial_fpscr_k,r0
lds r0,fpscr
! call the mainline
! call the mainline
mov #0,r4 ! argc
mov.l main_k,r0
jsr @r0
@@ -107,7 +107,7 @@ ___trap34:
!ret:
rts
nop
! .align 2
!perrno:
! .long _errno
@@ -122,7 +122,7 @@ _vbr_base_k:
.long SYM(_vbr_base)
stack_k:
.long SYM(stack)
.long SYM(stack)
edata_k:
.long SYM(edata)
end_k:

24
c/src/lib/libbsp/sh/simsh4/startup/bspstart.c
View File

@@ -26,11 +26,11 @@
#include <bsp.h>
#include <rtems/libio.h>
#include <rtems/libcsupport.h>
#include <string.h>
/*
* The original table from the application and our copy of it with
* some changes.
@@ -49,7 +49,7 @@ char *rtems_progname;
/*
* Use the shared implementations of the following routines
*/
void bsp_postdriver_hook(void);
void bsp_libc_init( void *, uint32_t, int );
@@ -65,11 +65,11 @@ void bsp_libc_init( void *, uint32_t, int );
* not yet initialized.
*
*/
void bsp_pretasking_hook(void)
{
bsp_libc_init(&HeapStart, (char *)&HeapEnd - (char *)&HeapStart, 0);
#ifdef RTEMS_DEBUG
rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
#endif
@@ -84,10 +84,10 @@ void bsp_pretasking_hook(void)
void bsp_start(void)
{
/*
For real boards you need to setup the hardware
For real boards you need to setup the hardware
and need to copy the vector table from rom to ram.
Depending on the board this can ether be done from inside the rom
Depending on the board this can ether be done from inside the rom
startup code, rtems startup code or here.
*/
@@ -111,10 +111,10 @@ void bsp_start(void)
*/
BSP_Configuration.work_space_start = (void *) &WorkSpaceStart ;
BSP_Configuration.work_space_size =
(uint32_t) &WorkSpaceEnd -
BSP_Configuration.work_space_size =
(uint32_t) &WorkSpaceEnd -
(uint32_t) &WorkSpaceStart ;
/*
* initialize the CPU table for this BSP
*/
@@ -124,7 +124,7 @@ void bsp_start(void)
_CPU_Interrupt_stack_high = &CPU_Interrupt_stack_high ;
/* This isn't used anywhere */
Cpu_table.interrupt_stack_size =
Cpu_table.interrupt_stack_size =
(uint32_t) (&CPU_Interrupt_stack_high) -
(uint32_t) (&CPU_Interrupt_stack_low) ;
#endif

2
c/src/lib/libbsp/sh/simsh4/startup/hw_init.c
View File

@@ -52,6 +52,6 @@ early_hw_init (void)
* RETURNS:
* none
*/
void bsp_hw_init (void)
void bsp_hw_init (void)
{
}

2
c/src/lib/libbsp/sh/simsh4/timer/timer.c
View File

@@ -13,7 +13,7 @@
* found in the file LICENSE in this distribution or at
*
* http://www.rtems.com/license/LICENSE.
*
*
* $Id$
*/