forked from Imagelibrary/rtems
GRSPW: New packet based driver for SPW/SPW2/SPW2_DMA
This patch adds a new driver for the GRSPW SpaceWire AMBA interface family. The new driver does not implement a standard RTEMS driver, instead it provides only a library interface to the GRSPW devices. This driver can be used to implement a RTEMS I/O driver or used directly. New features compared with old GRSPW driver: * zero-copy packet interface * possibility to send/receive mulitple packets per call * optional interrupt awaken work-task to process TX/RX queues * DMA channels support. Before only first DMA channel supported * Separate DMA and link control * Packet based error flags
This commit is contained in:
Daniel Hellstrom
@@ -151,8 +151,10 @@ libbsp_a_SOURCES += ../../sparc/shared/can/occan.c \
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# SpaceWire
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include_HEADERS += ../../sparc/shared/include/grspw.h
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include_HEADERS += ../../sparc/shared/include/grspw_pkt.h
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include_HEADERS += ../../sparc/shared/include/grspw_router.h
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libbsp_a_SOURCES += ../../sparc/shared/spw/grspw.c
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libbsp_a_SOURCES += ../../sparc/shared/spw/grspw_pkt.c
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libbsp_a_SOURCES += ../../sparc/shared/spw/grspw_router.c
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# UART
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@@ -197,6 +197,10 @@ $(PROJECT_INCLUDE)/grspw.h: ../../sparc/shared/include/grspw.h $(PROJECT_INCLUDE
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$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/grspw.h
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PREINSTALL_FILES += $(PROJECT_INCLUDE)/grspw.h
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$(PROJECT_INCLUDE)/grspw_pkt.h: ../../sparc/shared/include/grspw_pkt.h $(PROJECT_INCLUDE)/$(dirstamp)
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$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/grspw_pkt.h
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PREINSTALL_FILES += $(PROJECT_INCLUDE)/grspw_pkt.h
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$(PROJECT_INCLUDE)/grspw_router.h: ../../sparc/shared/include/grspw_router.h $(PROJECT_INCLUDE)/$(dirstamp)
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$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/grspw_router.h
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PREINSTALL_FILES += $(PROJECT_INCLUDE)/grspw_router.h
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@@ -45,6 +45,7 @@ extern "C" {
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#define DRIVER_AMBAPP_GAISLER_GRPWM_ID DRIVER_AMBAPP_ID(VENDOR_GAISLER, GAISLER_GRPWM)
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#define DRIVER_AMBAPP_GAISLER_GRPWRX_ID DRIVER_AMBAPP_ID(VENDOR_GAISLER, GAISLER_PW2APB)
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#define DRIVER_AMBAPP_GAISLER_GRSPW_ID DRIVER_AMBAPP_ID(VENDOR_GAISLER, GAISLER_SPW)
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#define DRIVER_AMBAPP_GAISLER_GRSPW2_ID DRIVER_AMBAPP_ID(VENDOR_GAISLER, GAISLER_SPW2)
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#define DRIVER_AMBAPP_GAISLER_GRTC_ID DRIVER_AMBAPP_ID(VENDOR_GAISLER, GAISLER_GRTC)
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#define DRIVER_AMBAPP_GAISLER_GRTM_ID DRIVER_AMBAPP_ID(VENDOR_GAISLER, GAISLER_GRTM)
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#define DRIVER_AMBAPP_GAISLER_I2CMST_ID DRIVER_AMBAPP_ID(VENDOR_GAISLER, GAISLER_I2CMST)
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598
c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
Normal file
598
c/src/lib/libbsp/sparc/shared/include/grspw_pkt.h
Normal file
@@ -0,0 +1,598 @@
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/*
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* GRSPW/GRSPW2 SpaceWire Kernel Library Interface
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*
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* COPYRIGHT (c) 2011
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* Cobham Gaisler AB
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.com/license/LICENSE.
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*/
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#ifndef __GRSPW_PKT_H__
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#define __GRSPW_PKT_H__
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struct grspw_pkt;
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/* Maximum number of GRSPW devices supported by driver */
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#define GRSPW_MAX 32
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/* Weak overridable variable the user can use to define the worker-task
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* priority (0..255) or to disable (-1) the creation of the worker-task
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* and the message queue to save space */
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extern int grspw_work_task_priority;
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#ifndef GRSPW_PKT_FLAGS
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#define GRSPW_PKT_FLAGS
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/*** TX Packet flags ***/
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/* Enable IRQ generation */
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#define TXPKT_FLAG_IE 0x0040
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/* Enable Header CRC generation (if CRC is available in HW)
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* Header CRC will be appended (one byte at end of header)
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*/
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#define TXPKT_FLAG_HCRC 0x0100
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/* Enable Data CRC generation (if CRC is available in HW)
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* Data CRC will be appended (one byte at end of packet)
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*/
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#define TXPKT_FLAG_DCRC 0x0200
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/* Control how many bytes the beginning of the Header
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* the CRC should not be calculated for */
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#define TXPKT_FLAG_NOCRC_MASK 0x0000000f
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#define TXPKT_FLAG_NOCRC_LEN0 0x00000000
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#define TXPKT_FLAG_NOCRC_LEN1 0x00000001
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#define TXPKT_FLAG_NOCRC_LEN2 0x00000002
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#define TXPKT_FLAG_NOCRC_LEN3 0x00000003
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#define TXPKT_FLAG_NOCRC_LEN4 0x00000004
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#define TXPKT_FLAG_NOCRC_LEN5 0x00000005
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#define TXPKT_FLAG_NOCRC_LEN6 0x00000006
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#define TXPKT_FLAG_NOCRC_LEN7 0x00000007
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#define TXPKT_FLAG_NOCRC_LEN8 0x00000008
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#define TXPKT_FLAG_NOCRC_LEN9 0x00000009
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#define TXPKT_FLAG_NOCRC_LENa 0x0000000a
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#define TXPKT_FLAG_NOCRC_LENb 0x0000000b
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#define TXPKT_FLAG_NOCRC_LENc 0x0000000c
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#define TXPKT_FLAG_NOCRC_LENd 0x0000000d
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#define TXPKT_FLAG_NOCRC_LENe 0x0000000e
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#define TXPKT_FLAG_NOCRC_LENf 0x0000000f
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/* Marks if packet was transmitted or not */
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#define TXPKT_FLAG_TX 0x8000
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#define TXPKT_FLAG_INPUT_MASK (TXPKT_FLAG_NOCRC_MASK | TXPKT_FLAG_IE | \
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TXPKT_FLAG_HCRC | TXPKT_FLAG_DCRC)
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/* Link Error */
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#define TXPKT_FLAG_LINKERR 0x4000
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#define TXPKT_FLAG_OUTPUT_MASK (TXPKT_FLAG_LINKERR)
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/*** RX Packet Flags ***/
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/* Enable IRQ generation */
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#define RXPKT_FLAG_IE 0x0010
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#define RXPKT_FLAG_INPUT_MASK (RXPKT_FLAG_IE)
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/* Packet was truncated */
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#define RXPKT_FLAG_TRUNK 0x0800
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/* Data CRC error (only valid if RMAP CRC is enabled) */
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#define RXPKT_FLAG_DCRC 0x0400
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/* Header CRC error (only valid if RMAP CRC is enabled) */
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#define RXPKT_FLAG_HCRC 0x0200
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/* Error in End-of-Packet */
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#define RXPKT_FLAG_EEOP 0x0100
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/* Marks if packet was recevied or not */
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#define RXPKT_FLAG_RX 0x8000
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#define RXPKT_FLAG_OUTPUT_MASK (RXPKT_FLAG_TRUNK | RXPKT_FLAG_DCRC | \
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RXPKT_FLAG_HCRC | RXPKT_FLAG_EEOP)
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/*** General packet flag options ***/
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/* Translate Hdr and/or Payload address */
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#define PKT_FLAG_TR_DATA 0x1000
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#define PKT_FLAG_TR_HDR 0x2000
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/* All General options */
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#define PKT_FLAG_MASK 0x3000
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#endif
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/* GRSPW RX/TX Packet structure.
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*
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* - For RX the 'hdr' and 'hlen' fields are not used, they are not written
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* by driver.
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*
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* - The 'pkt_id' field is untouched by driver, it is intended for packet
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* numbering or user-custom data.
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*
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* - The last packet in a list must have 'next' set to NULL.
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*
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* - data and hdr pointers are written without modification to hardware,
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* this means that caller must do address translation to hardware
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* address itself.
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*
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* - the 'flags' field are interpreted differently depending on transfer
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* type (RX/TX). See XXPKT_FLAG_* options above.
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*/
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struct grspw_pkt {
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struct grspw_pkt *next;
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unsigned int pkt_id; /* User assigned ID */
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unsigned short flags; /* RX/TX Options */
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unsigned char reserved; /* Reserved, must be zero */
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unsigned char hlen; /* Length of Header Buffer */
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unsigned int dlen; /* Length of Data Buffer */
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void *data; /* 4-byte or byte aligned depends on HW */
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void *hdr; /* 4-byte or byte aligned depends on HW */
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};
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/* GRSPW SpaceWire Packet List */
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struct grspw_list {
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struct grspw_pkt *head;
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struct grspw_pkt *tail;
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};
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/* SpaceWire Link State */
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typedef enum {
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SPW_LS_ERRRST = 0,
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SPW_LS_ERRWAIT = 1,
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SPW_LS_READY = 2,
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SPW_LS_CONNECTING = 3,
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SPW_LS_STARTED = 4,
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SPW_LS_RUN = 5
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} spw_link_state_t;
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/* Address Configuration */
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struct grspw_addr_config {
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/* Ignore address field and put all received packets to first
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* DMA channel.
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*/
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int promiscuous;
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/* Default Node Address and Mask */
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unsigned char def_addr;
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unsigned char def_mask;
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/* DMA Channel custom Node Address and Mask */
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struct {
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char node_en; /* Enable Separate Addr */
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unsigned char node_addr; /* Node address */
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unsigned char node_mask; /* Node address mask */
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} dma_nacfg[4];
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};
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/* Hardware Support in GRSPW Core */
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struct grspw_hw_sup {
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char rmap; /* If RMAP in HW is available */
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char rmap_crc; /* If RMAP CRC is available */
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char rx_unalign; /* RX unaligned (byte boundary) access allowed*/
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char nports; /* Number of Ports (1 or 2) */
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char ndma_chans; /* Number of DMA Channels (1..4) */
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char strip_adr; /* Hardware can strip ADR from packet data */
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char strip_pid; /* Hardware can strip PID from packet data */
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int hw_version; /* GRSPW Hardware Version */
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char reserved[2];
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};
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struct grspw_core_stats {
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int irq_cnt;
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int err_credit;
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int err_eeop;
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int err_addr;
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int err_parity;
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int err_escape;
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int err_wsync; /* only in GRSPW1 */
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};
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/* grspw_link_ctrl() options */
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#define LINKOPTS_ENABLE 0x0000
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#define LINKOPTS_DISABLE 0x0001
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#define LINKOPTS_START 0x0002
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#define LINKOPTS_AUTOSTART 0x0004
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#define LINKOPTS_DIS_ONERR 0x0008
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/*#define LINKOPTS_TICK_OUT_IRQ 0x0100*//* Enable Tick-out IRQ */
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#define LINKOPTS_IRQ 0x0200 /* Enable Error Link IRQ */
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#define LINKOPTS_MASK 0x020f /* All above options */
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/* grspw_tc_ctrl() options */
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#define TCOPTS_EN_RXIRQ 0x0001 /* Tick-Out IRQ */
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#define TCOPTS_EN_TX 0x0004
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#define TCOPTS_EN_RX 0x0008
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/* grspw_rmap_ctrl() options */
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#define RMAPOPTS_EN_RMAP 0x0001
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#define RMAPOPTS_EN_BUF 0x0002
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/* grspw_dma_config.flags options */
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#define DMAFLAG_NO_SPILL 0x0001 /* See HW doc DMA-CTRL NS bit */
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#define DMAFLAG_RESV1 0x0002 /* HAS NO EFFECT */
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#define DMAFLAG_STRIP_ADR 0x0004 /* See HW doc DMA-CTRL SA bit */
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#define DMAFLAG_STRIP_PID 0x0008 /* See HW doc DMA-CTRL SP bit */
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#define DMAFLAG_RESV2 0x0010 /* HAS NO EFFECT */
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#define DMAFLAG_MASK (DMAFLAG_NO_SPILL|DMAFLAG_STRIP_ADR|DMAFLAG_STRIP_PID)
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struct grspw_dma_config {
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int flags;
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int rxmaxlen; /* RX Max Packet Length */
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int rx_irq_en_cnt; /* Enable RX IRQ every cnt descriptors */
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int tx_irq_en_cnt; /* Enable TX IRQ every cnt descriptors */
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};
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/* Statistics per DMA channel */
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struct grspw_dma_stats {
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/* IRQ Statistics */
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int irq_cnt; /* Number of DMA IRQs generated by channel */
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/* Descriptor Statistics */
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int tx_pkts; /* Number of Transmitted packets */
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int tx_err_link; /* Number of Transmitted packets with Link Error*/
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int rx_pkts; /* Number of Received packets */
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int rx_err_trunk; /* Number of Received Truncated packets */
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int rx_err_endpkt; /* Number of Received packets with bad ending */
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/* Diagnostics to help developers sizing their number buffers to avoid
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* out-of-buffers or other phenomenons.
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*/
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int send_cnt_min; /* Minimum number of packets in TX SEND Q */
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int send_cnt_max; /* Maximum number of packets in TX SEND Q */
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int tx_sched_cnt_min; /* Minimum number of packets in TX SCHED Q */
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int tx_sched_cnt_max; /* Maximum number of packets in TX SCHED Q */
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int sent_cnt_max; /* Maximum number of packets in TX SENT Q */
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int tx_work_cnt; /* Times the work thread processed TX BDs */
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int tx_work_enabled; /* No. RX BDs enabled by work thread */
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int ready_cnt_min; /* Minimum number of packets in RX READY Q */
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int ready_cnt_max; /* Maximum number of packets in RX READY Q */
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int rx_sched_cnt_min; /* Minimum number of packets in RX SCHED Q */
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int rx_sched_cnt_max; /* Maximum number of packets in RX SCHED Q */
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int recv_cnt_max; /* Maximum number of packets in RX RECV Q */
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int rx_work_cnt; /* Times the work thread processed RX BDs */
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int rx_work_enabled; /* No. RX BDs enabled by work thread */
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};
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extern void grspw_initialize_user(
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/* Callback every time a GRSPW device is found. Args: DeviceIndex */
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void *(*devfound)(int),
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/* Callback every time a GRSPW device is removed. Args:
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* int = DeviceIndex
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* void* = Return Value from devfound()
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*/
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void (*devremove)(int,void*)
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);
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extern int grspw_dev_count(void);
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extern void *grspw_open(int dev_no);
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extern void grspw_close(void *d);
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extern void grspw_hw_support(void *d, struct grspw_hw_sup *hw);
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extern void grspw_stats_read(void *d, struct grspw_core_stats *sts);
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extern void grspw_stats_clr(void *d);
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/* Set and Read current node address configuration. The dma_nacfg[N] field
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* represents the configuration for DMA Channel N.
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*
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* Set cfg->promiscous to -1 in order to only read current configuration.
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*/
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extern void grspw_addr_ctrl(void *d, struct grspw_addr_config *cfg);
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/*** Link Control interface ***/
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/* Read Link State */
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extern spw_link_state_t grspw_link_state(void *d);
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/* options [in/out]: set to -1 to only read current config
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*
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* CLKDIV register contain:
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* bits 7..0 : Clock Div RUN (only run-state)
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* bits 15..8 : Clock Div During Startup (all link states except run-state)
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*/
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extern void grspw_link_ctrl(void *d, int *options, int *clkdiv);
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/* Read the current value of the status register */
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extern unsigned int grspw_status(void *d);
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/*** Time Code Interface ***/
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/* Generate Tick-In (increment Time Counter, Send Time Code) */
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extern void grspw_tc_tx(void *d);
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/* Control Timcode settings of core */
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extern void grspw_tc_ctrl(void *d, int *options);
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/* Assign ISR Function to TimeCode RX IRQ */
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extern void grspw_tc_isr(void *d, void (*tcisr)(void *data, int tc), void *data);
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/* Read/Write TCTRL and TIMECNT. Write if not -1, always read current value
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* TCTRL = bits 7 and 6
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* TIMECNT = bits 5 to 0
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*/
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extern void grspw_tc_time(void *d, int *time);
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/*** RMAP Control Interface ***/
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/* Set (not -1) and/or read RMAP options. */
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extern int grspw_rmap_ctrl(void *d, int *options, int *dstkey);
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extern void grspw_rmap_support(void *d, char *rmap, char *rmap_crc);
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/*** SpW Port Control Interface ***/
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/* Select port, if
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* -1=The current selected port is returned
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* 0=Port 0
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* 1=Port 1
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* Other positive values=Both Port0 and Port1
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*/
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extern int grspw_port_ctrl(void *d, int *port);
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/* Returns Number ports available in hardware */
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extern int grspw_port_count(void *d);
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/* Returns the current active port */
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extern int grspw_port_active(void *d);
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/*** DMA Interface ***/
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extern void *grspw_dma_open(void *d, int chan_no);
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extern void grspw_dma_close(void *c);
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extern int grspw_dma_start(void *c);
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extern void grspw_dma_stop(void *c);
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/* Schedule List of packets for transmission at some point in
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* future.
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*
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* 1. Move transmitted packets to SENT List (SCHED->SENT)
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* 2. Add the requested packets to the SEND List (USER->SEND)
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* 3. Schedule as many packets as possible for transmission (SEND->SCHED)
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*
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* Call this function with pkts=NULL to just do step 1 and 3. This may be
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* required in Polling-mode.
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*
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* The above steps 1 and 3 may be skipped by setting 'opts':
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* bit0 = 1: Skip Step 1.
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* bit1 = 1: Skip Step 3.
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* Skipping both step 1 and 3 may be usefull when IRQ is enabled, then
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* the work queue will be totaly responsible for handling descriptors.
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*
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* The fastest solution in retreiving sent TX packets and sending new frames
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* is to call:
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* A. grspw_dma_tx_reclaim(opts=0)
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* B. grspw_dma_tx_send(opts=1)
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*
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* NOTE: the TXPKT_FLAG_TX flag must not be set.
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*
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* Return Code
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* -1 Error
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* 0 Successfully added pkts to send/sched list
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* 1 DMA stopped. No operation.
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*/
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extern int grspw_dma_tx_send(void *c, int opts, struct grspw_list *pkts, int count);
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/* Reclaim TX packet buffers that has previously been scheduled for transmission
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* with grspw_dma_tx_send().
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*
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* 1. Move transmitted packets to SENT List (SCHED->SENT)
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* 2. Move all SENT List to pkts list (SENT->USER)
|
||||
* 3. Schedule as many packets as possible for transmission (SEND->SCHED)
|
||||
*
|
||||
* The above steps 1 may be skipped by setting 'opts':
|
||||
* bit0 = 1: Skip Step 1.
|
||||
* bit1 = 1: Skip Step 3.
|
||||
*
|
||||
* The fastest solution in retreiving sent TX packets and sending new frames
|
||||
* is to call:
|
||||
* A. grspw_dma_tx_reclaim(opts=2) (Skip step 3)
|
||||
* B. grspw_dma_tx_send(opts=1) (Skip step 1)
|
||||
*
|
||||
* Return Code
|
||||
* -1 Error
|
||||
* 0 Successful. pkts list filled with all packets from sent list
|
||||
* 1 Same as 0, but indicates that DMA stopped
|
||||
*/
|
||||
extern int grspw_dma_tx_reclaim(void *c, int opts, struct grspw_list *pkts, int *count);
|
||||
|
||||
/* Get current number of Packets in respective TX Queue. */
|
||||
extern void grspw_dma_tx_count(void *c, int *send, int *sched, int *sent);
|
||||
|
||||
#define GRSPW_OP_AND 0
|
||||
#define GRSPW_OP_OR 1
|
||||
/* Block until ready_cnt or fewer packets are Queued in "Send and Scheduled" Q,
|
||||
* op (AND or OR), sent_cnt or more packet "have been sent" (Sent Q) condition
|
||||
* is met.
|
||||
* If a link error occurs and the Stop on Link error is defined, this function
|
||||
* will also return to caller.
|
||||
* The timeout argument is used to return after timeout ticks, regardless of
|
||||
* the other conditions. If timeout is zero, the function will wait forever
|
||||
* until the condition is satisfied.
|
||||
*
|
||||
* NOTE: if IRQ of TX descriptors are not enabled conditions are never
|
||||
* checked, this may hang infinitely unless a timeout has been specified
|
||||
*
|
||||
* Return Code
|
||||
* -1 Error
|
||||
* 0 Returing to caller because specified conditions are now fullfilled
|
||||
* 1 DMA stopped
|
||||
* 2 Timeout, conditions are not met
|
||||
*/
|
||||
extern int grspw_dma_tx_wait(void *c, int send_cnt, int op, int sent_cnt, int timeout);
|
||||
|
||||
/* Get received RX packet buffers that has previously been scheduled for
|
||||
* reception with grspw_dma_rx_prepare().
|
||||
*
|
||||
* 1. Move Scheduled packets to RECV List (SCHED->RECV)
|
||||
* 2. Move all RECV packet to the callers list (RECV->USER)
|
||||
* 3. Schedule as many free packet buffers as possible (READY->SCHED)
|
||||
*
|
||||
* The above steps 1 may be skipped by setting 'opts':
|
||||
* bit0 = 1: Skip Step 1.
|
||||
* bit1 = 1: Skip Step 3.
|
||||
*
|
||||
* The fastest solution in retreiving received RX packets and preparing new
|
||||
* packet buffers for future receive, is to call:
|
||||
* A. grspw_dma_rx_recv(opts=2, &recvlist) (Skip step 3)
|
||||
* B. grspw_dma_rx_prepare(opts=1, &freelist) (Skip step 1)
|
||||
*
|
||||
* Return Code
|
||||
* -1 Error
|
||||
* 0 Successfully filled pkts list with packets from recv list.
|
||||
* 1 DMA stopped
|
||||
*/
|
||||
extern int grspw_dma_rx_recv(void *c, int opts, struct grspw_list *pkts, int *count);
|
||||
|
||||
/* Add more RX packet buffers for future for reception. The received packets
|
||||
* can later be read out with grspw_dma_rx_recv().
|
||||
*
|
||||
* 1. Move Received packets to RECV List (SCHED->RECV)
|
||||
* 2. Add the "free/ready" packet buffers to the READY List (USER->READY)
|
||||
* 3. Schedule as many packets as possible (READY->SCHED)
|
||||
*
|
||||
* The above steps 1 may be skipped by setting 'opts':
|
||||
* bit0 = 1: Skip Step 1.
|
||||
* bit1 = 1: Skip Step 3.
|
||||
*
|
||||
* The fastest solution in retreiving received RX packets and preparing new
|
||||
* packet buffers for future receive, is to call:
|
||||
* A. grspw_dma_rx_recv(opts=2, &recvlist) (Skip step 3)
|
||||
* B. grspw_dma_rx_prepare(opts=1, &freelist) (Skip step 1)
|
||||
*
|
||||
* Return Code
|
||||
* -1 Error
|
||||
* 0 Successfully added packet buffers from pkt list into the ready queue
|
||||
* 1 DMA stopped
|
||||
*/
|
||||
extern int grspw_dma_rx_prepare(void *c, int opts, struct grspw_list *pkts, int count);
|
||||
|
||||
/* Get current number of Packets in respective RX Queue. */
|
||||
extern void grspw_dma_rx_count(void *c, int *ready, int *sched, int *recv);
|
||||
|
||||
/* Block until recv_cnt or more packets are Queued in RECV Q, op (AND or OR),
|
||||
* ready_cnt or fewer packet buffers are available in the "READY and Scheduled" Q,
|
||||
* condition is met.
|
||||
* If a link error occurs and the Stop on Link error is defined, this function
|
||||
* will also return to caller, however with an error.
|
||||
* The timeout argument is used to return after timeout ticks, regardless of
|
||||
* the other conditions. If timeout is zero, the function will wait forever
|
||||
* until the condition is satisfied.
|
||||
*
|
||||
* NOTE: if IRQ of TX descriptors are not enabled conditions are never
|
||||
* checked, this may hang infinitely unless a timeout has been specified
|
||||
*
|
||||
* Return Code
|
||||
* -1 Error
|
||||
* 0 Returing to caller because specified conditions are now fullfilled
|
||||
* 1 DMA stopped
|
||||
* 2 Timeout, conditions are not met
|
||||
*/
|
||||
extern int grspw_dma_rx_wait(void *c, int recv_cnt, int op, int ready_cnt, int timeout);
|
||||
|
||||
extern int grspw_dma_config(void *c, struct grspw_dma_config *cfg);
|
||||
extern void grspw_dma_config_read(void *c, struct grspw_dma_config *cfg);
|
||||
|
||||
extern void grspw_dma_stats_read(void *c, struct grspw_dma_stats *sts);
|
||||
extern void grspw_dma_stats_clr(void *c);
|
||||
|
||||
/*** GRSPW SpaceWire Packet List Handling Routines ***/
|
||||
|
||||
static inline void grspw_list_clr(struct grspw_list *list)
|
||||
{
|
||||
list->head = NULL;
|
||||
list->tail = NULL;
|
||||
}
|
||||
|
||||
static inline int grspw_list_is_empty(struct grspw_list *list)
|
||||
{
|
||||
return (list->head == NULL);
|
||||
}
|
||||
|
||||
/* Return Number of entries in list */
|
||||
static inline int grspw_list_cnt(struct grspw_list *list)
|
||||
{
|
||||
struct grspw_pkt *lastpkt = NULL, *pkt = list->head;
|
||||
int cnt = 0;
|
||||
while ( pkt ) {
|
||||
cnt++;
|
||||
lastpkt = pkt;
|
||||
pkt = pkt->next;
|
||||
}
|
||||
if ( lastpkt && (list->tail != lastpkt) )
|
||||
return -1;
|
||||
return cnt;
|
||||
}
|
||||
|
||||
static inline void
|
||||
grspw_list_append(struct grspw_list *list, struct grspw_pkt *pkt)
|
||||
{
|
||||
pkt->next = NULL;
|
||||
if ( list->tail == NULL ) {
|
||||
list->head = pkt;
|
||||
} else {
|
||||
list->tail->next = pkt;
|
||||
}
|
||||
list->tail = pkt;
|
||||
}
|
||||
|
||||
static inline void
|
||||
grspw_list_prepend(struct grspw_list *list, struct grspw_pkt *pkt)
|
||||
{
|
||||
pkt->next = list->head;
|
||||
if ( list->head == NULL ) {
|
||||
list->tail = pkt;
|
||||
}
|
||||
list->head = pkt;
|
||||
}
|
||||
|
||||
static inline void
|
||||
grspw_list_append_list(struct grspw_list *list, struct grspw_list *alist)
|
||||
{
|
||||
alist->tail->next = NULL;
|
||||
if ( list->tail == NULL ) {
|
||||
list->head = alist->head;
|
||||
} else {
|
||||
list->tail->next = alist->head;
|
||||
}
|
||||
list->tail = alist->tail;
|
||||
}
|
||||
|
||||
static inline void
|
||||
grspw_list_prepend_list(struct grspw_list *list, struct grspw_list *alist)
|
||||
{
|
||||
if ( list->head == NULL ) {
|
||||
list->tail = alist->tail;
|
||||
alist->tail->next = NULL;
|
||||
} else {
|
||||
alist->tail->next = list->head;
|
||||
}
|
||||
list->head = alist->head;
|
||||
}
|
||||
|
||||
/* Remove dlist (delete-list) from head of list */
|
||||
static inline void
|
||||
grspw_list_remove_head_list(struct grspw_list *list, struct grspw_list *dlist)
|
||||
{
|
||||
list->head = dlist->tail->next;
|
||||
if ( list->head == NULL ) {
|
||||
list->tail = NULL;
|
||||
}
|
||||
dlist->tail->next = NULL;
|
||||
}
|
||||
|
||||
/* Take A number of entries from head of list 'list' and put the entires
|
||||
* to rlist (result list).
|
||||
*/
|
||||
static inline int
|
||||
grspw_list_take_head_list(struct grspw_list *list, struct grspw_list *rlist, int max)
|
||||
{
|
||||
int cnt;
|
||||
struct grspw_pkt *pkt, *last;
|
||||
|
||||
pkt = list->head;
|
||||
|
||||
if ( (max < 1) || (pkt == NULL) ) {
|
||||
grspw_list_clr(rlist);
|
||||
return 0;
|
||||
}
|
||||
|
||||
cnt = 0;
|
||||
rlist->head = pkt;
|
||||
last = pkt;
|
||||
while ((cnt < max) && pkt) {
|
||||
last = pkt;
|
||||
pkt = pkt->next;
|
||||
cnt++;
|
||||
}
|
||||
rlist->tail = last;
|
||||
grspw_list_remove_head_list(list, rlist);
|
||||
return cnt;
|
||||
}
|
||||
|
||||
#endif
|
||||
2642
c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
Normal file
2642
c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
Normal file
File diff suppressed because it is too large
Load Diff
@@ -42,6 +42,9 @@ extern void greth_register_drv(void);
|
||||
#define DRIVER_AMBAPP_GAISLER_GRSPW_REG {grspw_register_drv}
|
||||
extern void grspw_register_drv(void);
|
||||
|
||||
#define DRIVER_AMBAPP_GAISLER_GRSPW2_REG {grspw2_register_drv}
|
||||
extern void grspw2_register_drv(void);
|
||||
|
||||
#define DRIVER_AMBAPP_GAISLER_GRCAN_REG {grcan_register_drv}
|
||||
extern void grcan_register_drv(void);
|
||||
|
||||
@@ -155,6 +158,9 @@ struct drvmgr_drv_reg_func drvmgr_drivers[] = {
|
||||
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW
|
||||
DRIVER_AMBAPP_GAISLER_GRSPW_REG,
|
||||
#endif
|
||||
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW2
|
||||
DRIVER_AMBAPP_GAISLER_GRSPW2_REG,
|
||||
#endif
|
||||
#ifdef CONFIGURE_DRIVER_AMBAPP_GAISLER_GRCAN
|
||||
DRIVER_AMBAPP_GAISLER_GRCAN_REG,
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user