new files submitted by Craig Lebakken (lebakken@minn.net) and Derrick Ostertag

(ostertag@transition.com)
This commit is contained in:
Joel Sherrill
1996-09-18 21:13:10 +00:00
parent 7abd27bda1
commit 0836603ae8
19 changed files with 1951 additions and 0 deletions

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#
# README,v 1.2 1995/05/31 16:56:03 joel Exp
#
# This is a sample hardware description file for a BSP. This comment
# block does not have to appear in a real one. The intention of this
# file is to provide a central place to look when searching for
# information about a board when starting a new BSP. For example,
# you may want to find an existing timer driver for the chip you are
# using on your board. It is easier to grep for the chip name in
# all of the HARDWARE files than to peruse the source tree. Hopefully,
# making the HARDDWARE files accurate will also alleviate the common
# problem of not knowing anything about a board based on its BSP
# name.
#
# NOTE: If you have a class of peripheral chip on board which
# is not in this list please add it to this file so
# others will also use the same name.
#
# Timer resolution is the way it is configured in this BSP.
# On a counting timer, this is the length of time which
# corresponds to 1 count.
#
# $Id$
BSP NAME: fastsbc1
BOARD: Fasssst Computers, Fast SBC-1
BUS: SchoolBus
CPU FAMILY: i386
CPU: Intel Hexium
COPROCESSORS: Witch Hex87
MODE: 32 bit mode
DEBUG MONITOR: HexBug
PERIPHERALS
===========
TIMERS: Intel i8254
RESOLUTION: .0001 microseconds
SERIAL PORTS: Zilog Z8530 (with 2 ports)
REAL-TIME CLOCK: RTC-4
DMA: Intel i8259
VIDEO: none
SCSI: none
NETWORKING: none
DRIVER INFORMATION
==================
CLOCK DRIVER: RTC-4
IOSUPP DRIVER: Zilog Z8530 port A
SHMSUPP: polled and interrupts
TIMER DRIVER: Intel i8254
TTY DRIVER: stub only
STDIO
=====
PORT: Console port 0
ELECTRICAL: RS-232
BAUD: 9600
BITS PER CHARACTER: 8
PARITY: None
STOP BITS: 1
NOTES
=====
(1) 900 Mhz and 950 Mhz versions.
(2) 1 Gb or 2 Gb RAM.
(3) PC compatible if HexBug not enabled.

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/*
* $Id$
*/
typedef enum
{
CON_KBHIT,
CON_GET_RAW_BYTE,
CON_SEND_RAW_BYTE
} console_ioctl_t;
typedef struct
{
console_ioctl_t ioctl_type;
unsigned32 param;
} console_ioctl_request_t;

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/*
* This file contains the template for a console IO package.
*
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
* On-Line Applications Research Corporation (OAR).
* All rights assigned to U.S. Government, 1994.
*
* This material may be reproduced by or for the U.S. Government pursuant
* to the copyright license under the clause at DFARS 252.227-7013. This
* notice must appear in all copies of this file and its derivatives.
*
* $Id$
*/
#define NO_BSP_INIT
/* only one of the following can be defined */
#define SERIAL_INPUT /* use serial input */
/* #define HIF_INPUT */ /* use HIF input */
#if defined(SERIAL_INPUT) && defined(HIF_INPUT)
#error SERIAL_INPUT and HIF_INPUT cannot both be defined!!!
#endif
/* both of the following can be defined */
#define SERIAL_OUTPUT /* remove to disable serial port console output */
/* #define HIF_OUTPUT */ /* remove to disable HIF console output */
#include <bsp.h>
#include <rtems/libio.h>
#include "serial.h"
#include "concntl.h"
#ifndef lint
static char _sccsid[] = "@(#)console.c 09/12/96 1.13\n";
#endif
/* console_initialize
*
* This routine initializes the console IO driver.
*
* Input parameters: NONE
*
* Output parameters: NONE
*
* Return values:
*/
rtems_device_driver console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_status_code status;
if ( arg )
{
if ( console_duartinit(minor,*(unsigned32*)arg) )
return RTEMS_INVALID_NUMBER;
}
else
{
if ( console_duartinit(1,9600) || console_duartinit(0,9600) )
{
return RTEMS_INVALID_NUMBER;
}
}
status = rtems_io_register_name(
"/dev/console",
major,
(rtems_device_minor_number) 0
);
if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status);
return RTEMS_SUCCESSFUL;
}
/* is_character_ready
*
* This routine returns TRUE if a character is available.
*
* Input parameters: NONE
*
* Output parameters: NONE
*
* Return values:
*/
rtems_boolean is_character_ready(
char *ch
)
{
*ch = '\0'; /* return NULL for no particular reason */
return(TRUE);
}
/* inbyte
*
* This routine reads a character from the SOURCE.
*
* Input parameters: NONE
*
* Output parameters: NONE
*
* Return values:
* character read from SOURCE
*/
char inbyte( unsigned int minor )
{
/*
* If polling, wait until a character is available.
*/
#ifdef HIF_INPUT
char retch;
_read( 1, &retch, 1 );
return retch;
#endif
#ifdef SERIAL_INPUT
return console_sps_getc( minor );
#endif
}
/* outbyte
*
* This routine transmits a character out the SOURCE. It may support
* XON/XOFF flow control.
*
* Input parameters:
* ch - character to be transmitted
*
* Output parameters: NONE
*/
void outbyte( unsigned int minor,
char ch
)
{
/*
* If polling, wait for the transmitter to be ready.
* Check for flow control requests and process.
* Then output the character.
*/
#ifdef SERIAL_OUTPUT
console_sps_putc( minor, ch );
#endif
/*
* Carriage Return/New line translation.
*/
if ( ch == '\n' )
outbyte( minor, '\r' );
}
/*
* Open entry point
*/
rtems_device_driver console_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return RTEMS_SUCCESSFUL;
}
/*
* Close entry point
*/
rtems_device_driver console_close(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return RTEMS_SUCCESSFUL;
}
/*
* read bytes from the serial port. We only have stdin.
*/
rtems_device_driver console_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
rtems_libio_rw_args_t *rw_args;
unsigned8 *buffer;
unsigned32 maximum;
unsigned32 count = 0;
rw_args = (rtems_libio_rw_args_t *) arg;
buffer = rw_args->buffer;
maximum = rw_args->count;
for (count = 0; count < maximum; count++) {
buffer[ count ] = inbyte(minor);
if (buffer[ count ] == '\n' || buffer[ count ] == '\r') {
buffer[ count++ ] = '\n';
buffer[ count ] = 0;
outbyte( minor, '\n' ); /* newline */
break;
}
else if (buffer[ count ] == '\b' && count > 0 )
{
outbyte( minor, '\b' ); /* move back one space */
outbyte( minor, ' ' ); /* erase the character */
outbyte( minor, '\b' ); /* move back one space */
count-=2;
}
else
outbyte( minor, buffer[ count ] ); /* echo the character */
}
rw_args->bytes_moved = count;
return (count > 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED;
}
/*
* write bytes to the serial port. Stdout and stderr are the same.
*/
rtems_device_driver console_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
int count;
int maximum;
rtems_libio_rw_args_t *rw_args;
unsigned8 *buffer;
rw_args = (rtems_libio_rw_args_t *) arg;
buffer = rw_args->buffer;
maximum = rw_args->count;
#ifdef HIF_OUTPUT
_write( 0, buffer, maximum );
#endif
#ifdef SERIAL_OUTPUT
for (count = 0; count < maximum; count++) {
if ( buffer[ count ] == '\n') {
outbyte(minor,'\r');
}
outbyte( minor,buffer[ count ] );
}
#endif
rw_args->bytes_moved = maximum;
return 0;
}
/*
* IO Control entry point
*/
rtems_device_driver console_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
if (!arg)
return RTEMS_INVALID_ADDRESS;
switch( ((console_ioctl_request_t *)arg)->ioctl_type )
{
case CON_KBHIT:
/* check if keyboard was hit */
((console_ioctl_request_t *)arg)->param = console_sps_kbhit(minor);
break;
case CON_GET_RAW_BYTE:
((console_ioctl_request_t *)arg)->param = inbyte(minor);
break;
case CON_SEND_RAW_BYTE:
outbyte(minor, ((console_ioctl_request_t *)arg)->param);
break;
default:
break;
}
return RTEMS_SUCCESSFUL;
}

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/*
* $Id$
*/
#include "serial.h"
#include "rtems.h"
typedef unsigned char uchar ; /* Abbreviations */
typedef unsigned short ushort ;
typedef unsigned long ulong ;
#if 0
#define BAUDRate 9600 /* Fixed Uart baud rate */
#endif
#define SEND_WAIT 0x0100 /* Waiting to send character */
#define TDR(i)
/********************************************************************
*** 16552 specific DUART definitions.
*******************************************************************/
typedef struct uart_16552 DUART ;
#ifndef notdef
struct uart_16552
{
short u_short[8*2] ;
} ;
#define u_reg(n) u_short[2*(n)]
#else
struct uart_16552
{
int u_int[8] ;
} ;
#define u_reg(n) u_int[(n)]
#endif
#define u_tdr u_reg(0) /* Transmit Data Register (write) */
#define u_rdr u_reg(0) /* Receive Data Register (read) */
#define u_dlr0 u_reg(0) /* Divisor Latch Register (lsb) */
#define u_ier u_reg(1) /* Interrupt Enable Register */
#define u_dlr1 u_reg(1) /* Divisor Latch Register (msb) */
#define u_iir u_reg(2) /* Interrupt ID Register (read) */
#define u_fcr u_reg(2) /* FIFO Control Register (write) */
#define u_afr u_reg(2) /* Alternate Funct Reg (read/write) */
#define u_lcr u_reg(3) /* Line Control Register */
#define u_mcr u_reg(4) /* Modem Control Register */
#define u_lsr u_reg(5) /* Line Status Register */
#define u_msr u_reg(6) /* Modem Status Register */
#define u_spr u_reg(7) /* Scratch Pad Register */
#define uart1 ((volatile DUART *)0x90000380)
#define uart2 ((volatile DUART *)0x90000300)
#define NUM_UARTS 2
static volatile DUART * duart[NUM_UARTS] = { uart1, uart2 };
extern void display_msg(void);
/*extern int sprintf();*/
#define board_rev_reg ((volatile short *)0x90000080)
static unsigned int shift_val = 0;
/***********************************************************************
*** 16552 DUART initialization routine.
***********************************************************************/
int
console_duartinit(unsigned int uart_num, unsigned int BAUDRate)
{
register uchar tmp;
unsigned int board_rev = *board_rev_reg & 0xff;
switch( BAUDRate )
{
case 1200:
case 2400:
case 9600:
case 19200:
case 38400:
case 57600:
break;
default:
/* unknown baud rate */
return FALSE;
}
/* the board rev register should never be 0xff.
if it equals 0xff, assume that we're on old hardware
that needs all values shifted by 8. */
if ( board_rev == 0xff )
shift_val = 8;
else
shift_val = 0;
if ( uart_num >= NUM_UARTS )
return -1;
duart[uart_num]->u_lcr = 0x80<<shift_val ; /* Set DLAB bit to 1 */
duart[uart_num]->u_dlr0 = ((115200 / BAUDRate) >> 0)<<shift_val ; /* Set baud */
duart[uart_num]->u_dlr1 = ((115200 / BAUDRate) >> 8)<<shift_val ; /* rate */
duart[uart_num]->u_lcr = 0x03<<shift_val ; /* 8 bits, no parity, 1 stop */
duart[uart_num]->u_mcr = 0x0b<<shift_val ; /* Assert RTS, DTR & OUT2 */
duart[uart_num]->u_fcr = 0x00<<shift_val ; /* Clear 16552 FIFOs */
/* Is the following write of 0x01 needed? */
/* Let's try it without... */
duart[uart_num]->u_fcr = 0xc7<<shift_val ; /* Enable 16552 FIFOs */
duart[uart_num]->u_ier = 0x07<<shift_val ; /* Enable transmit/receive ints */
tmp = duart[uart_num]->u_lsr ; /* Re-arm interrupts */
tmp = duart[uart_num]->u_rdr ;
tmp = duart[uart_num]->u_msr ;
return(0);
}
/*------------ end of duartinit function ----------------*/
/***********************************************************************
*** Transmit character to host.
***********************************************************************/
int console_sps_putc(unsigned int uart_num, int ch)
{
register unsigned short stat;
if ( uart_num >= NUM_UARTS )
return -1;
/*
* Pause until there is room in the UART transmit
* buffer.
*/
do {
stat = duart[uart_num]->u_lsr>>shift_val;
} while (!(stat & 0x40));
/*
* Transmit data. (Junk)
*/
TDR(ch)
duart[uart_num]->u_tdr = ch<<shift_val ;
return ch;
}
/***********************************************************************
*** Read character from host.
***********************************************************************/
int console_sps_getc(unsigned int uart_num)
{
register unsigned short stat;
register int ch;
if ( uart_num >= NUM_UARTS )
return -1;
stat = duart[uart_num]->u_lsr>>shift_val;
while (!(stat & 0x01))
{
rtems_task_wake_after( RTEMS_YIELD_PROCESSOR );
stat = duart[uart_num]->u_lsr>>shift_val;
}
ch = duart[uart_num]->u_rdr>>shift_val;
return ch;
}
/***********************************************************************
*** check character from host.
***********************************************************************/
int console_sps_kbhit(unsigned int uart_num)
{
register unsigned short stat;
if ( uart_num >= NUM_UARTS )
return -1;
stat = duart[uart_num]->u_lsr>>shift_val;
return ((stat & 0x01));
}

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/*
* $Id$
*/
int console_duartinit(unsigned int uart_num, unsigned int BAUDRate);
int console_sps_putc(unsigned int uart_num, int ch);
int console_sps_getc(unsigned int uart_num);
int console_sps_kbhit(unsigned int uart_num);

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/* bsp.h
*
* This include file contains all board IO definitions.
*
* XXX : put yours in here
*
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
* On-Line Applications Research Corporation (OAR).
* All rights assigned to U.S. Government, 1994.
*
* This material may be reproduced by or for the U.S. Government pursuant
* to the copyright license under the clause at DFARS 252.227-7013. This
* notice must appear in all copies of this file and its derivatives.
*
* $Id$
*/
#ifndef __NO_BSP_h
#define __NO_BSP_h
#ifdef __cplusplus
extern "C" {
#endif
#include <rtems.h>
#include <console.h>
#include <clockdrv.h>
/*
* Define the time limits for RTEMS Test Suite test durations.
* Long test and short test duration limits are provided. These
* values are in seconds and need to be converted to ticks for the
* application.
*
*/
#define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */
#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */
/*
* Stuff for Time Test 27
*/
#define MUST_WAIT_FOR_INTERRUPT 0
#define Install_tm27_vector( handler ) set_vector( (handler), 0, 1 )
#define Cause_tm27_intr()
#define Clear_tm27_intr()
#define Lower_tm27_intr()
/*
* Simple spin delay in microsecond units for device drivers.
* This is very dependent on the clock speed of the target.
*/
#define delay( microseconds ) \
{ \
}
/* Constants */
#define CPU_CLOCK_RATE_MHZ 25
#define RAM_START 0
#define RAM_END 0x100000
/* miscellaneous stuff assumed to exist */
extern rtems_configuration_table BSP_Configuration;
/*
* Device Driver Table Entries
*/
/*
* NOTE: Use the standard Console driver entry
*/
/*
* NOTE: Use the standard Clock driver entry
*/
/*
* How many libio files we want
*/
#define BSP_LIBIO_MAX_FDS 20
/* functions */
void bsp_cleanup( void );
no_cpu_isr_entry set_vector( /* returns old vector */
rtems_isr_entry handler, /* isr routine */
rtems_vector_number vector, /* vector number */
int type /* RTEMS or RAW intr */
);
#ifdef __cplusplus
}
#endif
#endif
/* end of include file */

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/* coverhd.h
*
* This include file has defines to represent the overhead associated
* with calling a particular directive from C. These are used in the
* Timing Test Suite to ignore the overhead required to pass arguments
* to directives. On some CPUs and/or target boards, this overhead
* is significant and makes it difficult to distinguish internal
* RTEMS execution time from that used to call the directive.
* This file should be updated after running the C overhead timing
* test. Once this update has been performed, the RTEMS Time Test
* Suite should be rebuilt to account for these overhead times in the
* timing results.
*
* NOTE: If these are all zero, then the times reported include all
* all calling overhead including passing of arguments.
*
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
* On-Line Applications Research Corporation (OAR).
* All rights assigned to U.S. Government, 1994.
*
* This material may be reproduced by or for the U.S. Government pursuant
* to the copyright license under the clause at DFARS 252.227-7013. This
* notice must appear in all copies of this file and its derivatives.
*
* $Id$
*/
#ifndef __COVERHD_h
#define __COVERHD_h
#ifdef __cplusplus
extern "C" {
#endif
#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 0
#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 0
#define CALLING_OVERHEAD_TASK_CREATE 0
#define CALLING_OVERHEAD_TASK_IDENT 0
#define CALLING_OVERHEAD_TASK_START 0
#define CALLING_OVERHEAD_TASK_RESTART 0
#define CALLING_OVERHEAD_TASK_DELETE 0
#define CALLING_OVERHEAD_TASK_SUSPEND 0
#define CALLING_OVERHEAD_TASK_RESUME 0
#define CALLING_OVERHEAD_TASK_SET_PRIORITY 0
#define CALLING_OVERHEAD_TASK_MODE 0
#define CALLING_OVERHEAD_TASK_GET_NOTE 0
#define CALLING_OVERHEAD_TASK_SET_NOTE 0
#define CALLING_OVERHEAD_TASK_WAKE_WHEN 0
#define CALLING_OVERHEAD_TASK_WAKE_AFTER 0
#define CALLING_OVERHEAD_INTERRUPT_CATCH 0
#define CALLING_OVERHEAD_CLOCK_GET 0
#define CALLING_OVERHEAD_CLOCK_SET 0
#define CALLING_OVERHEAD_CLOCK_TICK 0
#define CALLING_OVERHEAD_TIMER_CREATE 0
#define CALLING_OVERHEAD_TIMER_IDENT 0
#define CALLING_OVERHEAD_TIMER_DELETE 0
#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 0
#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 0
#define CALLING_OVERHEAD_TIMER_RESET 0
#define CALLING_OVERHEAD_TIMER_CANCEL 0
#define CALLING_OVERHEAD_SEMAPHORE_CREATE 0
#define CALLING_OVERHEAD_SEMAPHORE_IDENT 0
#define CALLING_OVERHEAD_SEMAPHORE_DELETE 0
#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 0
#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 0
#define CALLING_OVERHEAD_EVENT_SEND 0
#define CALLING_OVERHEAD_EVENT_RECEIVE 0
#define CALLING_OVERHEAD_SIGNAL_CATCH 0
#define CALLING_OVERHEAD_SIGNAL_SEND 0
#define CALLING_OVERHEAD_PARTITION_CREATE 0
#define CALLING_OVERHEAD_PARTITION_IDENT 0
#define CALLING_OVERHEAD_PARTITION_DELETE 0
#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 0
#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 0
#define CALLING_OVERHEAD_REGION_CREATE 0
#define CALLING_OVERHEAD_REGION_IDENT 0
#define CALLING_OVERHEAD_REGION_DELETE 0
#define CALLING_OVERHEAD_REGION_GET_SEGMENT 0
#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 0
#define CALLING_OVERHEAD_PORT_CREATE 0
#define CALLING_OVERHEAD_PORT_IDENT 0
#define CALLING_OVERHEAD_PORT_DELETE 0
#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0
#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0
#define CALLING_OVERHEAD_IO_INITIALIZE 0
#define CALLING_OVERHEAD_IO_OPEN 0
#define CALLING_OVERHEAD_IO_CLOSE 0
#define CALLING_OVERHEAD_IO_READ 0
#define CALLING_OVERHEAD_IO_WRITE 0
#define CALLING_OVERHEAD_IO_CONTROL 0
#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 0
#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 0
#ifdef __cplusplus
}
#endif
#endif
/* end of include file */

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/* Shm_Convert_address
*
* No address range conversion is required.
*
* Input parameters:
* address - address to convert
*
* Output parameters:
* returns - converted address
*
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
* On-Line Applications Research Corporation (OAR).
* All rights assigned to U.S. Government, 1994.
*
* This material may be reproduced by or for the U.S. Government pursuant
* to the copyright license under the clause at DFARS 252.227-7013. This
* notice must appear in all copies of this file and its derivatives.
*
* $Id$
*/
#include <rtems.h>
#include <bsp.h>
#include <shm.h>
#ifndef lint
static char _sccsid[] = "@(#)addrconv.c 04/08/96 1.1\n";
#endif
void *Shm_Convert_address(
void *address
)
{
return ( address );
}

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/* void Shm_Get_configuration( localnode, &shmcfg )
*
* This routine initializes, if necessary, and returns a pointer
* to the Shared Memory Configuration Table for the XXX target.
*
* INPUT PARAMETERS:
* localnode - local node number
* shmcfg - address of pointer to SHM Config Table
*
* OUTPUT PARAMETERS:
* *shmcfg - pointer to SHM Config Table
*
XXX: FIX THE COMMENTS BELOW WHEN THE CPU IS KNOWN
* NOTES: The XYZ does not have an interprocessor interrupt.
*
* The following table illustrates the configuration limitations:
*
* BUS MAX
* MODE ENDIAN NODES
* ========= ====== =======
* POLLED BIG 2+
* INTERRUPT **** NOT SUPPORTED ****
*
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
* On-Line Applications Research Corporation (OAR).
* All rights assigned to U.S. Government, 1994.
*
* This material may be reproduced by or for the U.S. Government pursuant
* to the copyright license under the clause at DFARS 252.227-7013. This
* notice must appear in all copies of this file and its derivatives.
*
* $Id$
*/
#include <rtems.h>
#include <bsp.h>
#include <shm.h>
#ifndef lint
static char _sccsid[] = "@(#)getcfg.c 04/08/96 1.1\n";
#endif
/*
* configured if currently polling of interrupt driven
*/
#define INTERRUPT 0 /* XXX: */
#define POLLING 1 /* XXX: fix me -- is polling ONLY!!! */
shm_config_table BSP_shm_cfgtbl;
void Shm_Get_configuration(
rtems_unsigned32 localnode,
shm_config_table **shmcfg
)
{
BSP_shm_cfgtbl.base = 0x0;
BSP_shm_cfgtbl.length = 1 * MEGABYTE;
BSP_shm_cfgtbl.format = SHM_BIG;
/*
* Override cause_intr or shm_isr if your target has
* special requirements.
*/
BSP_shm_cfgtbl.cause_intr = Shm_Cause_interrupt;
#ifdef NEUTRAL_BIG
BSP_shm_cfgtbl.convert = NULL_CONVERT;
#else
BSP_shm_cfgtbl.convert = CPU_swap_u32;
#endif
BSP_shm_cfgtbl.poll_intr = POLLED_MODE;
BSP_shm_cfgtbl.Intr.address = NO_INTERRUPT;
BSP_shm_cfgtbl.Intr.value = NO_INTERRUPT;
BSP_shm_cfgtbl.Intr.length = NO_INTERRUPT;
*shmcfg = &BSP_shm_cfgtbl;
}

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@@ -0,0 +1,90 @@
/* Shared Memory Lock Routines
*
* This shared memory locked queue support routine need to be
* able to lock the specified locked queue. Interrupts are
* disabled while the queue is locked to prevent preemption
* and deadlock when two tasks poll for the same lock.
* previous level.
*
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
* On-Line Applications Research Corporation (OAR).
* All rights assigned to U.S. Government, 1994.
*
* This material may be reproduced by or for the U.S. Government pursuant
* to the copyright license under the clause at DFARS 252.227-7013. This
* notice must appear in all copies of this file and its derivatives.
*
* $Id$
*/
#include <rtems.h>
#include <bsp.h>
#include <shm.h>
#ifndef lint
static char _sccsid[] = "@(#)lock.c 04/08/96 1.1\n";
#endif
/*
* Shm_Initialize_lock
*
* Initialize the lock for the specified locked queue.
*/
void Shm_Initialize_lock(
Shm_Locked_queue_Control *lq_cb
)
{
lq_cb->lock = LQ_UNLOCKED;
}
/* void _Shm_Lock( &lq_cb )
*
* This shared memory locked queue support routine locks the
* specified locked queue. It disables interrupts to prevent
* a deadlock condition.
*/
void Shm_Lock(
Shm_Locked_queue_Control *lq_cb
)
{
rtems_unsigned32 isr_level;
rtems_unsigned32 *lockptr = &lq_cb->lock;
rtems_unsigned32 lock_value;
lock_value = 0x80000000;
rtems_interrupt_disable( isr_level );
Shm_isrstat = isr_level;
while ( lock_value ) {
asm volatile( ""
: "=r" (lockptr), "=r" (lock_value)
: "0" (lockptr), "1" (lock_value)
);
/*
* If not available, then may want to delay to reduce load on lock.
*/
if ( lock_value )
delay( 10 ); /* approximately 10 microseconds */
}
}
/*
* Shm_Unlock
*
* Unlock the lock for the specified locked queue.
*/
void Shm_Unlock(
Shm_Locked_queue_Control *lq_cb
)
{
rtems_unsigned32 isr_level;
lq_cb->lock = SHM_UNLOCK_VALUE;
isr_level = Shm_isrstat;
rtems_interrupt_enable( isr_level );
}

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@@ -0,0 +1,51 @@
/* Shm_isr_nobsp()
*
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
* On-Line Applications Research Corporation (OAR).
* All rights assigned to U.S. Government, 1994.
*
* This material may be reproduced by or for the U.S. Government pursuant
* to the copyright license under the clause at DFARS 252.227-7013. This
* notice must appear in all copies of this file and its derivatives.
*
* $Id$
*/
#include <rtems.h>
#include <bsp.h>
#include <shm.h>
#ifndef lint
static char _sccsid[] = "@(#)mpisr.c 04/08/96 1.1\n";
#endif
rtems_isr Shm_isr_nobsp( void )
{
/*
* If this routine has to do anything other than the mpisr.c
* found in the generic driver, then copy the contents of the generic
* mpisr.c and augment it to satisfy this particular board. Typically,
* you need to have a board specific mpisr.c when the interrupt
* must be cleared.
*
* If the generic mpisr.c satisifies your requirements, then
* remove this routine from your target's shmsupp/mpisb.c file.
* Then simply install the generic Shm_isr in the Shm_setvec
* routine below.
*/
}
/* Shm_setvec
*
* This driver routine sets the SHM interrupt vector to point to the
* driver's SHM interrupt service routine.
*
* Input parameters: NONE
*
* Output parameters: NONE
*/
void Shm_setvec( void )
{
/* XXX: FIX ME!!! */
}

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@@ -0,0 +1,30 @@
/* bsp_cleanup()
*
* This routine normally is part of start.s and usually returns
* control to a monitor.
*
* INPUT: NONE
*
* OUTPUT: NONE
*
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
* On-Line Applications Research Corporation (OAR).
* All rights assigned to U.S. Government, 1994.
*
* This material may be reproduced by or for the U.S. Government pursuant
* to the copyright license under the clause at DFARS 252.227-7013. This
* notice must appear in all copies of this file and its derivatives.
*
* $Id$
*/
#include <rtems.h>
#include <bsp.h>
#ifndef lint
static char _sccsid[] = "@(#)bspclean.c 04/08/96 1.1\n";
#endif
void bsp_cleanup( void )
{
}

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@@ -0,0 +1,293 @@
/* bsp_start()
*
* This routine starts the application. It includes application,
* board, and monitor specific initialization and configuration.
* The generic CPU dependent initialization has been performed
* before this routine is invoked.
*
* INPUT: NONE
*
* OUTPUT: NONE
*
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
* On-Line Applications Research Corporation (OAR).
* All rights assigned to U.S. Government, 1994.
*
* This material may be reproduced by or for the U.S. Government pursuant
* to the copyright license under the clause at DFARS 252.227-7013. This
* notice must appear in all copies of this file and its derivatives.
*
* $Id$
*/
#include <bsp.h>
#include <rtems/libio.h>
#include <libcsupport.h>
#include <string.h>
#include <fcntl.h>
#ifdef STACK_CHECKER_ON
#include <stackchk.h>
#endif
#ifndef lint
static char _sccsid[] = "@(#)bspstart.c 09/11/96 1.15\n";
#endif
/*
* The original table from the application and our copy of it with
* some changes.
*/
extern rtems_configuration_table Configuration;
rtems_configuration_table BSP_Configuration;
rtems_cpu_table Cpu_table;
char *rtems_progname;
/* Initialize whatever libc we are using
* called from postdriver hook
*/
#define HEAP_BLOCK_SIZE (16 * 1024)
rtems_unsigned32 heap_size = 0;
rtems_unsigned32 heap_start;
void bsp_libc_init()
{
heap_size = 2 * 1024 * 1024; /* allocate a maximum of 2 megabytes for the heap */
/* allocate all remaining memory to the heap */
do {
heap_size -= HEAP_BLOCK_SIZE;
heap_start = _sysalloc( heap_size );
} while ( !heap_start );
if (!heap_start)
rtems_fatal_error_occurred( heap_size );
if (heap_start & (CPU_ALIGNMENT-1))
heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
/*
* The last parameter to RTEMS_Malloc_Initialize is the "chunk"
* size which a multiple of will be requested on each sbrk()
* call by malloc(). A value of 0 indicates that sbrk() should
* not be called to extend the heap.
*/
RTEMS_Malloc_Initialize((void *) heap_start, heap_size, 0);
/*
* Init the RTEMS libio facility to provide UNIX-like system
* calls for use by newlib (ie: provide __open, __close, etc)
* Uses malloc() to get area for the iops, so must be after malloc init
*/
rtems_libio_init();
/*
* Set up for the libc handling.
*/
if (BSP_Configuration.ticks_per_timeslice > 0)
libc_init(1); /* reentrant if possible */
else
libc_init(0); /* non-reentrant */
}
/*
* Function: bsp_pretasking_hook
* Created: 95/03/10
*
* Description:
* BSP pretasking hook. Called just before drivers are initialized.
* Used to setup libc and install any BSP extensions.
*
* NOTES:
* Must not use libc (to do io) from here, since drivers are
* not yet initialized.
*
*/
void
bsp_pretasking_hook(void)
{
bsp_libc_init();
#ifdef STACK_CHECKER_ON
/*
* Initialize the stack bounds checker
* We can either turn it on here or from the app.
*/
Stack_check_Initialize();
#endif
#ifdef RTEMS_DEBUG
rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
#endif
}
/*
* After drivers are setup, register some "filenames"
* and open stdin, stdout, stderr files
*
* Newlib will automatically associate the files with these
* (it hardcodes the numbers)
*/
void
bsp_postdriver_hook(void)
{
int stdin_fd, stdout_fd, stderr_fd;
int error_code;
error_code = 'S' << 24 | 'T' << 16;
if ((stdin_fd = __open("/dev/console", O_RDONLY, 0)) == -1)
rtems_fatal_error_occurred( error_code | 'D' << 8 | '0' );
if ((stdout_fd = __open("/dev/console", O_WRONLY, 0)) == -1)
rtems_fatal_error_occurred( error_code | 'D' << 8 | '1' );
if ((stderr_fd = __open("/dev/console", O_WRONLY, 0)) == -1)
rtems_fatal_error_occurred( error_code | 'D' << 8 | '2' );
if ((stdin_fd != 0) || (stdout_fd != 1) || (stderr_fd != 2))
rtems_fatal_error_occurred( error_code | 'I' << 8 | 'O' );
printf("allocated %d heap size, %d work space size\n",
heap_size, BSP_Configuration.work_space_size);
printf(" work space start 0x%x\n",(unsigned int)BSP_Configuration.work_space_start);
}
int bsp_start(
int argc,
char **argv,
char **environp
)
{
if ((argc > 0) && argv && argv[0])
rtems_progname = argv[0];
else
rtems_progname = "RTEMS";
/* set the PIA0 register wait states */
*(volatile unsigned32 *)0x80000020 = 0x04080000;
/*
* Allocate the memory for the RTEMS Work Space. This can come from
* a variety of places: hard coded address, malloc'ed from outside
* RTEMS world (e.g. simulator or primitive memory manager), or (as
* typically done by stock BSPs) by subtracting the required amount
* of work space from the last physical address on the CPU board.
*/
/*
* Copy the Configuration Table .. so we can change it
*/
BSP_Configuration = Configuration;
/*
* Add 1 region for the RTEMS Malloc
*/
BSP_Configuration.RTEMS_api_configuration->maximum_regions++;
/*
* Add 1 extension for newlib libc
*/
#ifdef RTEMS_NEWLIB
BSP_Configuration.maximum_extensions++;
#endif
/*
* Add 1 extension for newlib libc
*/
#ifdef RTEMS_NEWLIB
BSP_Configuration.maximum_extensions++;
#endif
#ifdef STACK_CHECKER_ON
/*
* Add 1 extension for stack checker
*/
BSP_Configuration.maximum_extensions++;
#endif
/*
* Tell libio how many fd's we want and allow it to tweak config
*/
rtems_libio_config(&BSP_Configuration, BSP_LIBIO_MAX_FDS);
/*
* Need to "allocate" the memory for the RTEMS Workspace and
* tell the RTEMS configuration where it is. This memory is
* not malloc'ed. It is just "pulled from the air".
*/
BSP_Configuration.work_space_start = _sysalloc( BSP_Configuration.work_space_size + 512 );
if (!BSP_Configuration.work_space_start)
rtems_fatal_error_occurred( BSP_Configuration.work_space_size );
BSP_Configuration.work_space_start = (void *) ((unsigned int)((char *)BSP_Configuration.work_space_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1));
/*
* initialize the CPU table for this BSP
*/
/*
* we do not use the pretasking_hook
*/
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
Cpu_table.predriver_hook = NULL;
Cpu_table.postdriver_hook = bsp_postdriver_hook;
Cpu_table.idle_task = NULL; /* do not override system IDLE task */
Cpu_table.do_zero_of_workspace = TRUE;
Cpu_table.interrupt_stack_size = 4096;
Cpu_table.extra_system_initialization_stack = 0;
/*
* Don't forget the other CPU Table entries.
*/
_settrap( 109,&a29k_enable_sup);
_settrap( 110,&a29k_disable_sup);
_settrap( 111,&a29k_enable_all_sup);
_settrap( 112,&a29k_disable_all_sup);
_settrap( 106,&a29k_context_switch_sup);
_settrap( 107,&a29k_context_restore_sup);
_settrap( 108,&a29k_context_save_sup);
_settrap( 105,&a29k_sigdfl_sup);
/*
* Start RTEMS
*/
rtems_initialize_executive( &BSP_Configuration, &Cpu_table );
bsp_cleanup();
return 0;
}

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@@ -0,0 +1,96 @@
/*
* glue.c -- all the code to make GCC and the libraries run on
* a target board running RTEMS. These should work with
* any target which conforms to the RTEMS BSP.
*
* $Id$
*/
#ifndef lint
static char _sccsid[] = "@(#)iface.c 04/12/96 1.1\n";
#endif
#include <sys/types.h>
#include <sys/stat.h>
#include <errno.h>
int
read(int fd,
char *buf,
int nbytes)
{
return __read(fd, buf, nbytes);
}
int
write(int fd,
char *buf,
int nbytes)
{
return __write(fd, buf, nbytes);
}
int
open(char *buf,
int flags,
int mode)
{
return __open(buf, flags, mode);
}
int
close(int fd)
{
return __close(fd);
}
/*
* isatty -- returns 1 if connected to a terminal device,
* returns 0 if not.
*/
int
isatty(int fd)
{
return __isatty(fd);
}
/*
* lseek -- move read/write pointer. Since a serial port
* is non-seekable, we return an error.
*/
off_t
lseek(int fd,
off_t offset,
int whence)
{
return __lseek(fd, offset, whence);
}
/*
* fstat -- get status of a file. Since we have no file
* system, we just return an error.
*/
int
fstat(int fd,
struct stat *buf)
{
return __fstat(fd, buf);
}
int
getpid()
{
return __getpid();
}
/*
* kill -- go out via exit...
*/
int
kill(int pid,
int sig)
{
return __kill(pid, sig);
}

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@@ -0,0 +1,39 @@
/* main()
*
* This is the entry point for the application. It calls
* the bsp_start routine to the actual dirty work.
*
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
* On-Line Applications Research Corporation (OAR).
* All rights assigned to U.S. Government, 1994.
*
* This material may be reproduced by or for the U.S. Government pursuant
* to the copyright license under the clause at DFARS 252.227-7013. This
* notice must appear in all copies of this file and its derivatives.
*
* $Id$
*/
#include <rtems.h>
#include <bsp.h>
#ifndef lint
static char _sccsid[] = "@(#)main.c 06/30/96 1.2\n";
#endif
int main(
int argc,
char **argv,
char **environp
)
{
bsp_start( argc, argv, environp );
/*
* May be able to return to the "crt/start.s" code but also
* may not be able to. Do something here which is board dependent.
*/
_exit(0);
rtems_fatal_error_occurred( 0 );
}

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@@ -0,0 +1,11 @@
;@(#)ez030.cmd 1.1 93/04/06 20:00:10, Copyright 1993 AMD.
;Linker command file header for EZ-030 evaluation board.
;Usage: ld29 -c .../29k/lib/ez030.cmd -o ...
; -or-
; hc29 -cmdez030.cmd ...
;
; $Id$
;
ALIGN .text=8192
ALIGN .data=8192
ORDER .text=0x40005000,!text,!data,!lit,!bss

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@@ -0,0 +1,146 @@
;
; $Id$
;
;#{
;# SCCS INFORMATION:
;# SID = @(#)sa29200.lnk 4.1; DLU=95/09/14-11:05:57
;# Q = @(#) Copyright (C) 1995 Advanced Micro Devices, Inc.
;# Module Type = @(#) OSBOOT/DBG_CORE absolute liker file (AMD-EPD-29K, AMIR)
;# SCCS Path = %P\%
;# SCCS File = %F\%
;# FileName = sa29200.lnk
;# SCCS ID = 4.1
;# Date Update = 14 Sep 1995, (DLU=95/09/14-11:05:57)
;# Date Extract = 12 Oct 1995, (DLE=95/10/12-16:27:31)
;#}
; @(#)sa29200.lnk 3.6 94/08/22 11:58:54, Srini, AMD.
; This is the linker command file used to bind the inrementally linked
; osboot.o module to a memory map. This also defines some link-time constants
; used in the code. These constants are genral for all 29K family members.
; You only need to customize, if necessary, the definitions that affect
; your target processor, and leave the rest alone.
; The default values in this file are for binding osboot.o for use with
; SA29200 stand-alone board with the -29200/-29205 option.
;
; Order the code segments according to the memory map structure.
; The defaul OSBOOT has only .text and .bss sections. You need to ORDER
; other sections of your applications that are not included below.
; We use separate ORDER statements below to distinguish the two memory
; regions used. The text section is bound to ROM memory region, and the
; data region to RAM memory space.
; MAKE SURE to order the BSS section at the very end. This is because the
; BSS section size could get adjusted after linking with raminit.o (produced
; by romcoff utility) or other initialization routines. This change in size
; could affect the offsets used by the program to refer to the remaining data
; sections that follow BSS.
ALIGN ProcInit=16
ORDER Reset=0x0
ORDER ProcInit,OsbText,.text,!text
ORDER .lit,!lit
ORDER vectable=0x40000000
ORDER msg_data=0x40000400
ORDER .data,!data
ORDER OsbBss,dbg_030,dbg_bss,cfg_bss,.bss,!bss
ORDER HeapBase
ORDER .comment
; For Stand-Alone application out of ROM use the ORDER statements below:
; For Stand-Alone application out of RAM use the ORDER statement below:
;ORDER Reset=0x40010000,ProcInit,OsbText,.text,!text,.lit,!lit,.data,!data,msg_data,dbg_dat,.bss,!bss,HeapBase,.comment
;
; definitions of link time constants used in code.
;
; Definition of the initial value of CPS register.
; The value below is for an Am29200 processor. It sets TU, SM,DI, DA,IM fields
; bits in the register. You may modify it to suit your target environment.
; Like, changing the IM field for instance. IM is 0x11 by default enabling
; all INTR[0-3] lines.
;public _init_CPS=0x87F
public _init_CPS=0x20813
;public _init_CPS=0x2081F
;public _init_CPS=0x081F
; Define the memory map in general values. The code - except for simulators -
; configures the external RAM at run-time and updates the DMemSize value.
; DMemStart and DMemSize are the most important values below. DMemStart is
; used to initialize the vector base address register (VAB). And DMemSize
; is used to find the highest addressable data memory to place the register
; and memory stacks. Remember, DMemSize is configured at run-time for hardware
; targets and updated.
public VectorBaseAddress=0x40000000
public IMemStart=0x0000000
public IMemSize=0xfffff
public DMemStart=0x40000000
#public DMemStart=0x100000
public DMemSize=0xfffff
#public DMemSize=0x17ffff
#public DMemSize=0x3fffffff
public RMemStart=0x0
public RMemSize=0xfffff
public EnableDRAMSizing=1
;
; For the 29K Microcontrollers, you need to define the ROM Control register
; value (RMCT_VALUE), the ROM Configuration register value (RMCF_VALUE), and
; the DRAM Control register value (DRCT_VALUE) based on DMemSize specified
; above. This could be overwritten in software targets such as the simulator.
; ROM and RAM Control registers. ROM COnfiguration. (not valid for Am2900X,
; Am29050, and Am2903X processors)
; The DRAM REFRATE value (in DRCT) must be specified here. To disable
; DRAM refreshing (on a system with no DRAM), set REFRATE field in DRCT
; to zero. Otherwise, set it to the desired frequency. The default is 0xFF
; The default values in this file are for Am2920X processors.
;public RMCT_VALUE=0x03030303
;public DRCT_VALUE=0x888800FF
;public RMCF_VALUE=0x00f8f8f8
;
public RMCT_VALUE=0x4a424300
public DRCT_VALUE=0xccc000f0
public RMCF_VALUE=0x011121ff
;
;
; Execute trap handlers from ROM? If your trap handlers are in ROM space,
; then set _TRAPINROM to TWO (0x2). It is used to modify the tarp vector
; address installed to set the R bit when fetched. If the trap handlers in
; ROM or if there is no ROM-space (no RE bit in CPS), set _TRAPINROM to ZERO.
; The default in this file is for SA29200 board and _TRAPINROM is set to ZERO.
public _TRAPINROM=0
;
; Define the processor clock frequencies. These values are used by the HIF
; kernel to provide some HIF services.
public TicksPerMillisecond=16000
public ClockFrequency=16000000
;
; There are some C functions which are not leaf functions. However, they are
; no expected to spill or fill registers. We ensure that by setting up a
; pseudo register stack before calling those functions. The code generated
; for those functions however do have the prologue and epilogue which refer
; to the symbols V_SPILL and V_FILL. The linker does not know about these
; symbols. So we define it here so that it does not complain.
; If you use the hc29 compiler driver to link the objects it will warn that
; the definitions here are already internally defined. You
; can use hc29 with -nocrt0 option to do the linking for linear memory spaces.
; public V_SPILL=64
; public V_FILL=65
;
; Set the UART debug/monitor port serial communications baud rate.
;
public UCLK=32000000
; INITBAUD defines the cold start baud rate. This is the baud rate
; the monitor would use when powered up. This can be overridden by
; defining BAUDRATE on the assembler/compiler command line.
public INITBAUD=9600
;
; Is there a SCC 8530 on the target?
; If there is an 8530 SC on target, define the symbols below appropriately.
; The routines in scc8530.s use these values to access the registers of
; SCC and program it. The default values are for EZ030 target.
; Baudrate can be specified on the command-line to override the default
; baud rate defined in scc8530.s.
; scc channel A control
;public SCC8530_CHA_CONTROL=0xC0000007
; scc channel B control
;public SCC8530_CHB_CONTROL=0xC0000003
; scc channel A data
;public SCC8530_CHA_DATA=0xC000000F
; scc channel B data
;public SCC8530_CHB_DATA=0xC000000B
; scc baud clock generator
;public SCC8530_BAUD_CLK_ENBL=3

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@@ -0,0 +1,49 @@
/* set_vector
*
* This routine installs an interrupt vector on the target Board/CPU.
* This routine is allowed to be as board dependent as necessary.
*
* INPUT:
* handler - interrupt handler entry point
* vector - vector number
* type - 0 indicates raw hardware connect
* 1 indicates RTEMS interrupt connect
*
* RETURNS:
* address of previous interrupt handler
*
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
* On-Line Applications Research Corporation (OAR).
* All rights assigned to U.S. Government, 1994.
*
* This material may be reproduced by or for the U.S. Government pursuant
* to the copyright license under the clause at DFARS 252.227-7013. This
* notice must appear in all copies of this file and its derivatives.
*
* $Id$
*/
#include <rtems.h>
#include <bsp.h>
#ifndef lint
static char _sccsid[] = "@(#)setvec.c 06/30/96 1.2\n";
#endif
no_cpu_isr_entry set_vector( /* returns old vector */
rtems_isr_entry handler, /* isr routine */
rtems_vector_number vector, /* vector number */
int type /* RTEMS or RAW intr */
)
{
no_cpu_isr_entry previous_isr;
if ( type )
rtems_interrupt_catch( handler, vector, (rtems_isr_entry *) &previous_isr );
else {
/* XXX: install non-RTEMS ISR as "raw" interupt */
_settrap( vector, handler );
}
return previous_isr;
}

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@@ -0,0 +1,195 @@
#
# Timing Test Suite Results for the NO_BSP
#
# NOTE: This is just a template. The times are irrelevant since this BSP
# can only be compiled -- not executed.
#
# $Id$
#
Board:
CPU: include coprocessor if applicable
Clock Speed:
Memory Configuration: SRAM, DRAM, cache, etc
Wait States:
Times Reported in: cycles, microseconds, etc
Timer Source: Count Down Timer, on-CPU cycle counter, etc
Column X:
Column Y:
# DESCRIPTION A B
== ================================================================= ==== ====
1 rtems_semaphore_create 20
rtems_semaphore_delete 21
rtems_semaphore_obtain: available 15
rtems_semaphore_obtain: not available -- NO_WAIT 15
rtems_semaphore_release: no waiting tasks 16
2 rtems_semaphore_obtain: not available -- caller blocks 62
3 rtems_semaphore_release: task readied -- preempts caller 55
4 rtems_task_restart: blocked task -- preempts caller 77
rtems_task_restart: ready task -- preempts caller 70
rtems_semaphore_release: task readied -- returns to caller 25
rtems_task_create 57
rtems_task_start 31
rtems_task_restart: suspended task -- returns to caller 36
rtems_task_delete: suspended task 47
rtems_task_restart: ready task -- returns to caller 37
rtems_task_restart: blocked task -- returns to caller 46
rtems_task_delete: blocked task 50
5 rtems_task_suspend: calling task 51
rtems_task_resume: task readied -- preempts caller 49
6 rtems_task_restart: calling task 59
rtems_task_suspend: returns to caller 18
rtems_task_resume: task readied -- returns to caller 19
rtems_task_delete: ready task 50
7 rtems_task_restart: suspended task -- preempts caller 70
8 rtems_task_set_priority: obtain current priority 12
rtems_task_set_priority: returns to caller 27
rtems_task_mode: obtain current mode 5
rtems_task_mode: no reschedule 5
rtems_task_mode: reschedule -- returns to caller 8
rtems_task_mode: reschedule -- preempts caller 39
rtems_task_set_note 13
rtems_task_get_note 13
rtems_clock_set 33
rtems_clock_get 3
9 rtems_message_queue_create 110
rtems_message_queue_send: no waiting tasks 37
rtems_message_queue_urgent: no waiting tasks 37
rtems_message_queue_receive: available 31
rtems_message_queue_flush: no messages flushed 12
rtems_message_queue_flush: messages flushed 16
rtems_message_queue_delete 26
10 rtems_message_queue_receive: not available -- NO_WAIT 15
rtems_message_queue_receive: not available -- caller blocks 62
11 rtems_message_queue_send: task readied -- preempts caller 72
12 rtems_message_queue_send: task readied -- returns to caller 39
13 rtems_message_queue_urgent: task readied -- preempts caller 72
14 rtems_message_queue_urgent: task readied -- returns to caller 39
15 rtems_event_receive: obtain current events 1
rtems_event_receive: not available -- NO_WAIT 12
rtems_event_receive: not available -- caller blocks 56
rtems_event_send: no task readied 12
rtems_event_receive: available 12
rtems_event_send: task readied -- returns to caller 24
16 rtems_event_send: task readied -- preempts caller 55
17 rtems_task_set_priority: preempts caller 62
18 rtems_task_delete: calling task 83
19 rtems_signal_catch 9
rtems_signal_send: returns to caller 15
rtems_signal_send: signal to self 18
exit ASR overhead: returns to calling task 22
exit ASR overhead: returns to preempting task 49
20 rtems_partition_create 35
rtems_region_create 23
rtems_partition_get_buffer: available 15
rtems_partition_get_buffer: not available 13
rtems_partition_return_buffer 18
rtems_partition_delete 16
rtems_region_get_segment: available 22
rtems_region_get_segment: not available -- NO_WAIT 21
rtems_region_return_segment: no waiting tasks 19
rtems_region_get_segment: not available -- caller blocks 64
rtems_region_return_segment: task readied -- preempts caller 74
rtems_region_return_segment: task readied -- returns to caller 44
rtems_region_delete 16
rtems_io_initialize 2
rtems_io_open 1
rtems_io_close 1
rtems_io_read 1
rtems_io_write 1
rtems_io_control 1
21 rtems_task_ident 149
rtems_message_queue_ident 145
rtems_semaphore_ident 156
rtems_partition_ident 145
rtems_region_ident 148
rtems_port_ident 145
rtems_timer_ident 145
rtems_rate_monotonic_ident 145
22 rtems_message_queue_broadcast: task readied -- returns to caller 42
rtems_message_queue_broadcast: no waiting tasks 17
rtems_message_queue_broadcast: task readied -- preempts caller 78
23 rtems_timer_create 14
rtems_timer_fire_after: inactive 22
rtems_timer_fire_after: active 24
rtems_timer_cancel: active 15
rtems_timer_cancel: inactive 13
rtems_timer_reset: inactive 21
rtems_timer_reset: active 23
rtems_timer_fire_when: inactive 34
rtems_timer_fire_when: active 34
rtems_timer_delete: active 19
rtems_timer_delete: inactive 17
rtems_task_wake_when 69
24 rtems_task_wake_after: yield -- returns to caller 9
rtems_task_wake_after: yields -- preempts caller 45
25 rtems_clock_tick 4
26 _ISR_Disable 0
_ISR_Flash 1
_ISR_Enable 1
_Thread_Disable_dispatch 0
_Thread_Enable_dispatch 7
_Thread_Set_state 11
_Thread_Disptach (NO FP) 31
context switch: no floating point contexts 21
context switch: self 10
context switch: to another task 10
context switch: restore 1st FP task 25
fp context switch: save idle, restore idle 31
fp context switch: save idle, restore initialized 19
fp context switch: save initialized, restore initialized 20
_Thread_Resume 7
_Thread_Unblock 7
_Thread_Ready 9
_Thread_Get 4
_Semaphore_Get 2
_Thread_Get: invalid id 0
27 interrupt entry overhead: returns to interrupted task 6
interrupt exit overhead: returns to interrupted task 6
interrupt entry overhead: returns to nested interrupt 6
interrupt exit overhead: returns to nested interrupt 5
interrupt entry overhead: returns to preempting task 7
interrupt exit overhead: returns to preempting task 36
28 rtems_port_create 16
rtems_port_external_to_internal 11
rtems_port_internal_to_external 11
rtems_port_delete 16
29 rtems_rate_monotonic_create 15
rtems_rate_monotonic_period: initiate period -- returns to caller 21
rtems_rate_monotonic_period: obtain status 13
rtems_rate_monotonic_cancel 16
rtems_rate_monotonic_delete: inactive 18
rtems_rate_monotonic_delete: active 20
rtems_rate_monotonic_period: conclude periods -- caller blocks 53