forked from Imagelibrary/rtems
bsp/tms570: source changes reflecting new headers.
Signed-off-by: Premysl Houdek <kom541000@gmail.com>
This commit is contained in:
Premysl Houdek
committed by
Joel Sherrill
Joel Sherrill
parent
602e395b4d
commit
069560a5f9
@@ -36,7 +36,7 @@ static struct timecounter tms570_rti_tc;
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static uint32_t tms570_rti_get_timecount(struct timecounter *tc)
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{
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return TMS570_RTI.RTIFRC0;
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return TMS570_RTI.CNT[0].FRCx;
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}
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#ifndef TMS570_PREFERRED_TC_FREQUENCY
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@@ -83,25 +83,25 @@ static void tms570_clock_driver_support_initialize_hardware( void )
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500000) / 1000000;
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/* Hardware specific initialize */
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TMS570_RTI.RTIGCTRL = 0;
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TMS570_RTI.RTICPUC0 = tc_prescaler - 1;
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TMS570_RTI.RTITBCTRL = 2;
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TMS570_RTI.RTICAPCTRL = 0;
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TMS570_RTI.RTICOMPCTRL = 0;
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TMS570_RTI.GCTRL = 0;
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TMS570_RTI.CNT[0].CPUCx = tc_prescaler - 1;
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TMS570_RTI.TBCTRL = 2;
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TMS570_RTI.CAPCTRL = 0;
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TMS570_RTI.COMPCTRL = 0;
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/* set counter to zero */
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TMS570_RTI.RTIUC0 = 0;
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TMS570_RTI.RTIFRC0 = 0;
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TMS570_RTI.CNT[0].UCx = 0;
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TMS570_RTI.CNT[0].FRCx = 0;
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/* clear interrupts*/
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TMS570_RTI.RTICLEARINTENA = 0x00070f0f;
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TMS570_RTI.RTIINTFLAG = 0x0007000f;
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TMS570_RTI.CLEARINTENA = 0x00070f0f;
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TMS570_RTI.INTFLAG = 0x0007000f;
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/* set timer */
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TMS570_RTI.RTICOMP0 = TMS570_RTI.RTIFRC0 + tc_increments_per_tick;
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TMS570_RTI.RTICOMP0CLR = TMS570_RTI.RTICOMP0 + tc_increments_per_tick / 2;
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TMS570_RTI.RTIUDCP0 = tc_increments_per_tick;
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TMS570_RTI.CMP[0].COMPx = TMS570_RTI.CNT[0].FRCx + tc_increments_per_tick;
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TMS570_RTI.COMP0CLR = TMS570_RTI.CMP[0].COMPx + tc_increments_per_tick / 2;
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TMS570_RTI.CMP[0].UDCPx = tc_increments_per_tick;
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/* enable interupt */
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TMS570_RTI.RTISETINTENA = 0x1;
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TMS570_RTI.SETINTENA = 0x1;
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/* enable timer */
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TMS570_RTI.RTIGCTRL = 1;
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TMS570_RTI.GCTRL = 1;
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/* set timecounter */
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tms570_rti_tc.tc_get_timecount = tms570_rti_get_timecount;
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tms570_rti_tc.tc_counter_mask = 0xffffffff;
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@@ -117,7 +117,7 @@ static void tms570_clock_driver_support_initialize_hardware( void )
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*/
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static void tms570_clock_driver_support_at_tick( void )
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{
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TMS570_RTI.RTIINTFLAG = 0x00000001;
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TMS570_RTI.INTFLAG = 0x00000001;
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}
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/**
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@@ -156,7 +156,7 @@ static void tms570_clock_driver_support_install_isr(
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static void tms570_clock_driver_support_shutdown_hardware( void )
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{
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/* turn off the timer interrupts */
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TMS570_RTI.RTICLEARINTENA = 0x20000;
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TMS570_RTI.CLEARINTENA = 0x20000;
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}
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#define Clock_driver_support_initialize_hardware \
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@@ -41,10 +41,10 @@ static void tms570_putc(char ch)
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rtems_interrupt_level level;
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rtems_interrupt_disable(level);
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while ( ( driver_context_table[0].regs->SCIFLR & 0x100 ) == 0) {
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while ( ( driver_context_table[0].regs->FLR & 0x100 ) == 0) {
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rtems_interrupt_flash(level);
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}
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driver_context_table[0].regs->SCITD = ch;
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driver_context_table[0].regs->TD = ch;
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rtems_interrupt_enable(level);
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}
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@@ -74,8 +74,8 @@ static void tms570_uart_output(char c)
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*/
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static int tms570_uart_input( void )
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{
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if ( driver_context_table[0].regs->SCIFLR & (1<<9) ) {
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return driver_context_table[0].regs->SCIRD;
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if ( driver_context_table[0].regs->FLR & (1<<9) ) {
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return driver_context_table[0].regs->RD;
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} else {
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return -1;
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}
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@@ -44,13 +44,16 @@ tms570_sci_context driver_context_table[] = {
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{
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.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("TMS570 SCI1"),
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.device_name = "/dev/console",
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.regs = &TMS570_SCI,
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/* TMS570 UART peripheral use subset of LIN registers which are equivalent
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* to SCI ones
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*/
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.regs = (volatile tms570_sci_t *) &TMS570_LIN,
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.irq = TMS570_IRQ_SCI_LEVEL_0,
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},
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{
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.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("TMS570 SCI2"),
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.device_name = "/dev/ttyS1",
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.regs = &TMS570_SCI2,
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.regs = &TMS570_SCI,
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.irq = TMS570_IRQ_SCI2_LEVEL_0,
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}
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};
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@@ -134,8 +137,8 @@ static int tms570_sci_read_received_chars(
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if ( N < 1 ) {
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return 0;
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}
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if ( ctx->regs->SCIRD != 0 ) {
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buf[0] = ctx->regs->SCIRD;
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if ( ctx->regs->RD != 0 ) {
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buf[0] = ctx->regs->RD;
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return 1;
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}
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return 0;
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@@ -152,7 +155,7 @@ static int tms570_sci_read_received_chars(
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*/
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static void tms570_sci_enable_interrupts(tms570_sci_context * ctx)
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{
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ctx->regs->SCISETINT = (1<<9);
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ctx->regs->SETINT = (1<<9);
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}
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/**
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@@ -166,7 +169,7 @@ static void tms570_sci_enable_interrupts(tms570_sci_context * ctx)
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*/
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static void tms570_sci_disable_interrupts(tms570_sci_context * ctx)
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{
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ctx->regs->SCICLEARINT = (1<<9);
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ctx->regs->CLEARINT = (1<<9);
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}
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/**
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@@ -213,29 +216,29 @@ static bool tms570_sci_set_attributes(
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rtems_termios_device_lock_acquire(base, &lock_context);
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ctx->regs->SCIGCR1 &= ~( (1<<7) | (1<<25) | (1<<24) );
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ctx->regs->GCR1 &= ~( (1<<7) | (1<<25) | (1<<24) );
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ctx->regs->SCIGCR1 &= ~(1<<4); /*one stop bit*/
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ctx->regs->SCIFORMAT = 0x7;
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ctx->regs->GCR1 &= ~(1<<4); /*one stop bit*/
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ctx->regs->FORMAT = 0x7;
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switch ( t->c_cflag & ( PARENB|PARODD ) ) {
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case ( PARENB|PARODD ):
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/* Odd parity */
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ctx->regs->SCIGCR1 &= ~(1<<3);
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ctx->regs->SCIGCR1 |= (1<<2);
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ctx->regs->GCR1 &= ~(1<<3);
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ctx->regs->GCR1 |= (1<<2);
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break;
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case PARENB:
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/* Even parity */
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ctx->regs->SCIGCR1 |= (1<<3);
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ctx->regs->SCIGCR1 |= (1<<2);
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ctx->regs->GCR1 |= (1<<3);
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ctx->regs->GCR1 |= (1<<2);
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break;
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default:
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case 0:
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case PARODD:
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/* No Parity */
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ctx->regs->SCIGCR1 &= ~(1<<2);
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ctx->regs->GCR1 &= ~(1<<2);
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}
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/* Baud rate */
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@@ -244,7 +247,7 @@ static bool tms570_sci_set_attributes(
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bauddiv = (BSP_PLL_OUT_CLOCK + baudrate / 2) / baudrate;
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ctx->regs->BRS = bauddiv;
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ctx->regs->SCIGCR1 |= (1<<7) | (1<<25) | (1<<24);
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ctx->regs->GCR1 |= (1<<7) | (1<<25) | (1<<24);
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rtems_termios_device_lock_release(base, &lock_context);
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@@ -271,7 +274,7 @@ static void tms570_sci_interrupt_handler(void * arg)
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/*
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* Check if we have received something.
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*/
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if ( (ctx->regs->SCIFLR & (1<<9) ) == (1<<9) ) {
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if ( (ctx->regs->FLR & (1<<9) ) == (1<<9) ) {
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n = tms570_sci_read_received_chars(ctx, buf, TMS570_SCI_BUFFER_SIZE);
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if ( n > 0 ) {
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/* Hand the data over to the Termios infrastructure */
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@@ -281,7 +284,7 @@ static void tms570_sci_interrupt_handler(void * arg)
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/*
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* Check if we have something transmitted.
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*/
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if ( (ctx->regs->SCIFLR & (1<<8) ) == (1<<8) ) {
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if ( (ctx->regs->FLR & (1<<8) ) == (1<<8) ) {
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n = tms570_sci_transmitted_chars(ctx);
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if ( n > 0 ) {
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/*
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@@ -316,15 +319,15 @@ static void tms570_sci_interrupt_write(
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if ( len > 0 ) {
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/* start UART TX, this will result in an interrupt when done */
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ctx->regs->SCITD = *buf;
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ctx->regs->TD = *buf;
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/* character written - raise count*/
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ctx->tx_chars_in_hw = 1;
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/* Enable TX interrupt (interrupt is edge-triggered) */
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ctx->regs->SCISETINT = (1<<8);
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ctx->regs->SETINT = (1<<8);
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} else {
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/* No more to send, disable TX interrupts */
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ctx->regs->SCICLEARINT = (1<<8);
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ctx->regs->CLEARINT = (1<<8);
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/* Tell close that we sent everything */
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}
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}
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@@ -352,10 +355,10 @@ static void tms570_sci_poll_write(
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/* Write */
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for ( i = 0; i < n; ++i ) {
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while ( (ctx->regs->SCIFLR & (1<<11) ) == 0) {
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while ( (ctx->regs->FLR & (1<<11) ) == 0) {
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;
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}
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ctx->regs->SCITD = buf[i];
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ctx->regs->TD = buf[i];
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}
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}
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@@ -372,7 +375,7 @@ static int TMS570_sci_can_read_char(
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tms570_sci_context * ctx
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)
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{
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return ctx->regs->SCIFLR & (1<<9);
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return ctx->regs->FLR & (1<<9);
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}
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/**
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@@ -387,7 +390,7 @@ static char TMS570_sci_read_char(
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tms570_sci_context * ctx
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)
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{
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return ctx->regs->SCIRD;
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return ctx->regs->RD;
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}
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/**
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@@ -468,7 +471,7 @@ static bool tms570_sci_interrupt_first_open(
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if ( ret == false ) {
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return false;
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}
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ctx->regs->SCISETINTLVL = 0;
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ctx->regs->SETINTLVL = 0;
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/* Register Interrupt handler */
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sc = rtems_interrupt_handler_install(ctx->irq,
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ctx->device_name,
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@@ -527,7 +530,7 @@ static void tms570_sci_interrupt_last_close(
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rtems_termios_device_lock_release(base, &lock_context);
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/* Flush device */
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while ( ( ctx->regs->SCIFLR & (1<<11) ) > 0 ) {
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while ( ( ctx->regs->FLR & (1<<11) ) > 0 ) {
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;/* Wait until all data has been sent */
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}
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@@ -49,7 +49,7 @@ extern "C" {
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*/
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static inline unsigned tms570_timer(void)
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{
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uint32_t actual_fcr0 = TMS570_RTI.RTIFRC0;
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uint32_t actual_fcr0 = TMS570_RTI.CNT[0].FRCx;
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return actual_fcr0;
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}
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@@ -21,6 +21,7 @@
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#define LIBBSP_ARM_TMS570_POM_H
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#include <stdint.h>
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#include <bsp/tms570.h>
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#ifdef __cplusplus
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extern "C" {
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@@ -47,47 +48,6 @@ extern "C" {
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#define TMS570_POM_REGADDRMASK ((1<<23)-1)
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typedef struct tms570_pom_region_t {
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uint32_t PROGSTART;
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uint32_t OVLSTART;
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uint32_t REGSIZE;
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uint32_t res0;
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} tms570_pom_region_t;
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typedef struct tms570_pom_t {
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uint32_t GLBCTRL; /* 000h Global Control Register */
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uint32_t REV; /* 004h Revision ID */
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uint32_t CLKCTRL; /* 008h Clock Gate Control Register */
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uint32_t FLG; /* 00Ch Status Register */
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uint32_t reserved1[0x1f0/4];
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tms570_pom_region_t REG[TMS570_POM_REGIONS]; /* 200h Program Regions */
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uint32_t reserved2[0xb00/4];
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uint32_t ITCTRL; /* F00h Integration Control Register */
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uint32_t reserved3[0x09c/4];
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uint32_t CLAIMSET; /* FA0h Claim Set Register */
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uint32_t CLAIMCLR; /* FA4h Claim Clear Register */
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uint32_t reserved4[0x008/4];
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uint32_t LOCKACCESS; /* FB0h Lock Access Register */
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uint32_t LOCKSTATUS; /* FB4h Lock Status Register */
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uint32_t AUTHSTATUS; /* FB8h Authentication Status Register */
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uint32_t reserved5[0x00c/4];
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uint32_t DEVID; /* FC8h Device ID Register */
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uint32_t DEVTYPE; /* FCCh Device Type Register */
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uint32_t PERIPHERALID4; /* FD0h Peripheral ID 4 Register */
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uint32_t PERIPHERALID5; /* FD4h Peripheral ID 5 Register */
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uint32_t PERIPHERALID6; /* FD8h Peripheral ID 6 Register */
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uint32_t PERIPHERALID7; /* FDCh Peripheral ID 7 Register */
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uint32_t PERIPHERALID0; /* FE0h Peripheral ID 0 Register */
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uint32_t PERIPHERALID1; /* FE4h Peripheral ID 1 Register */
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uint32_t PERIPHERALID2; /* FE8h Peripheral ID 2 Register */
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uint32_t PERIPHERALID3; /* FECh Peripheral ID 3 Register */
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uint32_t COMPONENTID0; /* FF0h Component ID 0 Register */
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uint32_t COMPONENTID1; /* FF4h Component ID 1 Register */
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uint32_t COMPONENTID2; /* FF8h Component ID 2 Register */
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uint32_t COMPONENTID3; /* FFCh Component ID 3 Register */
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} tms570_pom_t;
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#define TMS570_POM (*(volatile tms570_pom_t*)0xffa04000)
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int mem_dump(void *buf, unsigned long start, unsigned long len, int blen);
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void tms570_pom_remap(void);
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@@ -29,61 +29,12 @@
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#ifndef ASM
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#include <stdint.h>
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#include <bsp/tms570.h>
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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typedef struct {
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uint32_t RTIGCTRL; /* RTIGlobalControlRegister */
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uint32_t RTITBCTRL; /* RTITimebaseControlRegister */
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uint32_t RTICAPCTRL; /* RTICaptureControlRegister */
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uint32_t RTICOMPCTRL; /* RTICompareControlRegister */
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uint32_t RTIFRC0; /* RTIFreeRunningCounter0Register */
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uint32_t RTIUC0; /* RTIUpCounter0Register */
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uint32_t RTICPUC0; /* RTICompareUpCounter0Register */
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uint32_t reserved1 [0x4/4];
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uint32_t RTICAFRC0; /* RTICaptureFreeRunningCounter0Register */
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uint32_t RTICAUC0; /* RTICaptureUpCounter0Register */
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uint32_t reserved2 [0x8/4];
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uint32_t RTIFRC1; /* RTIFreeRunningCounter1Register */
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uint32_t RTIUC1; /* RTIUpCounter1Register */
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uint32_t RTICPUC1; /* RTICompareUpCounter1Register */
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uint32_t reserved3 [0x4/4];
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uint32_t RTICAFRC1; /* RTICaptureFreeRunningCounter1Register */
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uint32_t RTICAUC1; /* RTICaptureUpCounter1Register */
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uint32_t reserved4 [0x8/4];
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uint32_t RTICOMP0; /* RTICompare0Register */
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uint32_t RTIUDCP0; /* RTIUpdateCompare0Register */
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uint32_t RTICOMP1; /* RTICompare1Register */
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uint32_t RTIUDCP1; /* RTIUpdateCompare1Register */
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uint32_t RTICOMP2; /* RTICompare2Register */
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uint32_t RTIUDCP2; /* RTIUpdateCompare2Register */
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uint32_t RTICOMP3; /* RTICompare3Register */
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uint32_t RTIUDCP3; /* RTIUpdateCompare3Register */
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uint32_t RTITBLCOMP; /* RTITimebaseLowCompareRegister */
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uint32_t RTITBHCOMP; /* RTITimebaseHighCompareRegister */
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uint32_t reserved5 [0x8/4];
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uint32_t RTISETINTENA; /* RTISetInterruptEnableRegister */
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uint32_t RTICLEARINTENA; /* RTIClearInterruptEnableRegister */
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uint32_t RTIINTFLAG; /* RTIInterruptFlagRegister */
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uint32_t reserved6 [0x4/4];
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uint32_t RTIDWDCTRL; /* DigitalWatchdogControlRegister */
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uint32_t RTIDWDPRLD; /* DigitalWatchdogPreloadRegister */
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uint32_t RTIWDSTATUS; /* WatchdogStatusRegister */
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uint32_t RTIWDKEY; /* RTIWatchdogKeyRegister */
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uint32_t RTIDWDCNTR; /* RTIDigitalWatchdogDownCounterRegister */
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uint32_t RTIWWDRXNCTRL; /* DigitalWindowedWatchdogReactionControlRegister */
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uint32_t RTIWWDSIZECTRL; /* DigitalWindowedWatchdogWindowSizeControlRegister */
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uint32_t RTIINTCLRENABLE;/* RTICompareInterruptClearEnableRegister */
|
||||
uint32_t RTICOMP0CLR; /* RTICompare0ClearRegister */
|
||||
uint32_t RTICOMP1CLR; /* RTICompare1ClearRegister */
|
||||
uint32_t RTICOMP2CLR; /* RTICompare2ClearRegister */
|
||||
uint32_t RTICOMP3CLR; /* RTICompare3ClearRegister */
|
||||
}tms570_rti_t;
|
||||
|
||||
#define TMS570_RTI (*(volatile tms570_rti_t*)0xFFFFFC00)
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
@@ -30,43 +30,12 @@
|
||||
|
||||
#include <rtems.h>
|
||||
#include <stdint.h>
|
||||
#include <bsp/tms570.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
typedef struct {
|
||||
uint32_t SCIGCR0; /*SCIGlobalControlRegister0*/
|
||||
uint32_t SCIGCR1; /*SCIGlobalControlRegister1*/
|
||||
uint32_t reserved1 [0x4/4];
|
||||
uint32_t SCISETINT; /*SCISetInterruptRegister*/
|
||||
uint32_t SCICLEARINT; /*SCIClearInterruptRegister*/
|
||||
uint32_t SCISETINTLVL; /*SCISetInterruptLevelRegister*/
|
||||
uint32_t SCICLEARINTLVL; /*SCIClearInterruptLevelRegister*/
|
||||
uint32_t SCIFLR; /*SCIFlagsRegister*/
|
||||
uint32_t SCIINTVECT0; /*SCIInterruptVectorOffset0*/
|
||||
uint32_t SCIINTVECT1; /*SCIInterruptVectorOffset1*/
|
||||
uint32_t SCIFORMAT; /*SCIFormatControlRegister*/
|
||||
uint32_t BRS; /*BaudRateSelectionRegister*/
|
||||
uint32_t SCIED; /*ReceiverEmulationDataBuffer*/
|
||||
uint32_t SCIRD; /*ReceiverDataBuffer*/
|
||||
uint32_t SCITD; /*TransmitDataBuffer*/
|
||||
uint32_t SCIPIO0; /*SCIPinI/OControlRegister0*/
|
||||
uint32_t SCIPIO1; /*SCIPinI/OControlRegister1*/
|
||||
uint32_t SCIPIO2; /*SCIPinI/OControlRegister2*/
|
||||
uint32_t SCIPIO3; /*SCIPinI/OControlRegister3*/
|
||||
uint32_t SCIPIO4; /*SCIPinI/OControlRegister4*/
|
||||
uint32_t SCIPIO5; /*SCIPinI/OControlRegister5*/
|
||||
uint32_t SCIPIO6; /*SCIPinI/OControlRegister6*/
|
||||
uint32_t SCIPIO7; /*SCIPinI/OControlRegister7*/
|
||||
uint32_t SCIPIO8; /*SCIPinI/OControlRegister8*/
|
||||
uint32_t reserved2 [0x30/4];
|
||||
uint32_t IODFTCTRL; /*Input/OutputErrorEnableRegister*/
|
||||
}tms570_sci_t;
|
||||
|
||||
#define TMS570_SCI (*(volatile tms570_sci_t*)0xFFF7E400U)
|
||||
#define TMS570_SCI2 (*(volatile tms570_sci_t*)0xFFF7E500U)
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
@@ -29,40 +29,13 @@
|
||||
#ifndef ASM
|
||||
#include <rtems.h>
|
||||
#include <stdint.h>
|
||||
#include <bsp/tms570.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
typedef struct{
|
||||
uint32_t PARFLG; /* InterruptVectorTableParityFlagRegister */
|
||||
uint32_t PARCTL; /* InterruptVectorTableParityControlRegister */
|
||||
uint32_t ADDERR; /* AddressParityErrorRegister */
|
||||
uint32_t FBPARERR; /* Fall-BackAddressParityErrorRegister */
|
||||
uint32_t reserved1 [0x4/4];
|
||||
uint32_t IRQINDEX; /* IRQIndexOffsetVectorRegister */
|
||||
uint32_t FIQINDEX; /* FIQIndexOffsetVectorRegister */
|
||||
uint32_t reserved2 [0x8/4];
|
||||
uint32_t FIRQPR[3]; /* FIQ/IRQProgramControlRegister0 */
|
||||
uint32_t reserved3 [0x4/4];
|
||||
uint32_t INTREQ[3]; /* PendingInterruptReadLocationRegister0 */
|
||||
uint32_t reserved4 [0x4/4];
|
||||
uint32_t REQENASET[3]; /* InterruptEnableSetRegister0 */
|
||||
uint32_t reserved5 [0x4/4];
|
||||
uint32_t REQENACLR[3]; /* InterruptEnableClearRegister0 */
|
||||
uint32_t reserved6 [0x4/4];
|
||||
uint32_t WAKEENASET[3]; /* Wake-upEnableSetRegister0 */
|
||||
uint32_t reserved7 [0x4/4];
|
||||
uint32_t WAKEENACLR[3]; /* Wake-upEnableClearRegister0 */
|
||||
uint32_t reserved8 [0x4/4];
|
||||
uint32_t IRQVECREG; /* IRQInterruptVectorRegister */
|
||||
uint32_t FIQVECREG; /* FIQInterruptVectorRegister */
|
||||
uint32_t CAPEVT; /* CaptureEventRegister */
|
||||
uint32_t reserved9 [0x4/4];
|
||||
uint32_t CHANCTRL [0x5c/4]; /* VIM Interrupt Control Register (PARSER ERROR) */
|
||||
}tms570_vim_t;
|
||||
|
||||
#define TMS570_VIM (*(volatile tms570_vim_t*)0xFFFFFDEC)
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -1,31 +1,130 @@
|
||||
/**
|
||||
* @file tms570.h
|
||||
*
|
||||
* @ingroup tms570
|
||||
*
|
||||
* @brief Specific register definitions according to tms570 family boards.
|
||||
*/
|
||||
/* This file is generated by make_central_header.py */
|
||||
/* Current script's version can be found at: */
|
||||
/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2015 Taller Technologies.
|
||||
* Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
|
||||
*
|
||||
* @author Martin Galvan <martin.galvan@tallertechnologies.com>
|
||||
* Czech Technical University in Prague
|
||||
* Zikova 1903/4
|
||||
* 166 36 Praha 6
|
||||
* Czech Republic
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* The views and conclusions contained in the software and documentation are those
|
||||
* of the authors and should not be interpreted as representing official policies,
|
||||
* either expressed or implied, of the FreeBSD Project.
|
||||
*/
|
||||
#ifndef LIBBSP_ARM_TMS570
|
||||
#define LIBBSP_ARM_TMS570
|
||||
#include <bsp/ti_herc/reg_adc.h>
|
||||
#include <bsp/ti_herc/reg_ccmsr.h>
|
||||
#include <bsp/ti_herc/reg_crc.h>
|
||||
#include <bsp/ti_herc/reg_dcan.h>
|
||||
#include <bsp/ti_herc/reg_dcc.h>
|
||||
#include <bsp/ti_herc/reg_dma.h>
|
||||
#include <bsp/ti_herc/reg_dmm.h>
|
||||
#include <bsp/ti_herc/reg_efuse.h>
|
||||
#include <bsp/ti_herc/reg_emac.h>
|
||||
#include <bsp/ti_herc/reg_emacm.h>
|
||||
#include <bsp/ti_herc/reg_emif.h>
|
||||
#include <bsp/ti_herc/reg_esm.h>
|
||||
#include <bsp/ti_herc/reg_flash.h>
|
||||
#include <bsp/ti_herc/reg_flex_ray.h>
|
||||
#include <bsp/ti_herc/reg_gio.h>
|
||||
#include <bsp/ti_herc/reg_htu.h>
|
||||
#include <bsp/ti_herc/reg_i2c.h>
|
||||
#include <bsp/ti_herc/reg_iomm.h>
|
||||
#include <bsp/ti_herc/reg_lin.h>
|
||||
#include <bsp/ti_herc/reg_mdio.h>
|
||||
#include <bsp/ti_herc/reg_n2het.h>
|
||||
#include <bsp/ti_herc/reg_pbist.h>
|
||||
#include <bsp/ti_herc/reg_pll.h>
|
||||
#include <bsp/ti_herc/reg_pmm.h>
|
||||
#include <bsp/ti_herc/reg_rti.h>
|
||||
#include <bsp/ti_herc/reg_rtp.h>
|
||||
#include <bsp/ti_herc/reg_sci.h>
|
||||
#include <bsp/ti_herc/reg_tcr.h>
|
||||
#include <bsp/ti_herc/reg_tcram.h>
|
||||
#include <bsp/ti_herc/reg_vim.h>
|
||||
#include <bsp/ti_herc/reg_pom.h>
|
||||
#include <bsp/ti_herc/reg_spi.h>
|
||||
#include <bsp/ti_herc/reg_stc.h>
|
||||
#include <bsp/ti_herc/reg_sys.h>
|
||||
#include <bsp/ti_herc/reg_sys2.h>
|
||||
#include <bsp/ti_herc/reg_pcr.h>
|
||||
|
||||
#ifndef LIBBSP_ARM_TMS570_H
|
||||
#define LIBBSP_ARM_TMS570_H
|
||||
|
||||
#define SYSECR (*(uint32_t *)0xFFFFFFE0u) /* System Exception Control Register */
|
||||
#define ESMIOFFHR (*(uint32_t *)0xFFFFF528) /* ESM Interrupt Offset High Register */
|
||||
#define ESMSR1 (*(uint32_t *)0xFFFFF518u) /* ESM Status Register 1 */
|
||||
#define ESMSR2 (*(uint32_t *)0xFFFFF51Cu) /* ESM Status Register 2 */
|
||||
#define ESMSR3 (*(uint32_t *)0xFFFFF520u) /* ESM Status Register 3 */
|
||||
#define ESMSR4 (*(uint32_t *)0xFFFFF558u) /* ESM Status Register 4 */
|
||||
|
||||
#define SYSECR_RESET 0x80000u
|
||||
|
||||
#endif /* LIBBSP_ARM_TMS570_H */
|
||||
#define TMS570_ADC1 (*(volatile tms570_adc_t*)0xFFF7C000)
|
||||
#define TMS570_ADC2 (*(volatile tms570_adc_t*)0xFFF7C200)
|
||||
#define TMS570_CCMSR (*(volatile tms570_ccmsr_t*)0XFFFFF600)
|
||||
#define TMS570_CRC (*(volatile tms570_crc_t*)0xFE000000)
|
||||
#define TMS570_DCAN1 (*(volatile tms570_dcan_t*)0xFFF7DC00)
|
||||
#define TMS570_DCAN2 (*(volatile tms570_dcan_t*)0xFFF7DE00)
|
||||
#define TMS570_DCAN3 (*(volatile tms570_dcan_t*)0xFFF7E000)
|
||||
#define TMS570_DCC1 (*(volatile tms570_dcc_t*)0xFFFFEC00)
|
||||
#define TMS570_DCC2 (*(volatile tms570_dcc_t*)0xFFFFF400)
|
||||
#define TMS570_DMA (*(volatile tms570_dma_t*)0xFFFFF000)
|
||||
#define TMS570_DMM (*(volatile tms570_dmm_t*)0xFFFFF700)
|
||||
#define TMS570_EFUSE (*(volatile tms570_efuse_t*)0XFFF8C01C)
|
||||
#define TMS570_EMAC (*(volatile tms570_emac_t*)0xFCF78900)
|
||||
#define TMS570_EMACM (*(volatile tms570_emacm_t*)0xFCF78000)
|
||||
#define TMS570_EMIF (*(volatile tms570_emif_t*)0xFCFFE800)
|
||||
#define TMS570_ESM (*(volatile tms570_esm_t*)0XFFFFF500)
|
||||
#define TMS570_FLASH (*(volatile tms570_flash_t*)0XFFF87000)
|
||||
#define TMS570_FLEX_RAY (*(volatile tms570_flex_ray_t*)0xFFF7C800)
|
||||
#define TMS570_GIO (*(volatile tms570_gio_t*)0xFFF7BC00)
|
||||
#define TMS570_GIO_PORTA (*(volatile tms570_gio_port_t*)0xFFF7BC34)
|
||||
#define TMS570_GIO_PORTB (*(volatile tms570_gio_port_t*)0xFFF7BC54)
|
||||
#define TMS570_GIO_PORTC (*(volatile tms570_gio_port_t*)0xFFF7BC74)
|
||||
#define TMS570_GIO_PORTD (*(volatile tms570_gio_port_t*)0xFFF7BC94)
|
||||
#define TMS570_GIO_PORTE (*(volatile tms570_gio_port_t*)0xFFF7BCB4)
|
||||
#define TMS570_GIO_PORTF (*(volatile tms570_gio_port_t*)0xFFF7BCD4)
|
||||
#define TMS570_GIO_PORTG (*(volatile tms570_gio_port_t*)0xFFF7BCF4)
|
||||
#define TMS570_GIO_PORTH (*(volatile tms570_gio_port_t*)0xFFF7BD14)
|
||||
#define TMS570_HTU1 (*(volatile tms570_htu_t*)0xFFF7A400)
|
||||
#define TMS570_HTU2 (*(volatile tms570_htu_t*)0xFFF7A500)
|
||||
#define TMS570_I2C (*(volatile tms570_i2c_t*)0xFFF7D400)
|
||||
#define TMS570_IOMM (*(volatile tms570_iomm_t*)0XFFFFEA00)
|
||||
#define TMS570_PINMUX (*(volatile tms570_pinmux_t*)0xFFFFEB10)
|
||||
#define TMS570_LIN (*(volatile tms570_lin_t*)0xFFF7E400)
|
||||
#define TMS570_MDIO (*(volatile tms570_mdio_t*)0xFCF78900)
|
||||
#define TMS570_NHET1 (*(volatile tms570_nhet_t*)0xFFF7B800)
|
||||
#define TMS570_NHET2 (*(volatile tms570_nhet_t*)0xFFF7B900)
|
||||
#define TMS570_PBIST (*(volatile tms570_pbist_t*)0xFFFFE400)
|
||||
#define TMS570_PLL (*(volatile tms570_pll_t*)0XFFFFE100)
|
||||
#define TMS570_PMM (*(volatile tms570_pmm_t*)0xFFFF0000)
|
||||
#define TMS570_RTI (*(volatile tms570_rti_t*)0xFFFFFC00)
|
||||
#define TMS570_RTP (*(volatile tms570_rtp_t*)0xFFFFFA00)
|
||||
#define TMS570_SCI (*(volatile tms570_sci_t*)0xFFF7E500)
|
||||
#define TMS570_TCR (*(volatile tms570_tcr_t*)0xFFF7C800)
|
||||
#define TMS570_TCRAM1 (*(volatile tms570_tcram_t*)0xFFFFF800)
|
||||
#define TMS570_TCRAM2 (*(volatile tms570_tcram_t*)0xFFFFF900)
|
||||
#define TMS570_VIM (*(volatile tms570_vim_t*)0XFFFFFDEC)
|
||||
#define TMS570_POM (*(volatile tms570_pom_t*)0XFFA04000)
|
||||
#define TMS570_SPI (*(volatile tms570_spi_t*)0xFFF7F400)
|
||||
#define TMS570_STC (*(volatile tms570_stc_t*)0xFFFFE600)
|
||||
#define TMS570_SYS1 (*(volatile tms570_sys1_t*)0xFFFFFF00)
|
||||
#define TMS570_SYS2 (*(volatile tms570_sys2_t*)0xFFFFE100)
|
||||
#define TMS570_PCR (*(volatile tms570_pcr_t*)0xFFFFE000)
|
||||
#endif /* LIBBSP_ARM_TMS570 */
|
||||
|
||||
@@ -33,6 +33,11 @@ $(PROJECT_INCLUDE)/bsp/$(dirstamp):
|
||||
@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
|
||||
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp):
|
||||
@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp/ti_herc
|
||||
@: > $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
|
||||
$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
|
||||
PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
|
||||
@@ -109,6 +114,150 @@ $(PROJECT_INCLUDE)/bsp/system-clocks.h: include/system-clocks.h $(PROJECT_INCLUD
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/system-clocks.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/system-clocks.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_adc.h: include/ti_herc/reg_adc.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_adc.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_adc.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_ccmsr.h: include/ti_herc/reg_ccmsr.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_ccmsr.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_ccmsr.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_crc.h: include/ti_herc/reg_crc.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_crc.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_crc.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_dcan.h: include/ti_herc/reg_dcan.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dcan.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dcan.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_dcc.h: include/ti_herc/reg_dcc.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dcc.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dcc.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_dma.h: include/ti_herc/reg_dma.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dma.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dma.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_dmm.h: include/ti_herc/reg_dmm.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dmm.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_dmm.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_efuse.h: include/ti_herc/reg_efuse.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_efuse.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_efuse.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_emac.h: include/ti_herc/reg_emac.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_emac.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_emac.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_emacm.h: include/ti_herc/reg_emacm.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_emacm.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_emacm.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_emif.h: include/ti_herc/reg_emif.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_emif.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_emif.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_esm.h: include/ti_herc/reg_esm.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_esm.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_esm.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_flash.h: include/ti_herc/reg_flash.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_flash.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_flash.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_flex_ray.h: include/ti_herc/reg_flex_ray.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_flex_ray.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_flex_ray.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_gio.h: include/ti_herc/reg_gio.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_gio.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_gio.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_htu.h: include/ti_herc/reg_htu.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_htu.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_htu.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_i2c.h: include/ti_herc/reg_i2c.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_i2c.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_i2c.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_iomm.h: include/ti_herc/reg_iomm.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_iomm.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_iomm.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_lin.h: include/ti_herc/reg_lin.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_lin.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_lin.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_mdio.h: include/ti_herc/reg_mdio.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_mdio.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_mdio.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_n2het.h: include/ti_herc/reg_n2het.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_n2het.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_n2het.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_pbist.h: include/ti_herc/reg_pbist.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pbist.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pbist.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_pll.h: include/ti_herc/reg_pll.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pll.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pll.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_pmm.h: include/ti_herc/reg_pmm.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pmm.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pmm.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_rti.h: include/ti_herc/reg_rti.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_rti.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_rti.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_rtp.h: include/ti_herc/reg_rtp.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_rtp.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_rtp.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_sci.h: include/ti_herc/reg_sci.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_sci.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_sci.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_tcr.h: include/ti_herc/reg_tcr.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_tcr.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_tcr.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_tcram.h: include/ti_herc/reg_tcram.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_tcram.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_tcram.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_vim.h: include/ti_herc/reg_vim.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_vim.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_vim.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_pom.h: include/ti_herc/reg_pom.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pom.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pom.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_spi.h: include/ti_herc/reg_spi.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_spi.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_spi.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_stc.h: include/ti_herc/reg_stc.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_stc.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_stc.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_sys.h: include/ti_herc/reg_sys.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_sys.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_sys.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_sys2.h: include/ti_herc/reg_sys2.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_sys2.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_sys2.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/ti_herc/reg_pcr.h: include/ti_herc/reg_pcr.h $(PROJECT_INCLUDE)/bsp/ti_herc/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pcr.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ti_herc/reg_pcr.h
|
||||
|
||||
$(PROJECT_INCLUDE)/tm27.h: ../../shared/include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
|
||||
|
||||
@@ -25,22 +25,23 @@ static void handle_esm_errors(uint32_t esm_irq_channel)
|
||||
{
|
||||
/* ESMR3 errors don't generate interrupts. */
|
||||
if (esm_irq_channel < 0x20u) {
|
||||
ESMSR1 = 1 << esm_irq_channel;
|
||||
TMS570_ESM.SR[0] = 1 << esm_irq_channel;
|
||||
} else if (esm_irq_channel < 0x40u) {
|
||||
ESMSR2 = 1 << (esm_irq_channel - 32u);
|
||||
TMS570_ESM.SR[1] = 1 << (esm_irq_channel - 32u);
|
||||
} else if (esm_irq_channel < 0x60u) {
|
||||
ESMSR4 = 1 << (esm_irq_channel - 64u);
|
||||
TMS570_ESM.SR4 = 1 << (esm_irq_channel - 64u);
|
||||
}
|
||||
}
|
||||
|
||||
void bsp_reset(void)
|
||||
{
|
||||
uint32_t esm_irq_channel = ESMIOFFHR - 1;
|
||||
uint32_t esm_irq_channel = TMS570_ESM.IOFFHR - 1;
|
||||
|
||||
if (esm_irq_channel) {
|
||||
handle_esm_errors(esm_irq_channel);
|
||||
}
|
||||
|
||||
/* Reset the board */
|
||||
SYSECR = SYSECR_RESET;
|
||||
/* write of value other than 1 cause system reset */
|
||||
TMS570_SYS1.SYSECR = TMS570_SYS1_SYSECR_RESET(2);
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user