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Added thumb mode support under GNU for module manager on Cortex-A7 pl… (#287)

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* Added thumb mode support under GNU for module manager on Cortex-A7 platform.

* update code for comment.
This commit is contained in:
yajunxiaMS
2023-07-21 09:26:22 +08:00
committed by GitHub
parent 1ffd7c2cde
commit 7fa087d061
26 changed files with 1101 additions and 598 deletions
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36
ports_module/cortex_a7/gnu/example_build/build_threadx_module_library.bat
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@@ -98,21 +98,21 @@ arm-none-eabi-gcc -c -g -O0 -mcpu=cortex-a7 -mfloat-abi=hard -mfpu=neon-vfpv4 -m
arm-none-eabi-gcc -c -g -O0 -mcpu=cortex-a7 -mfloat-abi=hard -mfpu=neon-vfpv4 -marm -mthumb-interwork -DTX_ENABLE_VFP_SUPPORT -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I../inc -I../../../../common/inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc ../../../../common_modules/module_lib/src/txm_trace_isr_exit_insert.c
arm-none-eabi-gcc -c -g -O0 -mcpu=cortex-a7 -mfloat-abi=hard -mfpu=neon-vfpv4 -marm -mthumb-interwork -DTX_ENABLE_VFP_SUPPORT -fpic -fno-plt -mno-pic-data-is-text-relative -msingle-pic-base -I../inc -I../../../../common/inc -I../../../../common_modules/inc -I../../../../common_modules/module_manager/inc ../../../../common_modules/module_lib/src/txm_trace_user_event_insert.c
armar --create txm.a txm_block_allocate.o txm_block_pool_create.o txm_block_pool_delete.o txm_block_pool_info_get.o txm_block_pool_performance_info_get.o txm_block_pool_performance_system_info_get.o
armar -r txm.a txm_block_pool_prioritize.o txm_block_release.o
armar -r txm.a txm_byte_allocate.o txm_byte_pool_create.o txm_byte_pool_delete.o txm_byte_pool_info_get.o txm_byte_pool_performance_info_get.o txm_byte_pool_performance_system_info_get.o
armar -r txm.a txm_byte_pool_prioritize.o txm_byte_release.o
armar -r txm.a txm_event_flags_create.o txm_event_flags_delete.o txm_event_flags_get.o txm_event_flags_info_get.o txm_event_flags_performance_info_get.o txm_event_flags_performance_system_info_get.o
armar -r txm.a txm_event_flags_set.o txm_event_flags_set_notify.o
armar -r txm.a txm_module_application_request.o txm_module_callback_request_thread_entry.o txm_module_object_allocate.o txm_module_object_deallocate.o txm_module_object_pointer_get.o txm_module_thread_shell_entry.o txm_module_thread_system_suspend.o
armar -r txm.a txm_mutex_create.o txm_mutex_delete.o txm_mutex_get.o txm_mutex_info_get.o txm_mutex_performance_info_get.o txm_mutex_performance_system_info_get.o txm_mutex_prioritize.o txm_mutex_put.o
armar -r txm.a txm_queue_create.o txm_queue_delete.o txm_queue_flush.o txm_queue_front_send.o txm_queue_info_get.o txm_queue_performance_info_get.o txm_queue_performance_system_info_get.o
armar -r txm.a txm_queue_prioritize.o txm_queue_receive.o txm_queue_send.o txm_queue_send_notify.o
armar -r txm.a txm_semaphore_ceiling_put.o txm_semaphore_create.o txm_semaphore_delete.o txm_semaphore_get.o txm_semaphore_info_get.o txm_semaphore_performance_info_get.o txm_semaphore_performance_system_info_get.o
armar -r txm.a txm_semaphore_prioritize.o txm_semaphore_put.o txm_semaphore_put_notify.o
armar -r txm.a txm_thread_create.o txm_thread_delete.o txm_thread_entry_exit_notify.o txm_thread_identify.o txm_thread_info_get.o txm_thread_interrupt_control.o txm_thread_performance_info_get.o
armar -r txm.a txm_thread_performance_system_info_get.o txm_thread_preemption_change.o txm_thread_priority_change.o txm_thread_relinquish.o txm_thread_reset.o txm_thread_resume.o
armar -r txm.a txm_thread_sleep.o txm_thread_stack_error_notify.o txm_thread_suspend.o txm_thread_terminate.o txm_thread_time_slice_change.o txm_thread_wait_abort.o
armar -r txm.a txm_time_get.o txm_time_set.o
armar -r txm.a txm_timer_activate.o txm_timer_change.o txm_timer_create.o txm_timer_deactivate.o txm_timer_delete.o txm_timer_info_get.o txm_timer_performance_info_get.o txm_timer_performance_system_info_get.o
armar -r txm.a txm_trace_buffer_full_notify.o txm_trace_disable.o txm_trace_enable.o txm_trace_event_filter.o txm_trace_event_unfilter.o txm_trace_isr_enter_insert.o txm_trace_isr_exit_insert.o txm_trace_user_event_insert.o
arm-none-eabi-ar -r txm.a txm_block_allocate.o txm_block_pool_create.o txm_block_pool_delete.o txm_block_pool_info_get.o txm_block_pool_performance_info_get.o txm_block_pool_performance_system_info_get.o
arm-none-eabi-ar -r txm.a txm_block_pool_prioritize.o txm_block_release.o
arm-none-eabi-ar -r txm.a txm_byte_allocate.o txm_byte_pool_create.o txm_byte_pool_delete.o txm_byte_pool_info_get.o txm_byte_pool_performance_info_get.o txm_byte_pool_performance_system_info_get.o
arm-none-eabi-ar -r txm.a txm_byte_pool_prioritize.o txm_byte_release.o
arm-none-eabi-ar -r txm.a txm_event_flags_create.o txm_event_flags_delete.o txm_event_flags_get.o txm_event_flags_info_get.o txm_event_flags_performance_info_get.o txm_event_flags_performance_system_info_get.o
arm-none-eabi-ar -r txm.a txm_event_flags_set.o txm_event_flags_set_notify.o
arm-none-eabi-ar -r txm.a txm_module_application_request.o txm_module_callback_request_thread_entry.o txm_module_object_allocate.o txm_module_object_deallocate.o txm_module_object_pointer_get.o txm_module_thread_shell_entry.o txm_module_thread_system_suspend.o
arm-none-eabi-ar -r txm.a txm_mutex_create.o txm_mutex_delete.o txm_mutex_get.o txm_mutex_info_get.o txm_mutex_performance_info_get.o txm_mutex_performance_system_info_get.o txm_mutex_prioritize.o txm_mutex_put.o
arm-none-eabi-ar -r txm.a txm_queue_create.o txm_queue_delete.o txm_queue_flush.o txm_queue_front_send.o txm_queue_info_get.o txm_queue_performance_info_get.o txm_queue_performance_system_info_get.o
arm-none-eabi-ar -r txm.a txm_queue_prioritize.o txm_queue_receive.o txm_queue_send.o txm_queue_send_notify.o
arm-none-eabi-ar -r txm.a txm_semaphore_ceiling_put.o txm_semaphore_create.o txm_semaphore_delete.o txm_semaphore_get.o txm_semaphore_info_get.o txm_semaphore_performance_info_get.o txm_semaphore_performance_system_info_get.o
arm-none-eabi-ar -r txm.a txm_semaphore_prioritize.o txm_semaphore_put.o txm_semaphore_put_notify.o
arm-none-eabi-ar -r txm.a txm_thread_create.o txm_thread_delete.o txm_thread_entry_exit_notify.o txm_thread_identify.o txm_thread_info_get.o txm_thread_interrupt_control.o txm_thread_performance_info_get.o
arm-none-eabi-ar -r txm.a txm_thread_performance_system_info_get.o txm_thread_preemption_change.o txm_thread_priority_change.o txm_thread_relinquish.o txm_thread_reset.o txm_thread_resume.o
arm-none-eabi-ar -r txm.a txm_thread_sleep.o txm_thread_stack_error_notify.o txm_thread_suspend.o txm_thread_terminate.o txm_thread_time_slice_change.o txm_thread_wait_abort.o
arm-none-eabi-ar -r txm.a txm_time_get.o txm_time_set.o
arm-none-eabi-ar -r txm.a txm_timer_activate.o txm_timer_change.o txm_timer_create.o txm_timer_deactivate.o txm_timer_delete.o txm_timer_info_get.o txm_timer_performance_info_get.o txm_timer_performance_system_info_get.o
arm-none-eabi-ar -r txm.a txm_trace_buffer_full_notify.o txm_trace_disable.o txm_trace_enable.o txm_trace_event_filter.o txm_trace_event_unfilter.o txm_trace_isr_enter_insert.o txm_trace_isr_exit_insert.o txm_trace_user_event_insert.o

33
ports_module/cortex_a7/gnu/example_build/crt0.S
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@@ -1,15 +1,30 @@
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
.arm
#endif
/* .text is used instead of .section .text so it works with arm-aout too. */
.text
.code 32
.align 0
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _mainCRTStartup
_mainCRTStartup:
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _start
_start:
#if defined(THUMB_MODE)
.thumb_func
#endif
.global start
start:
_start:
_mainCRTStartup:
/* Start by setting up a stack */
/* Set up the stack pointer to a fixed value */
@@ -68,17 +83,9 @@ _mainCRTStartup:
.Lfini:
.word _fini
#endif */
/* Return ... */
#ifdef __APCS_26__
movs pc, lr
#else
#ifdef __THUMB_INTERWORK
bx lr
#else
mov pc, lr
#endif
#endif
/* Return ... */
bx lr
/* Workspace for Angel calls. */
.data

14
ports_module/cortex_a7/gnu/example_build/gcc_setup.S
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@@ -1,10 +1,18 @@
.syntax unified
#if !defined(THUMB_MODE)
.arm
#else
.thumb
#endif
.text
.align 4
.syntax unified
.global _gcc_setup
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _gcc_setup
_gcc_setup:
STMDB sp!, {r3, r4, r5, r6, r7, lr} // Store other preserved registers
@@ -93,7 +101,6 @@ got_setup_done:
/* Startup helper functions. */
.thumb_func
crt0_memory_copy:
cmp r0, r1
@@ -112,7 +119,6 @@ memory_copy_loop:
memory_copy_done:
bx lr
.thumb_func
crt0_memory_set:
cmp r0, r1
beq memory_set_done

449
ports_module/cortex_a7/gnu/example_build/module_code.c Normal file
View File

@@ -0,0 +1,449 @@
/**************************** Module-to-C-array Utility *****************************************/
/* */
/* Copyright (c) Microsoft Corporation Version 5.8, build date: 03-01-2018 */
/* */
/************************************************************************************************/
/*
Input ELF file: .\sample_threadx_module.axf
Output C Array file: .\module_code.c
*/
unsigned char module_code[] = {
/* Address Contents */
/* 0x00030000 */ 0xF8, 0x40, 0x2D, 0xE9, 0x30, 0x31, 0x9F, 0xE5, 0x30, 0x41, 0x9F, 0xE5, 0x00, 0x50, 0xA0, 0xE1, /* SECTION: .text */
/* 0x00030010 */ 0x2C, 0x01, 0x9F, 0xE5, 0x03, 0x00, 0x40, 0xE0, 0x05, 0x00, 0x80, 0xE0, 0x24, 0x11, 0x9F, 0xE5,
/* 0x00030020 */ 0x04, 0x10, 0x41, 0xE0, 0x09, 0x10, 0x81, 0xE0, 0x1C, 0x21, 0x9F, 0xE5, 0x04, 0x20, 0x42, 0xE0,
/* 0x00030030 */ 0x09, 0x20, 0x82, 0xE0, 0x02, 0x00, 0x51, 0xE1, 0x0D, 0x00, 0x00, 0x0A, 0x00, 0x60, 0x90, 0xE5,
/* 0x00030040 */ 0x00, 0x00, 0x56, 0xE3, 0x06, 0x00, 0x00, 0x0A, 0x04, 0x00, 0x56, 0xE1, 0x02, 0x00, 0x00, 0xBA,
/* 0x00030050 */ 0x04, 0x60, 0x46, 0xE0, 0x09, 0x60, 0x86, 0xE0, 0x01, 0x00, 0x00, 0xEA, 0x03, 0x60, 0x46, 0xE0,
/* 0x00030060 */ 0x05, 0x60, 0x86, 0xE0, 0x00, 0x60, 0x81, 0xE5, 0x04, 0x00, 0x80, 0xE2, 0x04, 0x10, 0x81, 0xE2,
/* 0x00030070 */ 0xEF, 0xFF, 0xFF, 0xEA, 0xD4, 0x00, 0x9F, 0xE5, 0x03, 0x00, 0x40, 0xE0, 0x05, 0x00, 0x80, 0xE0,
/* 0x00030080 */ 0xCC, 0x10, 0x9F, 0xE5, 0x04, 0x10, 0x41, 0xE0, 0x09, 0x10, 0x81, 0xE0, 0xC4, 0x20, 0x9F, 0xE5,
/* 0x00030090 */ 0x04, 0x20, 0x42, 0xE0, 0x09, 0x20, 0x82, 0xE0, 0x14, 0x00, 0x00, 0xEB, 0xB8, 0x00, 0x9F, 0xE5,
/* 0x000300A0 */ 0x04, 0x00, 0x40, 0xE0, 0x09, 0x00, 0x80, 0xE0, 0xB0, 0x10, 0x9F, 0xE5, 0x04, 0x10, 0x41, 0xE0,
/* 0x000300B0 */ 0x09, 0x10, 0x81, 0xE0, 0x00, 0x20, 0xA0, 0xE3, 0x19, 0x00, 0x00, 0xEB, 0xA0, 0x00, 0x9F, 0xE5,
/* 0x000300C0 */ 0x04, 0x00, 0x40, 0xE0, 0x09, 0x00, 0x80, 0xE0, 0x98, 0x10, 0x9F, 0xE5, 0x04, 0x10, 0x41, 0xE0,
/* 0x000300D0 */ 0x09, 0x10, 0x81, 0xE0, 0x00, 0x10, 0x41, 0xE0, 0x00, 0x20, 0xA0, 0xE3, 0x00, 0x20, 0x80, 0xE5,
/* 0x000300E0 */ 0x04, 0x00, 0x80, 0xE2, 0x00, 0x10, 0x80, 0xE5, 0xF8, 0x40, 0xBD, 0xE8, 0x1E, 0xFF, 0x2F, 0xE1,
/* 0x000300F0 */ 0x01, 0x00, 0x50, 0xE1, 0x09, 0x00, 0x00, 0x0A, 0x01, 0x00, 0x52, 0xE1, 0x07, 0x00, 0x00, 0x0A,
/* 0x00030100 */ 0x01, 0x20, 0x42, 0xE0, 0x00, 0x30, 0xD0, 0xE5, 0x01, 0x00, 0x80, 0xE2, 0x00, 0x30, 0xC1, 0xE5,
/* 0x00030110 */ 0x01, 0x10, 0x81, 0xE2, 0x01, 0x20, 0x42, 0xE2, 0x00, 0x00, 0x52, 0xE3, 0xF8, 0xFF, 0xFF, 0x1A,
/* 0x00030120 */ 0x1E, 0xFF, 0x2F, 0xE1, 0x01, 0x00, 0x50, 0xE1, 0x02, 0x00, 0x00, 0x0A, 0x00, 0x20, 0xC0, 0xE5,
/* 0x00030130 */ 0x01, 0x00, 0x80, 0xE2, 0xFA, 0xFF, 0xFF, 0xEA, 0x1E, 0xFF, 0x2F, 0xE1, 0x00, 0x00, 0x03, 0x00,
/* 0x00030140 */ 0x00, 0x00, 0x00, 0x10, 0x34, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00, 0x10, 0xE0, 0x00, 0x00, 0x10,
/* 0x00030150 */ 0x08, 0x1B, 0x03, 0x00, 0xE0, 0x00, 0x00, 0x10, 0xE0, 0x00, 0x00, 0x10, 0xE0, 0x00, 0x00, 0x10,
/* 0x00030160 */ 0xF4, 0x24, 0x00, 0x10, 0xF4, 0x24, 0x00, 0x10, 0x74, 0x25, 0x00, 0x10, 0x04, 0xB0, 0x2D, 0xE5,
/* 0x00030170 */ 0x00, 0xB0, 0x8D, 0xE2, 0x0C, 0xD0, 0x4D, 0xE2, 0x08, 0x00, 0x0B, 0xE5, 0x3C, 0x30, 0x9F, 0xE5,
/* 0x00030180 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5, 0x08, 0x20, 0x1B, 0xE5, 0x03, 0x00, 0x52, 0xE1,
/* 0x00030190 */ 0x06, 0x00, 0x00, 0x1A, 0x28, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5,
/* 0x000301A0 */ 0x01, 0x20, 0x83, 0xE2, 0x18, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x20, 0x83, 0xE5,
/* 0x000301B0 */ 0x00, 0xF0, 0x20, 0xE3, 0x00, 0xD0, 0x8B, 0xE2, 0x04, 0xB0, 0x9D, 0xE4, 0x1E, 0xFF, 0x2F, 0xE1,
/* 0x000301C0 */ 0x48, 0x00, 0x00, 0x00, 0x5C, 0x00, 0x00, 0x00, 0x04, 0xB0, 0x2D, 0xE5, 0x00, 0xB0, 0x8D, 0xE2,
/* 0x000301D0 */ 0x0C, 0xD0, 0x4D, 0xE2, 0x08, 0x00, 0x0B, 0xE5, 0x3C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x000301E0 */ 0x00, 0x30, 0x93, 0xE5, 0x08, 0x20, 0x1B, 0xE5, 0x03, 0x00, 0x52, 0xE1, 0x06, 0x00, 0x00, 0x1A,
/* 0x000301F0 */ 0x28, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5, 0x01, 0x20, 0x83, 0xE2,
/* 0x00030200 */ 0x18, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x20, 0x83, 0xE5, 0x00, 0xF0, 0x20, 0xE3,
/* 0x00030210 */ 0x00, 0xD0, 0x8B, 0xE2, 0x04, 0xB0, 0x9D, 0xE4, 0x1E, 0xFF, 0x2F, 0xE1, 0xC0, 0x00, 0x00, 0x00,
/* 0x00030220 */ 0xA0, 0x00, 0x00, 0x00, 0x04, 0xB0, 0x2D, 0xE5, 0x00, 0xB0, 0x8D, 0xE2, 0x0C, 0xD0, 0x4D, 0xE2,
/* 0x00030230 */ 0x08, 0x00, 0x0B, 0xE5, 0x3C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5,
/* 0x00030240 */ 0x08, 0x20, 0x1B, 0xE5, 0x03, 0x00, 0x52, 0xE1, 0x06, 0x00, 0x00, 0x1A, 0x28, 0x30, 0x9F, 0xE5,
/* 0x00030250 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5, 0x01, 0x20, 0x83, 0xE2, 0x18, 0x30, 0x9F, 0xE5,
/* 0x00030260 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x20, 0x83, 0xE5, 0x00, 0xF0, 0x20, 0xE3, 0x00, 0xD0, 0x8B, 0xE2,
/* 0x00030270 */ 0x04, 0xB0, 0x9D, 0xE4, 0x1E, 0xFF, 0x2F, 0xE1, 0xAC, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00,
/* 0x00030280 */ 0x00, 0x48, 0x2D, 0xE9, 0x04, 0xB0, 0x8D, 0xE2, 0x30, 0xD0, 0x4D, 0xE2, 0x10, 0x00, 0x0B, 0xE5,
/* 0x00030290 */ 0xE8, 0x10, 0xA0, 0xE3, 0x84, 0x36, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x03, 0x00, 0xA0, 0xE1,
/* 0x000302A0 */ 0x03, 0x04, 0x00, 0xEB, 0xE8, 0x10, 0xA0, 0xE3, 0x74, 0x36, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x000302B0 */ 0x03, 0x00, 0xA0, 0xE1, 0xFE, 0x03, 0x00, 0xEB, 0xE8, 0x10, 0xA0, 0xE3, 0x64, 0x36, 0x9F, 0xE5,
/* 0x000302C0 */ 0x03, 0x30, 0x99, 0xE7, 0x03, 0x00, 0xA0, 0xE1, 0xF9, 0x03, 0x00, 0xEB, 0xE8, 0x10, 0xA0, 0xE3,
/* 0x000302D0 */ 0x54, 0x36, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x03, 0x00, 0xA0, 0xE1, 0xF4, 0x03, 0x00, 0xEB,
/* 0x000302E0 */ 0xE8, 0x10, 0xA0, 0xE3, 0x44, 0x36, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x03, 0x00, 0xA0, 0xE1,
/* 0x000302F0 */ 0xEF, 0x03, 0x00, 0xEB, 0xE8, 0x10, 0xA0, 0xE3, 0x34, 0x36, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00030300 */ 0x03, 0x00, 0xA0, 0xE1, 0xEA, 0x03, 0x00, 0xEB, 0xE8, 0x10, 0xA0, 0xE3, 0x24, 0x36, 0x9F, 0xE5,
/* 0x00030310 */ 0x03, 0x30, 0x99, 0xE7, 0x03, 0x00, 0xA0, 0xE1, 0xE5, 0x03, 0x00, 0xEB, 0xE8, 0x10, 0xA0, 0xE3,
/* 0x00030320 */ 0x14, 0x36, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x03, 0x00, 0xA0, 0xE1, 0xE0, 0x03, 0x00, 0xEB,
/* 0x00030330 */ 0x44, 0x10, 0xA0, 0xE3, 0x04, 0x36, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x03, 0x00, 0xA0, 0xE1,
/* 0x00030340 */ 0xDB, 0x03, 0x00, 0xEB, 0x28, 0x10, 0xA0, 0xE3, 0xF4, 0x35, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00030350 */ 0x03, 0x00, 0xA0, 0xE1, 0xD6, 0x03, 0x00, 0xEB, 0x34, 0x10, 0xA0, 0xE3, 0xE4, 0x35, 0x9F, 0xE5,
/* 0x00030360 */ 0x03, 0x30, 0x99, 0xE7, 0x03, 0x00, 0xA0, 0xE1, 0xD1, 0x03, 0x00, 0xEB, 0x30, 0x10, 0xA0, 0xE3,
/* 0x00030370 */ 0xD4, 0x35, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x03, 0x00, 0xA0, 0xE1, 0xCC, 0x03, 0x00, 0xEB,
/* 0x00030380 */ 0x34, 0x10, 0xA0, 0xE3, 0xC4, 0x35, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x03, 0x00, 0xA0, 0xE1,
/* 0x00030390 */ 0xC7, 0x03, 0x00, 0xEB, 0x30, 0x10, 0xA0, 0xE3, 0xB4, 0x35, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x000303A0 */ 0x03, 0x00, 0xA0, 0xE1, 0xC2, 0x03, 0x00, 0xEB, 0xA0, 0x35, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x000303B0 */ 0x00, 0x00, 0x93, 0xE5, 0x34, 0x30, 0xA0, 0xE3, 0x00, 0x30, 0x8D, 0xE5, 0xA0, 0x33, 0x02, 0xE3,
/* 0x000303C0 */ 0x90, 0x25, 0x9F, 0xE5, 0x02, 0x20, 0x99, 0xE7, 0x8C, 0x15, 0x9F, 0xE5, 0x01, 0x10, 0x99, 0xE7,
/* 0x000303D0 */ 0xF3, 0x02, 0x00, 0xEB, 0x74, 0x35, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5,
/* 0x000303E0 */ 0x08, 0x10, 0x4B, 0xE2, 0x00, 0x30, 0xA0, 0xE3, 0x01, 0x2B, 0xA0, 0xE3, 0xD3, 0x02, 0x00, 0xEB,
/* 0x000303F0 */ 0x28, 0x35, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5, 0x08, 0x30, 0x1B, 0xE5,
/* 0x00030400 */ 0xE8, 0x20, 0xA0, 0xE3, 0x18, 0x20, 0x8D, 0xE5, 0x01, 0x20, 0xA0, 0xE3, 0x14, 0x20, 0x8D, 0xE5,
/* 0x00030410 */ 0x00, 0x20, 0xA0, 0xE3, 0x10, 0x20, 0x8D, 0xE5, 0x01, 0x20, 0xA0, 0xE3, 0x0C, 0x20, 0x8D, 0xE5,
/* 0x00030420 */ 0x01, 0x20, 0xA0, 0xE3, 0x08, 0x20, 0x8D, 0xE5, 0x01, 0x2B, 0xA0, 0xE3, 0x04, 0x20, 0x8D, 0xE5,
/* 0x00030430 */ 0x00, 0x30, 0x8D, 0xE5, 0x00, 0x30, 0xA0, 0xE3, 0x20, 0x25, 0x9F, 0xE5, 0x02, 0x20, 0x99, 0xE7,
/* 0x00030440 */ 0x1C, 0x15, 0x9F, 0xE5, 0x01, 0x10, 0x99, 0xE7, 0xEE, 0x04, 0x00, 0xEB, 0xFC, 0x34, 0x9F, 0xE5,
/* 0x00030450 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5, 0x08, 0x10, 0x4B, 0xE2, 0x00, 0x30, 0xA0, 0xE3,
/* 0x00030460 */ 0x01, 0x2B, 0xA0, 0xE3, 0xB5, 0x02, 0x00, 0xEB, 0xB4, 0x34, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00030470 */ 0x00, 0x00, 0x93, 0xE5, 0x08, 0x30, 0x1B, 0xE5, 0xE8, 0x20, 0xA0, 0xE3, 0x18, 0x20, 0x8D, 0xE5,
/* 0x00030480 */ 0x01, 0x20, 0xA0, 0xE3, 0x14, 0x20, 0x8D, 0xE5, 0x04, 0x20, 0xA0, 0xE3, 0x10, 0x20, 0x8D, 0xE5,
/* 0x00030490 */ 0x10, 0x20, 0xA0, 0xE3, 0x0C, 0x20, 0x8D, 0xE5, 0x10, 0x20, 0xA0, 0xE3, 0x08, 0x20, 0x8D, 0xE5,
/* 0x000304A0 */ 0x01, 0x2B, 0xA0, 0xE3, 0x04, 0x20, 0x8D, 0xE5, 0x00, 0x30, 0x8D, 0xE5, 0x01, 0x30, 0xA0, 0xE3,
/* 0x000304B0 */ 0xB0, 0x24, 0x9F, 0xE5, 0x02, 0x20, 0x99, 0xE7, 0xAC, 0x14, 0x9F, 0xE5, 0x01, 0x10, 0x99, 0xE7,
/* 0x000304C0 */ 0xD0, 0x04, 0x00, 0xEB, 0x84, 0x34, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5,
/* 0x000304D0 */ 0x08, 0x10, 0x4B, 0xE2, 0x00, 0x30, 0xA0, 0xE3, 0x01, 0x2B, 0xA0, 0xE3, 0x97, 0x02, 0x00, 0xEB,
/* 0x000304E0 */ 0x40, 0x34, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5, 0x08, 0x30, 0x1B, 0xE5,
/* 0x000304F0 */ 0xE8, 0x20, 0xA0, 0xE3, 0x18, 0x20, 0x8D, 0xE5, 0x01, 0x20, 0xA0, 0xE3, 0x14, 0x20, 0x8D, 0xE5,
/* 0x00030500 */ 0x04, 0x20, 0xA0, 0xE3, 0x10, 0x20, 0x8D, 0xE5, 0x10, 0x20, 0xA0, 0xE3, 0x0C, 0x20, 0x8D, 0xE5,
/* 0x00030510 */ 0x10, 0x20, 0xA0, 0xE3, 0x08, 0x20, 0x8D, 0xE5, 0x01, 0x2B, 0xA0, 0xE3, 0x04, 0x20, 0x8D, 0xE5,
/* 0x00030520 */ 0x00, 0x30, 0x8D, 0xE5, 0x02, 0x30, 0xA0, 0xE3, 0x40, 0x24, 0x9F, 0xE5, 0x02, 0x20, 0x99, 0xE7,
/* 0x00030530 */ 0x3C, 0x14, 0x9F, 0xE5, 0x01, 0x10, 0x99, 0xE7, 0xB2, 0x04, 0x00, 0xEB, 0x0C, 0x34, 0x9F, 0xE5,
/* 0x00030540 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5, 0x08, 0x10, 0x4B, 0xE2, 0x00, 0x30, 0xA0, 0xE3,
/* 0x00030550 */ 0x01, 0x2B, 0xA0, 0xE3, 0x79, 0x02, 0x00, 0xEB, 0xCC, 0x33, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00030560 */ 0x00, 0x00, 0x93, 0xE5, 0x08, 0x30, 0x1B, 0xE5, 0xE8, 0x20, 0xA0, 0xE3, 0x18, 0x20, 0x8D, 0xE5,
/* 0x00030570 */ 0x01, 0x20, 0xA0, 0xE3, 0x14, 0x20, 0x8D, 0xE5, 0x00, 0x20, 0xA0, 0xE3, 0x10, 0x20, 0x8D, 0xE5,
/* 0x00030580 */ 0x08, 0x20, 0xA0, 0xE3, 0x0C, 0x20, 0x8D, 0xE5, 0x08, 0x20, 0xA0, 0xE3, 0x08, 0x20, 0x8D, 0xE5,
/* 0x00030590 */ 0x01, 0x2B, 0xA0, 0xE3, 0x04, 0x20, 0x8D, 0xE5, 0x00, 0x30, 0x8D, 0xE5, 0x03, 0x30, 0xA0, 0xE3,
/* 0x000305A0 */ 0xD0, 0x23, 0x9F, 0xE5, 0x02, 0x20, 0x99, 0xE7, 0xCC, 0x13, 0x9F, 0xE5, 0x01, 0x10, 0x99, 0xE7,
/* 0x000305B0 */ 0x94, 0x04, 0x00, 0xEB, 0x94, 0x33, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5,
/* 0x000305C0 */ 0x08, 0x10, 0x4B, 0xE2, 0x00, 0x30, 0xA0, 0xE3, 0x01, 0x2B, 0xA0, 0xE3, 0x5B, 0x02, 0x00, 0xEB,
/* 0x000305D0 */ 0x58, 0x33, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5, 0x08, 0x30, 0x1B, 0xE5,
/* 0x000305E0 */ 0xE8, 0x20, 0xA0, 0xE3, 0x18, 0x20, 0x8D, 0xE5, 0x01, 0x20, 0xA0, 0xE3, 0x14, 0x20, 0x8D, 0xE5,
/* 0x000305F0 */ 0x00, 0x20, 0xA0, 0xE3, 0x10, 0x20, 0x8D, 0xE5, 0x08, 0x20, 0xA0, 0xE3, 0x0C, 0x20, 0x8D, 0xE5,
/* 0x00030600 */ 0x08, 0x20, 0xA0, 0xE3, 0x08, 0x20, 0x8D, 0xE5, 0x01, 0x2B, 0xA0, 0xE3, 0x04, 0x20, 0x8D, 0xE5,
/* 0x00030610 */ 0x00, 0x30, 0x8D, 0xE5, 0x04, 0x30, 0xA0, 0xE3, 0x58, 0x23, 0x9F, 0xE5, 0x02, 0x20, 0x99, 0xE7,
/* 0x00030620 */ 0x58, 0x13, 0x9F, 0xE5, 0x01, 0x10, 0x99, 0xE7, 0x76, 0x04, 0x00, 0xEB, 0x1C, 0x33, 0x9F, 0xE5,
/* 0x00030630 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5, 0x08, 0x10, 0x4B, 0xE2, 0x00, 0x30, 0xA0, 0xE3,
/* 0x00030640 */ 0x01, 0x2B, 0xA0, 0xE3, 0x3D, 0x02, 0x00, 0xEB, 0xE4, 0x32, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00030650 */ 0x00, 0x00, 0x93, 0xE5, 0x08, 0x30, 0x1B, 0xE5, 0xE8, 0x20, 0xA0, 0xE3, 0x18, 0x20, 0x8D, 0xE5,
/* 0x00030660 */ 0x01, 0x20, 0xA0, 0xE3, 0x14, 0x20, 0x8D, 0xE5, 0x00, 0x20, 0xA0, 0xE3, 0x10, 0x20, 0x8D, 0xE5,
/* 0x00030670 */ 0x04, 0x20, 0xA0, 0xE3, 0x0C, 0x20, 0x8D, 0xE5, 0x04, 0x20, 0xA0, 0xE3, 0x08, 0x20, 0x8D, 0xE5,
/* 0x00030680 */ 0x01, 0x2B, 0xA0, 0xE3, 0x04, 0x20, 0x8D, 0xE5, 0x00, 0x30, 0x8D, 0xE5, 0x05, 0x30, 0xA0, 0xE3,
/* 0x00030690 */ 0xEC, 0x22, 0x9F, 0xE5, 0x02, 0x20, 0x99, 0xE7, 0xE8, 0x12, 0x9F, 0xE5, 0x01, 0x10, 0x99, 0xE7,
/* 0x000306A0 */ 0x58, 0x04, 0x00, 0xEB, 0xA4, 0x32, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5,
/* 0x000306B0 */ 0x08, 0x10, 0x4B, 0xE2, 0x00, 0x30, 0xA0, 0xE3, 0x01, 0x2B, 0xA0, 0xE3, 0x1F, 0x02, 0x00, 0xEB,
/* 0x000306C0 */ 0x70, 0x32, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5, 0x08, 0x30, 0x1B, 0xE5,
/* 0x000306D0 */ 0xE8, 0x20, 0xA0, 0xE3, 0x18, 0x20, 0x8D, 0xE5, 0x01, 0x20, 0xA0, 0xE3, 0x14, 0x20, 0x8D, 0xE5,
/* 0x000306E0 */ 0x00, 0x20, 0xA0, 0xE3, 0x10, 0x20, 0x8D, 0xE5, 0x08, 0x20, 0xA0, 0xE3, 0x0C, 0x20, 0x8D, 0xE5,
/* 0x000306F0 */ 0x08, 0x20, 0xA0, 0xE3, 0x08, 0x20, 0x8D, 0xE5, 0x01, 0x2B, 0xA0, 0xE3, 0x04, 0x20, 0x8D, 0xE5,
/* 0x00030700 */ 0x00, 0x30, 0x8D, 0xE5, 0x06, 0x30, 0xA0, 0xE3, 0x7C, 0x22, 0x9F, 0xE5, 0x02, 0x20, 0x99, 0xE7,
/* 0x00030710 */ 0x78, 0x12, 0x9F, 0xE5, 0x01, 0x10, 0x99, 0xE7, 0x3A, 0x04, 0x00, 0xEB, 0x2C, 0x32, 0x9F, 0xE5,
/* 0x00030720 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5, 0x08, 0x10, 0x4B, 0xE2, 0x00, 0x30, 0xA0, 0xE3,
/* 0x00030730 */ 0x01, 0x2B, 0xA0, 0xE3, 0x01, 0x02, 0x00, 0xEB, 0xFC, 0x31, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00030740 */ 0x00, 0x00, 0x93, 0xE5, 0x08, 0x30, 0x1B, 0xE5, 0xE8, 0x20, 0xA0, 0xE3, 0x18, 0x20, 0x8D, 0xE5,
/* 0x00030750 */ 0x01, 0x20, 0xA0, 0xE3, 0x14, 0x20, 0x8D, 0xE5, 0x00, 0x20, 0xA0, 0xE3, 0x10, 0x20, 0x8D, 0xE5,
/* 0x00030760 */ 0x08, 0x20, 0xA0, 0xE3, 0x0C, 0x20, 0x8D, 0xE5, 0x08, 0x20, 0xA0, 0xE3, 0x08, 0x20, 0x8D, 0xE5,
/* 0x00030770 */ 0x01, 0x2B, 0xA0, 0xE3, 0x04, 0x20, 0x8D, 0xE5, 0x00, 0x30, 0x8D, 0xE5, 0x07, 0x30, 0xA0, 0xE3,
/* 0x00030780 */ 0x04, 0x22, 0x9F, 0xE5, 0x02, 0x20, 0x99, 0xE7, 0x04, 0x12, 0x9F, 0xE5, 0x01, 0x10, 0x99, 0xE7,
/* 0x00030790 */ 0x1C, 0x04, 0x00, 0xEB, 0xB4, 0x31, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5,
/* 0x000307A0 */ 0x08, 0x10, 0x4B, 0xE2, 0x00, 0x30, 0xA0, 0xE3, 0x19, 0x2E, 0xA0, 0xE3, 0xE3, 0x01, 0x00, 0xEB,
/* 0x000307B0 */ 0x88, 0x31, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5, 0x08, 0x30, 0x1B, 0xE5,
/* 0x000307C0 */ 0x44, 0x20, 0xA0, 0xE3, 0x04, 0x20, 0x8D, 0xE5, 0x19, 0x2E, 0xA0, 0xE3, 0x00, 0x20, 0x8D, 0xE5,
/* 0x000307D0 */ 0x01, 0x20, 0xA0, 0xE3, 0xBC, 0x11, 0x9F, 0xE5, 0x01, 0x10, 0x99, 0xE7, 0x60, 0x03, 0x00, 0xEB,
/* 0x000307E0 */ 0x58, 0x31, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x20, 0x93, 0xE5, 0xA8, 0x31, 0x9F, 0xE5,
/* 0x000307F0 */ 0x03, 0x30, 0x99, 0xE7, 0x03, 0x10, 0xA0, 0xE1, 0x02, 0x00, 0xA0, 0xE1, 0x9D, 0x03, 0x00, 0xEB,
/* 0x00030800 */ 0x3C, 0x31, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5, 0x28, 0x30, 0xA0, 0xE3,
/* 0x00030810 */ 0x01, 0x20, 0xA0, 0xE3, 0x84, 0x11, 0x9F, 0xE5, 0x01, 0x10, 0x99, 0xE7, 0xA8, 0x03, 0x00, 0xEB,
/* 0x00030820 */ 0x1C, 0x31, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x20, 0x93, 0xE5, 0x70, 0x31, 0x9F, 0xE5,
/* 0x00030830 */ 0x03, 0x30, 0x99, 0xE7, 0x03, 0x10, 0xA0, 0xE1, 0x02, 0x00, 0xA0, 0xE1, 0xDE, 0x03, 0x00, 0xEB,
/* 0x00030840 */ 0x04, 0x31, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5, 0x30, 0x20, 0xA0, 0xE3,
/* 0x00030850 */ 0x50, 0x31, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x03, 0x10, 0xA0, 0xE1, 0xEB, 0x01, 0x00, 0xEB,
/* 0x00030860 */ 0xE4, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x20, 0x93, 0xE5, 0x38, 0x31, 0x9F, 0xE5,
/* 0x00030870 */ 0x03, 0x30, 0x99, 0xE7, 0x03, 0x10, 0xA0, 0xE1, 0x02, 0x00, 0xA0, 0xE1, 0x26, 0x02, 0x00, 0xEB,
/* 0x00030880 */ 0xC0, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5, 0x34, 0x30, 0xA0, 0xE3,
/* 0x00030890 */ 0x00, 0x20, 0xA0, 0xE3, 0x14, 0x11, 0x9F, 0xE5, 0x01, 0x10, 0x99, 0xE7, 0xF2, 0x02, 0x00, 0xEB,
/* 0x000308A0 */ 0xA8, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5, 0x08, 0x10, 0x4B, 0xE2,
/* 0x000308B0 */ 0x00, 0x30, 0xA0, 0xE3, 0x64, 0x20, 0xA0, 0xE3, 0xA0, 0x01, 0x00, 0xEB, 0x90, 0x30, 0x9F, 0xE5,
/* 0x000308C0 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5, 0x08, 0x30, 0x1B, 0xE5, 0x30, 0x20, 0xA0, 0xE3,
/* 0x000308D0 */ 0x04, 0x20, 0x8D, 0xE5, 0x64, 0x20, 0xA0, 0xE3, 0x00, 0x20, 0x8D, 0xE5, 0x04, 0x20, 0xA0, 0xE3,
/* 0x000308E0 */ 0xCC, 0x10, 0x9F, 0xE5, 0x01, 0x10, 0x99, 0xE7, 0x65, 0x01, 0x00, 0xEB, 0x60, 0x30, 0x9F, 0xE5,
/* 0x000308F0 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5, 0x08, 0x10, 0x4B, 0xE2, 0x00, 0x20, 0xA0, 0xE3,
/* 0x00030900 */ 0x03, 0x00, 0xA0, 0xE1, 0x4A, 0x01, 0x00, 0xEB, 0x08, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1,
/* 0x00030910 */ 0x78, 0x01, 0x00, 0xEB, 0x00, 0xF0, 0x20, 0xE3, 0x04, 0xD0, 0x4B, 0xE2, 0x00, 0x88, 0xBD, 0xE8,
/* 0x00030920 */ 0xA8, 0x00, 0x00, 0x00, 0x7C, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, 0x9C, 0x00, 0x00, 0x00,
/* 0x00030930 */ 0x6C, 0x00, 0x00, 0x00, 0xCC, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x54, 0x00, 0x00, 0x00,
/* 0x00030940 */ 0xAC, 0x00, 0x00, 0x00, 0x48, 0x00, 0x00, 0x00, 0x98, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x00, 0x00,
/* 0x00030950 */ 0x94, 0x00, 0x00, 0x00, 0xC4, 0x00, 0x00, 0x00, 0x8C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 0x00030960 */ 0xD0, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x88, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
/* 0x00030970 */ 0xA4, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
/* 0x00030980 */ 0x14, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0xC8, 0x00, 0x00, 0x00,
/* 0x00030990 */ 0x1C, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00,
/* 0x000309A0 */ 0x28, 0x00, 0x00, 0x00, 0xB8, 0x00, 0x00, 0x00, 0x2C, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00,
/* 0x000309B0 */ 0x30, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0x00, 0x48, 0x2D, 0xE9, 0x04, 0xB0, 0x8D, 0xE2,
/* 0x000309C0 */ 0x10, 0xD0, 0x4D, 0xE2, 0x10, 0x00, 0x0B, 0xE5, 0x09, 0x22, 0xA0, 0xE3, 0xEF, 0x3E, 0x0B, 0xE3,
/* 0x000309D0 */ 0xAD, 0x3E, 0x4D, 0xE3, 0x00, 0x30, 0x82, 0xE5, 0xFC, 0x3F, 0x00, 0xE3, 0x00, 0x30, 0x49, 0xE3,
/* 0x000309E0 */ 0xDD, 0x2A, 0x00, 0xE3, 0xED, 0x2E, 0x4F, 0xE3, 0x00, 0x20, 0x83, 0xE5, 0x01, 0x3A, 0xA0, 0xE3,
/* 0x000309F0 */ 0x00, 0x30, 0x49, 0xE3, 0x01, 0x2A, 0x0B, 0xE3, 0xDC, 0x2E, 0x4F, 0xE3, 0x00, 0x20, 0x83, 0xE5,
/* 0x00030A00 */ 0x5C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5, 0x01, 0x20, 0x83, 0xE2,
/* 0x00030A10 */ 0x4C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x20, 0x83, 0xE5, 0x0A, 0x00, 0xA0, 0xE3,
/* 0x00030A20 */ 0xB1, 0x03, 0x00, 0xEB, 0x3C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5,
/* 0x00030A30 */ 0x00, 0x20, 0xA0, 0xE3, 0x01, 0x10, 0xA0, 0xE3, 0x03, 0x00, 0xA0, 0xE1, 0xA2, 0x01, 0x00, 0xEB,
/* 0x00030A40 */ 0x08, 0x00, 0x0B, 0xE5, 0x08, 0x30, 0x1B, 0xE5, 0x00, 0x00, 0x53, 0xE3, 0x00, 0x00, 0x00, 0x1A,
/* 0x00030A50 */ 0xEA, 0xFF, 0xFF, 0xEA, 0x00, 0xF0, 0x20, 0xE3, 0x00, 0xF0, 0x20, 0xE3, 0x04, 0xD0, 0x4B, 0xE2,
/* 0x00030A60 */ 0x00, 0x88, 0xBD, 0xE8, 0x60, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x48, 0x2D, 0xE9,
/* 0x00030A70 */ 0x04, 0xB0, 0x8D, 0xE2, 0x10, 0xD0, 0x4D, 0xE2, 0x10, 0x00, 0x0B, 0xE5, 0x74, 0x30, 0x9F, 0xE5,
/* 0x00030A80 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5, 0x01, 0x20, 0x83, 0xE2, 0x64, 0x30, 0x9F, 0xE5,
/* 0x00030A90 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x20, 0x83, 0xE5, 0x5C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00030AA0 */ 0x00, 0x00, 0x93, 0xE5, 0x00, 0x20, 0xE0, 0xE3, 0x50, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00030AB0 */ 0x03, 0x10, 0xA0, 0xE1, 0xDB, 0x02, 0x00, 0xEB, 0x08, 0x00, 0x0B, 0xE5, 0x08, 0x30, 0x1B, 0xE5,
/* 0x00030AC0 */ 0x00, 0x00, 0x53, 0xE3, 0x07, 0x00, 0x00, 0x1A, 0x30, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00030AD0 */ 0x00, 0x30, 0x93, 0xE5, 0x01, 0x20, 0x83, 0xE2, 0x20, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00030AE0 */ 0x00, 0x20, 0x83, 0xE5, 0xE4, 0xFF, 0xFF, 0xEA, 0x00, 0xF0, 0x20, 0xE3, 0x00, 0xF0, 0x20, 0xE3,
/* 0x00030AF0 */ 0x04, 0xD0, 0x4B, 0xE2, 0x00, 0x88, 0xBD, 0xE8, 0x84, 0x00, 0x00, 0x00, 0xAC, 0x00, 0x00, 0x00,
/* 0x00030B00 */ 0xB0, 0x00, 0x00, 0x00, 0x00, 0x48, 0x2D, 0xE9, 0x04, 0xB0, 0x8D, 0xE2, 0x10, 0xD0, 0x4D, 0xE2,
/* 0x00030B10 */ 0x10, 0x00, 0x0B, 0xE5, 0x84, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5,
/* 0x00030B20 */ 0x01, 0x20, 0x83, 0xE2, 0x74, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x20, 0x83, 0xE5,
/* 0x00030B30 */ 0x6C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5, 0x0C, 0x10, 0x4B, 0xE2,
/* 0x00030B40 */ 0x00, 0x20, 0xE0, 0xE3, 0x03, 0x00, 0xA0, 0xE1, 0xA2, 0x02, 0x00, 0xEB, 0x08, 0x00, 0x0B, 0xE5,
/* 0x00030B50 */ 0x08, 0x30, 0x1B, 0xE5, 0x00, 0x00, 0x53, 0xE3, 0x0D, 0x00, 0x00, 0x1A, 0x0C, 0x20, 0x1B, 0xE5,
/* 0x00030B60 */ 0x40, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5, 0x03, 0x00, 0x52, 0xE1,
/* 0x00030B70 */ 0x07, 0x00, 0x00, 0x1A, 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5,
/* 0x00030B80 */ 0x01, 0x20, 0x83, 0xE2, 0x1C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x20, 0x83, 0xE5,
/* 0x00030B90 */ 0xDF, 0xFF, 0xFF, 0xEA, 0x00, 0xF0, 0x20, 0xE3, 0x04, 0xD0, 0x4B, 0xE2, 0x00, 0x88, 0xBD, 0xE8,
/* 0x00030BA0 */ 0x68, 0x00, 0x00, 0x00, 0xAC, 0x00, 0x00, 0x00, 0xB4, 0x00, 0x00, 0x00, 0x00, 0x48, 0x2D, 0xE9,
/* 0x00030BB0 */ 0x04, 0xB0, 0x8D, 0xE2, 0x10, 0xD0, 0x4D, 0xE2, 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5,
/* 0x00030BC0 */ 0x03, 0x00, 0x53, 0xE3, 0x07, 0x00, 0x00, 0x1A, 0xA4, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00030BD0 */ 0x00, 0x30, 0x93, 0xE5, 0x01, 0x20, 0x83, 0xE2, 0x94, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00030BE0 */ 0x00, 0x20, 0x83, 0xE5, 0x06, 0x00, 0x00, 0xEA, 0x88, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00030BF0 */ 0x00, 0x30, 0x93, 0xE5, 0x01, 0x20, 0x83, 0xE2, 0x78, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00030C00 */ 0x00, 0x20, 0x83, 0xE5, 0x70, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5,
/* 0x00030C10 */ 0x00, 0x10, 0xE0, 0xE3, 0x03, 0x00, 0xA0, 0xE1, 0xC2, 0x02, 0x00, 0xEB, 0x08, 0x00, 0x0B, 0xE5,
/* 0x00030C20 */ 0x08, 0x30, 0x1B, 0xE5, 0x00, 0x00, 0x53, 0xE3, 0x0B, 0x00, 0x00, 0x1A, 0x02, 0x00, 0xA0, 0xE3,
/* 0x00030C30 */ 0x2D, 0x03, 0x00, 0xEB, 0x40, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5,
/* 0x00030C40 */ 0x03, 0x00, 0xA0, 0xE1, 0xCA, 0x02, 0x00, 0xEB, 0x08, 0x00, 0x0B, 0xE5, 0x08, 0x30, 0x1B, 0xE5,
/* 0x00030C50 */ 0x00, 0x00, 0x53, 0xE3, 0x02, 0x00, 0x00, 0x1A, 0xD7, 0xFF, 0xFF, 0xEA, 0x00, 0xF0, 0x20, 0xE3,
/* 0x00030C60 */ 0x00, 0x00, 0x00, 0xEA, 0x00, 0xF0, 0x20, 0xE3, 0x00, 0xF0, 0x20, 0xE3, 0x04, 0xD0, 0x4B, 0xE2,
/* 0x00030C70 */ 0x00, 0x88, 0xBD, 0xE8, 0x3C, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x48, 0x00, 0x00, 0x00,
/* 0x00030C80 */ 0x00, 0x48, 0x2D, 0xE9, 0x04, 0xB0, 0x8D, 0xE2, 0x18, 0xD0, 0x4D, 0xE2, 0x10, 0x00, 0x0B, 0xE5,
/* 0x00030C90 */ 0x64, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5, 0x01, 0x20, 0x83, 0xE2,
/* 0x00030CA0 */ 0x54, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x20, 0x83, 0xE5, 0x4C, 0x30, 0x9F, 0xE5,
/* 0x00030CB0 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x00, 0x93, 0xE5, 0x0C, 0x30, 0x4B, 0xE2, 0x00, 0x20, 0xE0, 0xE3,
/* 0x00030CC0 */ 0x00, 0x20, 0x8D, 0xE5, 0x01, 0x20, 0xA0, 0xE3, 0x01, 0x10, 0xA0, 0xE3, 0xE3, 0x00, 0x00, 0xEB,
/* 0x00030CD0 */ 0x08, 0x00, 0x0B, 0xE5, 0x08, 0x30, 0x1B, 0xE5, 0x00, 0x00, 0x53, 0xE3, 0x03, 0x00, 0x00, 0x1A,
/* 0x00030CE0 */ 0x0C, 0x30, 0x1B, 0xE5, 0x01, 0x00, 0x53, 0xE3, 0x00, 0x00, 0x00, 0x1A, 0xE7, 0xFF, 0xFF, 0xEA,
/* 0x00030CF0 */ 0x00, 0xF0, 0x20, 0xE3, 0x04, 0xD0, 0x4B, 0xE2, 0x00, 0x88, 0xBD, 0xE8, 0x44, 0x00, 0x00, 0x00,
/* 0x00030D00 */ 0xC0, 0x00, 0x00, 0x00, 0x00, 0x48, 0x2D, 0xE9, 0x04, 0xB0, 0x8D, 0xE2, 0x10, 0xD0, 0x4D, 0xE2,
/* 0x00030D10 */ 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5, 0x06, 0x00, 0x53, 0xE3, 0x07, 0x00, 0x00, 0x1A,
/* 0x00030D20 */ 0x00, 0x31, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5, 0x01, 0x20, 0x83, 0xE2,
/* 0x00030D30 */ 0xF0, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x20, 0x83, 0xE5, 0x06, 0x00, 0x00, 0xEA,
/* 0x00030D40 */ 0xE4, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5, 0x01, 0x20, 0x83, 0xE2,
/* 0x00030D50 */ 0xD4, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x20, 0x83, 0xE5, 0xCC, 0x30, 0x9F, 0xE5,
/* 0x00030D60 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5, 0x00, 0x10, 0xE0, 0xE3, 0x03, 0x00, 0xA0, 0xE1,
/* 0x00030D70 */ 0xD6, 0x01, 0x00, 0xEB, 0x08, 0x00, 0x0B, 0xE5, 0x08, 0x30, 0x1B, 0xE5, 0x00, 0x00, 0x53, 0xE3,
/* 0x00030D80 */ 0x1E, 0x00, 0x00, 0x1A, 0xA4, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5,
/* 0x00030D90 */ 0x00, 0x10, 0xE0, 0xE3, 0x03, 0x00, 0xA0, 0xE1, 0xCC, 0x01, 0x00, 0xEB, 0x08, 0x00, 0x0B, 0xE5,
/* 0x00030DA0 */ 0x08, 0x30, 0x1B, 0xE5, 0x00, 0x00, 0x53, 0xE3, 0x16, 0x00, 0x00, 0x1A, 0x02, 0x00, 0xA0, 0xE3,
/* 0x00030DB0 */ 0xCD, 0x02, 0x00, 0xEB, 0x74, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5,
/* 0x00030DC0 */ 0x03, 0x00, 0xA0, 0xE1, 0xD4, 0x01, 0x00, 0xEB, 0x08, 0x00, 0x0B, 0xE5, 0x08, 0x30, 0x1B, 0xE5,
/* 0x00030DD0 */ 0x00, 0x00, 0x53, 0xE3, 0x0D, 0x00, 0x00, 0x1A, 0x50, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00030DE0 */ 0x00, 0x30, 0x93, 0xE5, 0x03, 0x00, 0xA0, 0xE1, 0xCB, 0x01, 0x00, 0xEB, 0x08, 0x00, 0x0B, 0xE5,
/* 0x00030DF0 */ 0x08, 0x30, 0x1B, 0xE5, 0x00, 0x00, 0x53, 0xE3, 0x06, 0x00, 0x00, 0x1A, 0xC4, 0xFF, 0xFF, 0xEA,
/* 0x00030E00 */ 0x00, 0xF0, 0x20, 0xE3, 0x04, 0x00, 0x00, 0xEA, 0x00, 0xF0, 0x20, 0xE3, 0x02, 0x00, 0x00, 0xEA,
/* 0x00030E10 */ 0x00, 0xF0, 0x20, 0xE3, 0x00, 0x00, 0x00, 0xEA, 0x00, 0xF0, 0x20, 0xE3, 0x00, 0xF0, 0x20, 0xE3,
/* 0x00030E20 */ 0x04, 0xD0, 0x4B, 0xE2, 0x00, 0x88, 0xBD, 0xE8, 0xBC, 0x00, 0x00, 0x00, 0x58, 0x00, 0x00, 0x00,
/* 0x00030E30 */ 0x98, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2, 0x1C, 0xD0, 0x4D, 0xE2,
/* 0x00030E40 */ 0x18, 0x00, 0x0B, 0xE5, 0x1C, 0x10, 0x0B, 0xE5, 0x20, 0x20, 0x0B, 0xE5, 0x2C, 0x30, 0x9F, 0xE5,
/* 0x00030E50 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5, 0x18, 0x10, 0x1B, 0xE5, 0x1C, 0x20, 0x1B, 0xE5,
/* 0x00030E60 */ 0x20, 0x30, 0x1B, 0xE5, 0x01, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x0B, 0xE5,
/* 0x00030E70 */ 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2, 0x10, 0x88, 0xBD, 0xE8,
/* 0x00030E80 */ 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2, 0x2C, 0xD0, 0x4D, 0xE2,
/* 0x00030E90 */ 0x28, 0x00, 0x0B, 0xE5, 0x2C, 0x10, 0x0B, 0xE5, 0x30, 0x20, 0x0B, 0xE5, 0x34, 0x30, 0x0B, 0xE5,
/* 0x00030EA0 */ 0x30, 0x30, 0x1B, 0xE5, 0x20, 0x30, 0x0B, 0xE5, 0x34, 0x30, 0x1B, 0xE5, 0x1C, 0x30, 0x0B, 0xE5,
/* 0x00030EB0 */ 0x04, 0x30, 0x9B, 0xE5, 0x18, 0x30, 0x0B, 0xE5, 0x08, 0x30, 0x9B, 0xE5, 0x14, 0x30, 0x0B, 0xE5,
/* 0x00030EC0 */ 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5, 0x28, 0x10, 0x1B, 0xE5,
/* 0x00030ED0 */ 0x2C, 0x20, 0x1B, 0xE5, 0x20, 0x30, 0x4B, 0xE2, 0x02, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1,
/* 0x00030EE0 */ 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2,
/* 0x00030EF0 */ 0x10, 0x88, 0xBD, 0xE8, 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2,
/* 0x00030F00 */ 0x14, 0xD0, 0x4D, 0xE2, 0x18, 0x00, 0x0B, 0xE5, 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00030F10 */ 0x00, 0x40, 0x93, 0xE5, 0x18, 0x10, 0x1B, 0xE5, 0x00, 0x30, 0xA0, 0xE3, 0x00, 0x20, 0xA0, 0xE3,
/* 0x00030F20 */ 0x08, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5,
/* 0x00030F30 */ 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2, 0x10, 0x88, 0xBD, 0xE8, 0x4C, 0x00, 0x00, 0x00,
/* 0x00030F40 */ 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2, 0x24, 0xD0, 0x4D, 0xE2, 0x20, 0x00, 0x0B, 0xE5,
/* 0x00030F50 */ 0x24, 0x10, 0x0B, 0xE5, 0x28, 0x20, 0x0B, 0xE5, 0x2C, 0x30, 0x0B, 0xE5, 0x28, 0x30, 0x1B, 0xE5,
/* 0x00030F60 */ 0x18, 0x30, 0x0B, 0xE5, 0x2C, 0x30, 0x1B, 0xE5, 0x14, 0x30, 0x0B, 0xE5, 0x2C, 0x30, 0x9F, 0xE5,
/* 0x00030F70 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5, 0x20, 0x10, 0x1B, 0xE5, 0x24, 0x20, 0x1B, 0xE5,
/* 0x00030F80 */ 0x18, 0x30, 0x4B, 0xE2, 0x09, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x0B, 0xE5,
/* 0x00030F90 */ 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2, 0x10, 0x88, 0xBD, 0xE8,
/* 0x00030FA0 */ 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2, 0x24, 0xD0, 0x4D, 0xE2,
/* 0x00030FB0 */ 0x20, 0x00, 0x0B, 0xE5, 0x24, 0x10, 0x0B, 0xE5, 0x28, 0x20, 0x0B, 0xE5, 0x2C, 0x30, 0x0B, 0xE5,
/* 0x00030FC0 */ 0x28, 0x30, 0x1B, 0xE5, 0x1C, 0x30, 0x0B, 0xE5, 0x2C, 0x30, 0x1B, 0xE5, 0x18, 0x30, 0x0B, 0xE5,
/* 0x00030FD0 */ 0x04, 0x30, 0x9B, 0xE5, 0x14, 0x30, 0x0B, 0xE5, 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00030FE0 */ 0x00, 0x40, 0x93, 0xE5, 0x20, 0x10, 0x1B, 0xE5, 0x24, 0x20, 0x1B, 0xE5, 0x1C, 0x30, 0x4B, 0xE2,
/* 0x00030FF0 */ 0x0A, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5,
/* 0x00031000 */ 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2, 0x10, 0x88, 0xBD, 0xE8, 0x4C, 0x00, 0x00, 0x00,
/* 0x00031010 */ 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2, 0x1C, 0xD0, 0x4D, 0xE2, 0x18, 0x00, 0x0B, 0xE5,
/* 0x00031020 */ 0x1C, 0x10, 0x0B, 0xE5, 0x20, 0x20, 0x0B, 0xE5, 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00031030 */ 0x00, 0x40, 0x93, 0xE5, 0x18, 0x10, 0x1B, 0xE5, 0x1C, 0x20, 0x1B, 0xE5, 0x20, 0x30, 0x1B, 0xE5,
/* 0x00031040 */ 0x11, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5,
/* 0x00031050 */ 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2, 0x10, 0x88, 0xBD, 0xE8, 0x4C, 0x00, 0x00, 0x00,
/* 0x00031060 */ 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2, 0x24, 0xD0, 0x4D, 0xE2, 0x20, 0x00, 0x0B, 0xE5,
/* 0x00031070 */ 0x24, 0x10, 0x0B, 0xE5, 0x28, 0x20, 0x0B, 0xE5, 0x2C, 0x30, 0x0B, 0xE5, 0x28, 0x30, 0x1B, 0xE5,
/* 0x00031080 */ 0x1C, 0x30, 0x0B, 0xE5, 0x2C, 0x30, 0x1B, 0xE5, 0x18, 0x30, 0x0B, 0xE5, 0x04, 0x30, 0x9B, 0xE5,
/* 0x00031090 */ 0x14, 0x30, 0x0B, 0xE5, 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5,
/* 0x000310A0 */ 0x20, 0x10, 0x1B, 0xE5, 0x1C, 0x30, 0x4B, 0xE2, 0x24, 0x20, 0x1B, 0xE5, 0x13, 0x00, 0xA0, 0xE3,
/* 0x000310B0 */ 0x34, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1,
/* 0x000310C0 */ 0x08, 0xD0, 0x4B, 0xE2, 0x10, 0x88, 0xBD, 0xE8, 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9,
/* 0x000310D0 */ 0x08, 0xB0, 0x8D, 0xE2, 0x1C, 0xD0, 0x4D, 0xE2, 0x18, 0x00, 0x0B, 0xE5, 0x1C, 0x10, 0x0B, 0xE5,
/* 0x000310E0 */ 0x20, 0x20, 0x0B, 0xE5, 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5,
/* 0x000310F0 */ 0x18, 0x10, 0x1B, 0xE5, 0x20, 0x30, 0x1B, 0xE5, 0x1C, 0x20, 0x1B, 0xE5, 0x17, 0x00, 0xA0, 0xE3,
/* 0x00031100 */ 0x34, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1,
/* 0x00031110 */ 0x08, 0xD0, 0x4B, 0xE2, 0x10, 0x88, 0xBD, 0xE8, 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9,
/* 0x00031120 */ 0x08, 0xB0, 0x8D, 0xE2, 0x14, 0xD0, 0x4D, 0xE2, 0x18, 0x00, 0x0B, 0xE5, 0x1C, 0x10, 0x0B, 0xE5,
/* 0x00031130 */ 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5, 0x18, 0x10, 0x1B, 0xE5,
/* 0x00031140 */ 0x1C, 0x20, 0x1B, 0xE5, 0x00, 0x30, 0xA0, 0xE3, 0x18, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1,
/* 0x00031150 */ 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2,
/* 0x00031160 */ 0x10, 0x88, 0xBD, 0xE8, 0x4C, 0x00, 0x00, 0x00, 0x00, 0x48, 0x2D, 0xE9, 0x04, 0xB0, 0x8D, 0xE2,
/* 0x00031170 */ 0x60, 0xD0, 0x4D, 0xE2, 0x60, 0x00, 0x0B, 0xE5, 0x30, 0x31, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x00031180 */ 0x00, 0x30, 0x93, 0xE5, 0x24, 0x30, 0x93, 0xE5, 0x0C, 0x30, 0x0B, 0xE5, 0x58, 0x30, 0x4B, 0xE2,
/* 0x00031190 */ 0x00, 0x20, 0xE0, 0xE3, 0x03, 0x10, 0xA0, 0xE1, 0x0C, 0x00, 0x1B, 0xE5, 0x0D, 0x01, 0x00, 0xEB,
/* 0x000311A0 */ 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5, 0x00, 0x00, 0x53, 0xE3, 0x3B, 0x00, 0x00, 0x1A,
/* 0x000311B0 */ 0x54, 0x30, 0x1B, 0xE5, 0x08, 0x30, 0x0B, 0xE5, 0x34, 0x00, 0x00, 0xEA, 0x08, 0x30, 0x1B, 0xE5,
/* 0x000311C0 */ 0x01, 0x30, 0x43, 0xE2, 0x08, 0x30, 0x0B, 0xE5, 0x58, 0x30, 0x1B, 0xE5, 0x04, 0x00, 0x53, 0xE3,
/* 0x000311D0 */ 0x03, 0xF1, 0x8F, 0x90, 0x2C, 0x00, 0x00, 0xEA, 0x03, 0x00, 0x00, 0xEA, 0x09, 0x00, 0x00, 0xEA,
/* 0x000311E0 */ 0x10, 0x00, 0x00, 0xEA, 0x17, 0x00, 0x00, 0xEA, 0x1E, 0x00, 0x00, 0xEA, 0x50, 0x30, 0x1B, 0xE5,
/* 0x000311F0 */ 0x24, 0x30, 0x0B, 0xE5, 0x4C, 0x20, 0x1B, 0xE5, 0x24, 0x30, 0x1B, 0xE5, 0x02, 0x00, 0xA0, 0xE1,
/* 0x00031200 */ 0x33, 0xFF, 0x2F, 0xE1, 0x21, 0x00, 0x00, 0xEA, 0x50, 0x30, 0x1B, 0xE5, 0x20, 0x30, 0x0B, 0xE5,
/* 0x00031210 */ 0x4C, 0x30, 0x1B, 0xE5, 0x03, 0x20, 0xA0, 0xE1, 0x20, 0x30, 0x1B, 0xE5, 0x02, 0x00, 0xA0, 0xE1,
/* 0x00031220 */ 0x33, 0xFF, 0x2F, 0xE1, 0x19, 0x00, 0x00, 0xEA, 0x50, 0x30, 0x1B, 0xE5, 0x1C, 0x30, 0x0B, 0xE5,
/* 0x00031230 */ 0x4C, 0x30, 0x1B, 0xE5, 0x03, 0x20, 0xA0, 0xE1, 0x1C, 0x30, 0x1B, 0xE5, 0x02, 0x00, 0xA0, 0xE1,
/* 0x00031240 */ 0x33, 0xFF, 0x2F, 0xE1, 0x11, 0x00, 0x00, 0xEA, 0x50, 0x30, 0x1B, 0xE5, 0x18, 0x30, 0x0B, 0xE5,
/* 0x00031250 */ 0x4C, 0x30, 0x1B, 0xE5, 0x03, 0x20, 0xA0, 0xE1, 0x18, 0x30, 0x1B, 0xE5, 0x02, 0x00, 0xA0, 0xE1,
/* 0x00031260 */ 0x33, 0xFF, 0x2F, 0xE1, 0x09, 0x00, 0x00, 0xEA, 0x50, 0x30, 0x1B, 0xE5, 0x14, 0x30, 0x0B, 0xE5,
/* 0x00031270 */ 0x4C, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1, 0x48, 0x20, 0x1B, 0xE5, 0x14, 0x30, 0x1B, 0xE5,
/* 0x00031280 */ 0x02, 0x10, 0xA0, 0xE1, 0x33, 0xFF, 0x2F, 0xE1, 0x00, 0x00, 0x00, 0xEA, 0x00, 0xF0, 0x20, 0xE3,
/* 0x00031290 */ 0x08, 0x30, 0x1B, 0xE5, 0x00, 0x00, 0x53, 0xE3, 0xC7, 0xFF, 0xFF, 0x1A, 0xBA, 0xFF, 0xFF, 0xEA,
/* 0x000312A0 */ 0x00, 0xF0, 0x20, 0xE3, 0x00, 0xF0, 0x20, 0xE3, 0x04, 0xD0, 0x4B, 0xE2, 0x00, 0x88, 0xBD, 0xE8,
/* 0x000312B0 */ 0x74, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2, 0x14, 0xD0, 0x4D, 0xE2,
/* 0x000312C0 */ 0x18, 0x00, 0x0B, 0xE5, 0x1C, 0x10, 0x0B, 0xE5, 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x000312D0 */ 0x00, 0x40, 0x93, 0xE5, 0x18, 0x10, 0x1B, 0xE5, 0x00, 0x30, 0xA0, 0xE3, 0x1C, 0x20, 0x1B, 0xE5,
/* 0x000312E0 */ 0x5F, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5,
/* 0x000312F0 */ 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2, 0x10, 0x88, 0xBD, 0xE8, 0x4C, 0x00, 0x00, 0x00,
/* 0x00031300 */ 0x00, 0x48, 0x2D, 0xE9, 0x04, 0xB0, 0x8D, 0xE2, 0x10, 0xD0, 0x4D, 0xE2, 0x10, 0x00, 0x0B, 0xE5,
/* 0x00031310 */ 0x14, 0x10, 0x0B, 0xE5, 0x14, 0x30, 0x1B, 0xE5, 0x1C, 0x30, 0x93, 0xE5, 0x00, 0x00, 0x53, 0xE3,
/* 0x00031320 */ 0x16, 0x00, 0x00, 0x0A, 0x14, 0x30, 0x1B, 0xE5, 0x0C, 0x30, 0x93, 0xE5, 0x03, 0x00, 0xA0, 0xE1,
/* 0x00031330 */ 0x32, 0xFB, 0xFF, 0xEB, 0xE0, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x14, 0x20, 0x1B, 0xE5,
/* 0x00031340 */ 0x00, 0x20, 0x83, 0xE5, 0x14, 0x30, 0x1B, 0xE5, 0x2C, 0x20, 0x93, 0xE5, 0xCC, 0x30, 0x9F, 0xE5,
/* 0x00031350 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x20, 0x83, 0xE5, 0x00, 0xF0, 0x20, 0xE3, 0xBC, 0x30, 0x9F, 0xE5,
/* 0x00031360 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x30, 0x93, 0xE5, 0x00, 0x00, 0x53, 0xE3, 0xFA, 0xFF, 0xFF, 0x0A,
/* 0x00031370 */ 0x14, 0x30, 0x1B, 0xE5, 0x20, 0x30, 0x93, 0xE5, 0x03, 0x00, 0xA0, 0xE1, 0x48, 0x01, 0x00, 0xEB,
/* 0x00031380 */ 0x00, 0x30, 0x0F, 0xE1, 0x08, 0x30, 0x0B, 0xE5, 0x80, 0x00, 0x0C, 0xF1, 0x14, 0x30, 0x1B, 0xE5,
/* 0x00031390 */ 0x18, 0x30, 0x93, 0xE5, 0x0C, 0x30, 0x0B, 0xE5, 0x08, 0x30, 0x1B, 0xE5, 0x80, 0x30, 0x03, 0xE2,
/* 0x000313A0 */ 0x00, 0x00, 0x53, 0xE3, 0x00, 0x00, 0x00, 0x1A, 0x80, 0x00, 0x08, 0xF1, 0x0C, 0x30, 0x1B, 0xE5,
/* 0x000313B0 */ 0x00, 0x00, 0x53, 0xE3, 0x03, 0x00, 0x00, 0x0A, 0x0C, 0x30, 0x1B, 0xE5, 0x00, 0x10, 0xA0, 0xE3,
/* 0x000313C0 */ 0x10, 0x00, 0x1B, 0xE5, 0x33, 0xFF, 0x2F, 0xE1, 0x14, 0x30, 0x1B, 0xE5, 0x10, 0x30, 0x93, 0xE5,
/* 0x000313D0 */ 0x14, 0x20, 0x1B, 0xE5, 0x14, 0x20, 0x92, 0xE5, 0x02, 0x00, 0xA0, 0xE1, 0x33, 0xFF, 0x2F, 0xE1,
/* 0x000313E0 */ 0x14, 0x30, 0x1B, 0xE5, 0x18, 0x30, 0x93, 0xE5, 0x0C, 0x30, 0x0B, 0xE5, 0x0C, 0x30, 0x1B, 0xE5,
/* 0x000313F0 */ 0x00, 0x00, 0x53, 0xE3, 0x03, 0x00, 0x00, 0x0A, 0x0C, 0x30, 0x1B, 0xE5, 0x01, 0x10, 0xA0, 0xE3,
/* 0x00031400 */ 0x10, 0x00, 0x1B, 0xE5, 0x33, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x1B, 0xE5, 0x04, 0x00, 0x00, 0xEB,
/* 0x00031410 */ 0x00, 0xF0, 0x20, 0xE3, 0x04, 0xD0, 0x4B, 0xE2, 0x00, 0x88, 0xBD, 0xE8, 0x74, 0x00, 0x00, 0x00,
/* 0x00031420 */ 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2, 0x14, 0xD0, 0x4D, 0xE2,
/* 0x00031430 */ 0x18, 0x00, 0x0B, 0xE5, 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5,
/* 0x00031440 */ 0x18, 0x10, 0x1B, 0xE5, 0x00, 0x30, 0xA0, 0xE3, 0x00, 0x20, 0xA0, 0xE3, 0x5C, 0x00, 0xA0, 0xE3,
/* 0x00031450 */ 0x34, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1,
/* 0x00031460 */ 0x08, 0xD0, 0x4B, 0xE2, 0x10, 0x88, 0xBD, 0xE8, 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9,
/* 0x00031470 */ 0x08, 0xB0, 0x8D, 0xE2, 0x24, 0xD0, 0x4D, 0xE2, 0x20, 0x00, 0x0B, 0xE5, 0x24, 0x10, 0x0B, 0xE5,
/* 0x00031480 */ 0x28, 0x20, 0x0B, 0xE5, 0x2C, 0x30, 0x0B, 0xE5, 0x28, 0x30, 0x1B, 0xE5, 0x18, 0x30, 0x0B, 0xE5,
/* 0x00031490 */ 0x2C, 0x30, 0x1B, 0xE5, 0x14, 0x30, 0x0B, 0xE5, 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7,
/* 0x000314A0 */ 0x00, 0x40, 0x93, 0xE5, 0x20, 0x10, 0x1B, 0xE5, 0x24, 0x20, 0x1B, 0xE5, 0x18, 0x30, 0x4B, 0xE2,
/* 0x000314B0 */ 0x1A, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5,
/* 0x000314C0 */ 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2, 0x10, 0x88, 0xBD, 0xE8, 0x4C, 0x00, 0x00, 0x00,
/* 0x000314D0 */ 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2, 0x14, 0xD0, 0x4D, 0xE2, 0x18, 0x00, 0x0B, 0xE5,
/* 0x000314E0 */ 0x1C, 0x10, 0x0B, 0xE5, 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5,
/* 0x000314F0 */ 0x18, 0x10, 0x1B, 0xE5, 0x00, 0x30, 0xA0, 0xE3, 0x1C, 0x20, 0x1B, 0xE5, 0x1C, 0x00, 0xA0, 0xE3,
/* 0x00031500 */ 0x34, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1,
/* 0x00031510 */ 0x08, 0xD0, 0x4B, 0xE2, 0x10, 0x88, 0xBD, 0xE8, 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9,
/* 0x00031520 */ 0x08, 0xB0, 0x8D, 0xE2, 0x14, 0xD0, 0x4D, 0xE2, 0x18, 0x00, 0x0B, 0xE5, 0x2C, 0x30, 0x9F, 0xE5,
/* 0x00031530 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5, 0x18, 0x10, 0x1B, 0xE5, 0x00, 0x30, 0xA0, 0xE3,
/* 0x00031540 */ 0x00, 0x20, 0xA0, 0xE3, 0x21, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x0B, 0xE5,
/* 0x00031550 */ 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2, 0x10, 0x88, 0xBD, 0xE8,
/* 0x00031560 */ 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2, 0x2C, 0xD0, 0x4D, 0xE2,
/* 0x00031570 */ 0x28, 0x00, 0x0B, 0xE5, 0x2C, 0x10, 0x0B, 0xE5, 0x30, 0x20, 0x0B, 0xE5, 0x34, 0x30, 0x0B, 0xE5,
/* 0x00031580 */ 0x30, 0x30, 0x1B, 0xE5, 0x20, 0x30, 0x0B, 0xE5, 0x34, 0x30, 0x1B, 0xE5, 0x1C, 0x30, 0x0B, 0xE5,
/* 0x00031590 */ 0x04, 0x30, 0x9B, 0xE5, 0x18, 0x30, 0x0B, 0xE5, 0x08, 0x30, 0x9B, 0xE5, 0x14, 0x30, 0x0B, 0xE5,
/* 0x000315A0 */ 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5, 0x28, 0x10, 0x1B, 0xE5,
/* 0x000315B0 */ 0x2C, 0x20, 0x1B, 0xE5, 0x20, 0x30, 0x4B, 0xE2, 0x22, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1,
/* 0x000315C0 */ 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2,
/* 0x000315D0 */ 0x10, 0x88, 0xBD, 0xE8, 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2,
/* 0x000315E0 */ 0x1C, 0xD0, 0x4D, 0xE2, 0x18, 0x00, 0x0B, 0xE5, 0x1C, 0x10, 0x0B, 0xE5, 0x20, 0x20, 0x0B, 0xE5,
/* 0x000315F0 */ 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5, 0x18, 0x10, 0x1B, 0xE5,
/* 0x00031600 */ 0x1C, 0x20, 0x1B, 0xE5, 0x20, 0x30, 0x1B, 0xE5, 0x2A, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1,
/* 0x00031610 */ 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2,
/* 0x00031620 */ 0x10, 0x88, 0xBD, 0xE8, 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2,
/* 0x00031630 */ 0x1C, 0xD0, 0x4D, 0xE2, 0x18, 0x00, 0x0B, 0xE5, 0x1C, 0x10, 0x0B, 0xE5, 0x20, 0x20, 0x0B, 0xE5,
/* 0x00031640 */ 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5, 0x18, 0x10, 0x1B, 0xE5,
/* 0x00031650 */ 0x1C, 0x20, 0x1B, 0xE5, 0x20, 0x30, 0x1B, 0xE5, 0x2B, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1,
/* 0x00031660 */ 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2,
/* 0x00031670 */ 0x10, 0x88, 0xBD, 0xE8, 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2,
/* 0x00031680 */ 0x14, 0xD0, 0x4D, 0xE2, 0x18, 0x00, 0x0B, 0xE5, 0x1C, 0x10, 0x0B, 0xE5, 0x2C, 0x30, 0x9F, 0xE5,
/* 0x00031690 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5, 0x18, 0x10, 0x1B, 0xE5, 0x1C, 0x20, 0x1B, 0xE5,
/* 0x000316A0 */ 0x00, 0x30, 0xA0, 0xE3, 0x2C, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x0B, 0xE5,
/* 0x000316B0 */ 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2, 0x10, 0x88, 0xBD, 0xE8,
/* 0x000316C0 */ 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2, 0x24, 0xD0, 0x4D, 0xE2,
/* 0x000316D0 */ 0x20, 0x00, 0x0B, 0xE5, 0x24, 0x10, 0x0B, 0xE5, 0x28, 0x20, 0x0B, 0xE5, 0x2C, 0x30, 0x0B, 0xE5,
/* 0x000316E0 */ 0x28, 0x30, 0x1B, 0xE5, 0x18, 0x30, 0x0B, 0xE5, 0x2C, 0x30, 0x1B, 0xE5, 0x14, 0x30, 0x0B, 0xE5,
/* 0x000316F0 */ 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5, 0x20, 0x10, 0x1B, 0xE5,
/* 0x00031700 */ 0x24, 0x20, 0x1B, 0xE5, 0x18, 0x30, 0x4B, 0xE2, 0x2E, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1,
/* 0x00031710 */ 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2,
/* 0x00031720 */ 0x10, 0x88, 0xBD, 0xE8, 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2,
/* 0x00031730 */ 0x14, 0xD0, 0x4D, 0xE2, 0x18, 0x00, 0x0B, 0xE5, 0x1C, 0x10, 0x0B, 0xE5, 0x2C, 0x30, 0x9F, 0xE5,
/* 0x00031740 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5, 0x18, 0x10, 0x1B, 0xE5, 0x00, 0x30, 0xA0, 0xE3,
/* 0x00031750 */ 0x1C, 0x20, 0x1B, 0xE5, 0x30, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x0B, 0xE5,
/* 0x00031760 */ 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2, 0x10, 0x88, 0xBD, 0xE8,
/* 0x00031770 */ 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2, 0x14, 0xD0, 0x4D, 0xE2,
/* 0x00031780 */ 0x18, 0x00, 0x0B, 0xE5, 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5,
/* 0x00031790 */ 0x18, 0x10, 0x1B, 0xE5, 0x00, 0x30, 0xA0, 0xE3, 0x00, 0x20, 0xA0, 0xE3, 0x35, 0x00, 0xA0, 0xE3,
/* 0x000317A0 */ 0x34, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1,
/* 0x000317B0 */ 0x08, 0xD0, 0x4B, 0xE2, 0x10, 0x88, 0xBD, 0xE8, 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9,
/* 0x000317C0 */ 0x08, 0xB0, 0x8D, 0xE2, 0x14, 0xD0, 0x4D, 0xE2, 0x18, 0x00, 0x0B, 0xE5, 0x1C, 0x10, 0x0B, 0xE5,
/* 0x000317D0 */ 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5, 0x18, 0x10, 0x1B, 0xE5,
/* 0x000317E0 */ 0x1C, 0x20, 0x1B, 0xE5, 0x00, 0x30, 0xA0, 0xE3, 0x36, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1,
/* 0x000317F0 */ 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2,
/* 0x00031800 */ 0x10, 0x88, 0xBD, 0xE8, 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2,
/* 0x00031810 */ 0x3C, 0xD0, 0x4D, 0xE2, 0x38, 0x00, 0x0B, 0xE5, 0x3C, 0x10, 0x0B, 0xE5, 0x40, 0x20, 0x0B, 0xE5,
/* 0x00031820 */ 0x44, 0x30, 0x0B, 0xE5, 0x40, 0x30, 0x1B, 0xE5, 0x34, 0x30, 0x0B, 0xE5, 0x44, 0x30, 0x1B, 0xE5,
/* 0x00031830 */ 0x30, 0x30, 0x0B, 0xE5, 0x04, 0x30, 0x9B, 0xE5, 0x2C, 0x30, 0x0B, 0xE5, 0x08, 0x30, 0x9B, 0xE5,
/* 0x00031840 */ 0x28, 0x30, 0x0B, 0xE5, 0x0C, 0x30, 0x9B, 0xE5, 0x24, 0x30, 0x0B, 0xE5, 0x10, 0x30, 0x9B, 0xE5,
/* 0x00031850 */ 0x20, 0x30, 0x0B, 0xE5, 0x14, 0x30, 0x9B, 0xE5, 0x1C, 0x30, 0x0B, 0xE5, 0x18, 0x30, 0x9B, 0xE5,
/* 0x00031860 */ 0x18, 0x30, 0x0B, 0xE5, 0x1C, 0x30, 0x9B, 0xE5, 0x14, 0x30, 0x0B, 0xE5, 0x2C, 0x30, 0x9F, 0xE5,
/* 0x00031870 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5, 0x38, 0x10, 0x1B, 0xE5, 0x3C, 0x20, 0x1B, 0xE5,
/* 0x00031880 */ 0x34, 0x30, 0x4B, 0xE2, 0x37, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x0B, 0xE5,
/* 0x00031890 */ 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2, 0x10, 0x88, 0xBD, 0xE8,
/* 0x000318A0 */ 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9, 0x08, 0xB0, 0x8D, 0xE2, 0x14, 0xD0, 0x4D, 0xE2,
/* 0x000318B0 */ 0x18, 0x00, 0x0B, 0xE5, 0x2C, 0x30, 0x9F, 0xE5, 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5,
/* 0x000318C0 */ 0x18, 0x10, 0x1B, 0xE5, 0x00, 0x30, 0xA0, 0xE3, 0x00, 0x20, 0xA0, 0xE3, 0x42, 0x00, 0xA0, 0xE3,
/* 0x000318D0 */ 0x34, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x0B, 0xE5, 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1,
/* 0x000318E0 */ 0x08, 0xD0, 0x4B, 0xE2, 0x10, 0x88, 0xBD, 0xE8, 0x4C, 0x00, 0x00, 0x00, 0x10, 0x48, 0x2D, 0xE9,
/* 0x000318F0 */ 0x08, 0xB0, 0x8D, 0xE2, 0x14, 0xD0, 0x4D, 0xE2, 0x18, 0x00, 0x0B, 0xE5, 0x2C, 0x30, 0x9F, 0xE5,
/* 0x00031900 */ 0x03, 0x30, 0x99, 0xE7, 0x00, 0x40, 0x93, 0xE5, 0x00, 0x30, 0xA0, 0xE3, 0x00, 0x20, 0xA0, 0xE3,
/* 0x00031910 */ 0x18, 0x10, 0x1B, 0xE5, 0x43, 0x00, 0xA0, 0xE3, 0x34, 0xFF, 0x2F, 0xE1, 0x10, 0x00, 0x0B, 0xE5,
/* 0x00031920 */ 0x10, 0x30, 0x1B, 0xE5, 0x03, 0x00, 0xA0, 0xE1, 0x08, 0xD0, 0x4B, 0xE2, 0x10, 0x88, 0xBD, 0xE8,
/* 0x00031930 */ 0x4C, 0x00, 0x00, 0x00, 0x14, 0x1A, 0x03, 0x00, 0x28, 0x1A, 0x03, 0x00, 0x38, 0x1A, 0x03, 0x00, /* SECTION: .got */
/* 0x00031940 */ 0x48, 0x1A, 0x03, 0x00, 0x58, 0x1A, 0x03, 0x00, 0x68, 0x1A, 0x03, 0x00, 0x78, 0x1A, 0x03, 0x00,
/* 0x00031950 */ 0x88, 0x1A, 0x03, 0x00, 0x98, 0x1A, 0x03, 0x00, 0xA8, 0x1A, 0x03, 0x00, 0xB8, 0x1A, 0x03, 0x00,
/* 0x00031960 */ 0xCC, 0x1A, 0x03, 0x00, 0xE4, 0x1A, 0x03, 0x00, 0xF4, 0x1A, 0x03, 0x00, 0x88, 0x24, 0x00, 0x10,
/* 0x00031970 */ 0xCC, 0x24, 0x00, 0x10, 0x80, 0x0C, 0x03, 0x00, 0xD4, 0x24, 0x00, 0x10, 0xA4, 0x24, 0x00, 0x10,
/* 0x00031980 */ 0xF0, 0x24, 0x00, 0x10, 0xC8, 0x01, 0x03, 0x00, 0x9C, 0x24, 0x00, 0x10, 0xDC, 0x24, 0x00, 0x10,
/* 0x00031990 */ 0xE0, 0x24, 0x00, 0x10, 0xB8, 0x24, 0x00, 0x10, 0xE8, 0x24, 0x00, 0x10, 0xC4, 0x24, 0x00, 0x10,
/* 0x000319A0 */ 0x90, 0x24, 0x00, 0x10, 0xAC, 0x0B, 0x03, 0x00, 0xEC, 0x24, 0x00, 0x10, 0xD0, 0x24, 0x00, 0x10,
/* 0x000319B0 */ 0x84, 0x24, 0x00, 0x10, 0x98, 0x24, 0x00, 0x10, 0xBC, 0x24, 0x00, 0x10, 0x6C, 0x0A, 0x03, 0x00,
/* 0x000319C0 */ 0xE0, 0x00, 0x00, 0x10, 0x24, 0x02, 0x03, 0x00, 0xB0, 0x24, 0x00, 0x10, 0xA8, 0x24, 0x00, 0x10,
/* 0x000319D0 */ 0x8C, 0x24, 0x00, 0x10, 0xE4, 0x24, 0x00, 0x10, 0x04, 0x0B, 0x03, 0x00, 0x80, 0x24, 0x00, 0x10,
/* 0x000319E0 */ 0xA0, 0x24, 0x00, 0x10, 0xC0, 0x24, 0x00, 0x10, 0xC8, 0x24, 0x00, 0x10, 0x6C, 0x01, 0x03, 0x00,
/* 0x000319F0 */ 0xD8, 0x24, 0x00, 0x10, 0xAC, 0x24, 0x00, 0x10, 0xB4, 0x24, 0x00, 0x10, 0x04, 0x0D, 0x03, 0x00,
/* 0x00031A00 */ 0x94, 0x24, 0x00, 0x10, 0xB8, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 0x00031A10 */ 0x00, 0x00, 0x00, 0x00, 0x6D, 0x6F, 0x64, 0x75, 0x6C, 0x65, 0x20, 0x62, 0x79, 0x74, 0x65, 0x20, /* SECTION: .rodata */
/* 0x00031A20 */ 0x70, 0x6F, 0x6F, 0x6C, 0x20, 0x30, 0x00, 0x00, 0x6D, 0x6F, 0x64, 0x75, 0x6C, 0x65, 0x20, 0x74,
/* 0x00031A30 */ 0x68, 0x72, 0x65, 0x61, 0x64, 0x20, 0x30, 0x00, 0x6D, 0x6F, 0x64, 0x75, 0x6C, 0x65, 0x20, 0x74,
/* 0x00031A40 */ 0x68, 0x72, 0x65, 0x61, 0x64, 0x20, 0x31, 0x00, 0x6D, 0x6F, 0x64, 0x75, 0x6C, 0x65, 0x20, 0x74,
/* 0x00031A50 */ 0x68, 0x72, 0x65, 0x61, 0x64, 0x20, 0x32, 0x00, 0x6D, 0x6F, 0x64, 0x75, 0x6C, 0x65, 0x20, 0x74,
/* 0x00031A60 */ 0x68, 0x72, 0x65, 0x61, 0x64, 0x20, 0x33, 0x00, 0x6D, 0x6F, 0x64, 0x75, 0x6C, 0x65, 0x20, 0x74,
/* 0x00031A70 */ 0x68, 0x72, 0x65, 0x61, 0x64, 0x20, 0x34, 0x00, 0x6D, 0x6F, 0x64, 0x75, 0x6C, 0x65, 0x20, 0x74,
/* 0x00031A80 */ 0x68, 0x72, 0x65, 0x61, 0x64, 0x20, 0x35, 0x00, 0x6D, 0x6F, 0x64, 0x75, 0x6C, 0x65, 0x20, 0x74,
/* 0x00031A90 */ 0x68, 0x72, 0x65, 0x61, 0x64, 0x20, 0x36, 0x00, 0x6D, 0x6F, 0x64, 0x75, 0x6C, 0x65, 0x20, 0x74,
/* 0x00031AA0 */ 0x68, 0x72, 0x65, 0x61, 0x64, 0x20, 0x37, 0x00, 0x6D, 0x6F, 0x64, 0x75, 0x6C, 0x65, 0x20, 0x71,
/* 0x00031AB0 */ 0x75, 0x65, 0x75, 0x65, 0x20, 0x30, 0x00, 0x00, 0x6D, 0x6F, 0x64, 0x75, 0x6C, 0x65, 0x20, 0x73,
/* 0x00031AC0 */ 0x65, 0x6D, 0x61, 0x70, 0x68, 0x6F, 0x72, 0x65, 0x20, 0x30, 0x00, 0x00, 0x6D, 0x6F, 0x64, 0x75,
/* 0x00031AD0 */ 0x6C, 0x65, 0x20, 0x65, 0x76, 0x65, 0x6E, 0x74, 0x20, 0x66, 0x6C, 0x61, 0x67, 0x73, 0x20, 0x30,
/* 0x00031AE0 */ 0x00, 0x00, 0x00, 0x00, 0x6D, 0x6F, 0x64, 0x75, 0x6C, 0x65, 0x20, 0x6D, 0x75, 0x74, 0x65, 0x78,
/* 0x00031AF0 */ 0x20, 0x30, 0x00, 0x00, 0x6D, 0x6F, 0x64, 0x75, 0x6C, 0x65, 0x20, 0x62, 0x6C, 0x6F, 0x63, 0x6B,
/* 0x00031B00 */ 0x20, 0x70, 0x6F, 0x6F, 0x6C, 0x20, 0x30, 0x00};

79
ports_module/cortex_a7/gnu/example_build/tx_initialize_low_level.s
View File

@@ -20,7 +20,12 @@
/**************************************************************************/
/**************************************************************************/
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
.arm
#endif
SVC_MODE = 0xD3 // Disable IRQ/FIQ SVC mode
IRQ_MODE = 0xD2 // Disable IRQ/FIQ IRQ mode
@@ -39,24 +44,14 @@ THUMB_MASK = 0x20 // THUMB mode bit
.global _end
.global _sp
.global _stack_bottom
/* Define the 16-bit Thumb mode veneer for _tx_initialize_low_level for
applications calling this function from to 16-bit Thumb mode. */
.text
.align 2
.thumb
.global $_tx_initialize_low_level
.type $_tx_initialize_low_level,function
$_tx_initialize_low_level:
BX pc // Switch to 32-bit mode
NOP //
.arm
STMFD sp!, {lr} // Save return address
BL _tx_initialize_low_level // Call _tx_initialize_low_level function
LDMFD sp!, {lr} // Recover saved return address
BX lr // Return to 16-bit caller
#ifdef TX_ENABLE_FIQ_SUPPORT
.global _tx_thread_fiq_context_save
.global _tx_thread_fiq_context_restore
#ifdef TX_ENABLE_FIQ_NESTING
.global _tx_thread_fiq_nesting_start
.global _tx_thread_fiq_nesting_end
#endif
#endif
.text
.align 2
@@ -65,7 +60,7 @@ $_tx_initialize_low_level:
/* FUNCTION RELEASE */
/* */
/* _tx_initialize_low_level ARMv7-A */
/* 6.1.11 */
/* 6.x */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
@@ -101,8 +96,14 @@ $_tx_initialize_low_level:
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-25-2022 Zhen Kong Updated comments, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _tx_initialize_low_level
.type _tx_initialize_low_level,function
_tx_initialize_low_level:
@@ -155,28 +156,37 @@ _stack_error_loop:
ADD r1, r1, #8 // Increment to next free word
STR r1, [r2] // Save first free memory address
#ifdef __THUMB_INTERWORK
BX lr // Return to caller
#else
MOV pc, lr // Return to caller
#endif
/* Define shells for each of the interrupt vectors. */
#if defined(THUMB_MODE)
.thumb_func
#endif
.global __tx_undefined
__tx_undefined:
B __tx_undefined // Undefined handler
#if defined(THUMB_MODE)
.thumb_func
#endif
.global __tx_reserved_handler
__tx_reserved_handler:
B __tx_reserved_handler // Reserved exception handler
#if defined(THUMB_MODE)
.thumb_func
#endif
.global __tx_irq_handler
.global __tx_irq_processing_return
__tx_irq_handler:
/* Jump to context save to save system context. */
B _tx_thread_context_save
#if defined(THUMB_MODE)
.thumb_func
#endif
.global __tx_irq_processing_return
__tx_irq_processing_return:
//
/* At this point execution is still in the IRQ mode. The CPSR, point of
@@ -245,12 +255,18 @@ __tx_irq_processing_return:
#ifdef TX_ENABLE_FIQ_SUPPORT
#if defined(THUMB_MODE)
.thumb_func
#endif
.global __tx_fiq_handler
.global __tx_fiq_processing_return
__tx_fiq_handler:
asdf
/* Jump to fiq context save to save system context. */
B _tx_thread_fiq_context_save
#if defined(THUMB_MODE)
.thumb_func
#endif
.global __tx_fiq_processing_return
__tx_fiq_processing_return:
/* At this point execution is still in the FIQ mode. The CPSR, point of
@@ -279,6 +295,9 @@ __tx_fiq_processing_return:
#else
#if defined(THUMB_MODE)
.thumb_func
#endif
.global __tx_fiq_handler
__tx_fiq_handler:
B __tx_fiq_handler // FIQ interrupt handler
@@ -336,9 +355,15 @@ __tx_fiq_handler:
// EXTERN _tx_execution_thread_exit
// EXTERN _tx_thread_schedule
#if defined(THUMB_MODE)
.thumb_func
#endif
.global __tx_prefetch_handler
.global __tx_abort_handler
__tx_prefetch_handler:
#if defined(THUMB_MODE)
.thumb_func
#endif
.global __tx_abort_handler
__tx_abort_handler:
STMDB sp!, {r0-r3} // Save some working registers
LDR r3, =_tx_thread_system_state // Pickup address of system state var

61
ports_module/cortex_a7/gnu/inc/tx_port.h
View File

@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h ARMv7-A */
/* 6.1.12 */
/* 6.x */
/* */
/* AUTHOR */
/* */
@@ -56,6 +56,9 @@
/* 07-29-2022 Scott Larson Updated comments, removed */
/* unneeded temp variable, */
/* resulting in version 6.1.12 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
@@ -269,21 +272,10 @@ typedef unsigned short USHORT;
#define TX_SEMAPHORE_DELETE_EXTENSION(semaphore_ptr)
#define TX_TIMER_DELETE_EXTENSION(timer_ptr)
/* Determine if the ARM architecture has the CLZ instruction. This is available on
architectures v5 and above. If available, redefine the macro for calculating the
lowest bit set. */
#if __TARGET_ARCH_ARM > 4
#ifndef __thumb__
/* Redefine the macro for calculating the lowest bit set. */
#define TX_LOWEST_SET_BIT_CALCULATE(m, b) m = m & ((ULONG) (-((LONG) m))); \
asm volatile (" CLZ %0,%1 ": "=r" (b) : "r" (m) ); \
b = 31 - b;
#endif
#endif
/* Define ThreadX interrupt lockout and restore macros for protection on
access of critical kernel information. The restore interrupt macro must
@@ -292,32 +284,39 @@ typedef unsigned short USHORT;
is used to define a local function save area for the disable and restore
macros. */
#ifdef __thumb__
unsigned int _tx_thread_interrupt_disable(void);
unsigned int _tx_thread_interrupt_restore(UINT old_posture);
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
#else
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#ifdef TX_ENABLE_FIQ_SUPPORT
#define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );
#define TX_DISABLE \
{ \
asm volatile (" MRS %0,CPSR": "=r" (interrupt_save)); \
asm volatile (" CPSID if"); \
}
#define TX_RESTORE \
{ \
if ((interrupt_save & 0x40) == 0) \
asm volatile (" CPSIE f"); \
if ((interrupt_save & 0x80) == 0) \
asm volatile (" CPSIE i"); \
}
#else
#define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID i ": "=r" (interrupt_save) );
#endif
#define TX_RESTORE asm volatile (" MSR CPSR_c,%0 "::"r" (interrupt_save) );
#define TX_DISABLE \
{ \
asm volatile (" MRS %0,CPSR": "=r" (interrupt_save)); \
asm volatile (" CPSID i"); \
}
#define TX_RESTORE \
{ \
if ((interrupt_save & 0x80) == 0) \
asm volatile (" CPSIE i"); \
}
#endif
/* Define VFP extension for the ARMv7-A. Each is assumed to be called in the context of the executing
thread. */

9
ports_module/cortex_a7/gnu/inc/txm_module_port.h
View File

@@ -26,7 +26,7 @@
/* APPLICATION INTERFACE DEFINITION RELEASE */
/* */
/* txm_module_port.h Cortex-A7/MMU/GNU */
/* 6.2.1 */
/* 6.x */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -41,6 +41,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 03-08-2023 Scott Larson Initial Version 6.2.1 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
@@ -106,7 +109,7 @@ The following extensions must also be defined in tx_port.h:
/* Define the properties for this particular module port. */
#ifdef TXM_MODULE_MEMORY_PROTECTION_ENABLED
#define TXM_MODULE_MEMORY_PROTECTION 0x00000001
#define TXM_MODULE_MEMORY_PROTECTION 0x00000002
#else
#define TXM_MODULE_MEMORY_PROTECTION 0x00000000
#endif
@@ -115,7 +118,7 @@ The following extensions must also be defined in tx_port.h:
/* Define the supported options for this module. */
#define TXM_MODULE_MANAGER_SUPPORTED_OPTIONS (TXM_MODULE_MEMORY_PROTECTION)
#define TXM_MODULE_MANAGER_SUPPORTED_OPTIONS (TXM_MODULE_USER_MODE | TXM_MODULE_MEMORY_PROTECTION)
#define TXM_MODULE_MANAGER_REQUIRED_OPTIONS 0

191
ports_module/cortex_a7/gnu/module_manager/src/tx_thread_context_restore.s
View File

@@ -20,16 +20,17 @@
/**************************************************************************/
/**************************************************************************/
.arm
#ifdef TX_ENABLE_FIQ_SUPPORT
SVC_MODE = 0xD3 // Disable IRQ/FIQ, SVC mode
IRQ_MODE = 0xD2 // Disable IRQ/FIQ, IRQ mode
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
SVC_MODE = 0x93 // Disable IRQ, SVC mode
IRQ_MODE = 0x92 // Disable IRQ, IRQ mode
.arm
#endif
IRQ_MODE = 0x12 // IRQ mode
SYS_MODE = 0x1F // SYS mode
SVC_MODE = 0x13 // SVC mode
.global _tx_thread_system_state
.global _tx_thread_current_ptr
.global _tx_thread_execute_ptr
@@ -37,12 +38,6 @@ IRQ_MODE = 0x92 // Disable IRQ, IRQ mode
.global _tx_thread_schedule
.global _tx_thread_preempt_disable
/* No 16-bit Thumb mode veneer code is needed for _tx_thread_context_restore
since it will never be called 16-bit mode. */
.arm
.text
.align 2
/**************************************************************************/
@@ -50,7 +45,7 @@ IRQ_MODE = 0x92 // Disable IRQ, IRQ mode
/* FUNCTION RELEASE */
/* */
/* _tx_thread_context_restore ARMv7-A */
/* 6.1.11 */
/* 6.x */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
@@ -88,135 +83,101 @@ IRQ_MODE = 0x92 // Disable IRQ, IRQ mode
/* resulting in version 6.1.9 */
/* 04-25-2022 Zhen Kong Updated comments, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _tx_thread_context_restore
.type _tx_thread_context_restore,function
_tx_thread_context_restore:
/* Lockout interrupts. */
#ifdef TX_ENABLE_FIQ_SUPPORT
CPSID if // Disable IRQ and FIQ interrupts
CPSID if // Disable IRQ and FIQ
#else
CPSID i // Disable IRQ interrupts
CPSID i // Disable IRQ
#endif
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
/* Call the ISR exit function to indicate an ISR is complete. */
BL _tx_execution_isr_exit // Call the ISR exit function
#endif
/* Determine if interrupts are nested. */
/* Check if interrupts are nested. */
LDR r1, =_tx_thread_system_state // Load address of system state variable
LDR r0, [r1] // Load the counter
SUBS r0, r0, #1 // Decrement the counter
STR r0, [r1] // Store the counter
BNE restore_and_return_from_irq // If the counter is not 0, this is a nested restore, just return
LDR r3, =_tx_thread_system_state // Pickup address of system state variable
LDR r2, [r3] // Pickup system state
SUB r2, r2, #1 // Decrement the counter
STR r2, [r3] // Store the counter
CMP r2, #0 // Was this the first interrupt?
BEQ __tx_thread_not_nested_restore // If so, not a nested restore
/* Check if a thread was interrupted and no preemption is required. */
LDR r1, =_tx_thread_current_ptr // Load address of current thread ptr
LDR r0, [r1] // Load actual current thread pointer
CMP r0, #0 // Is it NULL ?
BEQ restore_and_return_from_irq // If the current thread pointer is NULL, idle system was interrupted, just return
/* Interrupts are nested. */
/* Check if the current thread can be preempted. */
LDR r3, =_tx_thread_preempt_disable // Load preempt disable address
LDR r2, [r3] // Load actual preempt disable flag
CMP r2, #0 // Is it set ?
BNE restore_and_return_from_irq // If the preempt disable flag is set, do not preempt, just return
/* Just recover the saved registers and return to the point of
interrupt. */
/* Check if the next thread is different of the current thread. */
LDR r3, =_tx_thread_execute_ptr // Load address of execute thread ptr
LDR r2, [r3] // Load actual execute thread pointer
CMP r0, r2 // Is the next thread the same as the current thread ?
BEQ restore_and_return_from_irq // If this is the same thread, do not preempt, just return
LDMIA sp!, {r0, r10, r12, lr} // Recover SPSR, POI, and scratch regs
MSR SPSR_cxsf, r0 // Put SPSR back
LDMIA sp!, {r0-r3} // Recover r0-r3
MOVS pc, lr // Return to point of interrupt
/* Clear the current task pointer. */
MOV r3, #0 // NULL value
STR r3, [r1] // Clear current thread pointer
__tx_thread_not_nested_restore:
POP {r2, r10, r12, lr} // Recover temporarily saved registers
/* Determine if a thread was interrupted and no preemption is required. */
LDR r1, =_tx_thread_current_ptr // Pickup address of current thread ptr
LDR r0, [r1] // Pickup actual current thread pointer
CMP r0, #0 // Is it NULL?
BEQ __tx_thread_idle_system_restore // Yes, idle system was interrupted
LDR r3, =_tx_thread_preempt_disable // Pickup preempt disable address
LDR r2, [r3] // Pickup actual preempt disable flag
CMP r2, #0 // Is it set?
BNE __tx_thread_no_preempt_restore // Yes, don't preempt this thread
LDR r3, =_tx_thread_execute_ptr // Pickup address of execute thread ptr
LDR r2, [r3] // Pickup actual execute thread pointer
CMP r0, r2 // Is the same thread highest priority?
BNE __tx_thread_preempt_restore // No, preemption needs to happen
__tx_thread_no_preempt_restore:
/* Recover the saved context and return to the point of interrupt. */
/* Pickup the saved stack pointer. */
/* Recover the saved context and return to the point of interrupt. */
LDMIA sp!, {r0, r10, r12, lr} // Recover SPSR, POI, and scratch regs
MSR SPSR_cxsf, r0 // Put SPSR back
LDMIA sp!, {r0-r3} // Recover r0-r3
MOVS pc, lr // Return to point of interrupt
__tx_thread_preempt_restore:
LDMIA sp!, {r3, r10, r12, lr} // Recover temporarily saved registers
/* Save registers of the current thread on its stack */
/* Save integer registers. */
MOV r1, lr // Save lr (point of interrupt)
MOV r2, #SVC_MODE // Build SVC mode CPSR
MSR CPSR_c, r2 // Enter SVC mode
CPS #SYS_MODE // Enter SYS mode
STR r1, [sp, #-4]! // Save point of interrupt
STMDB sp!, {r4-r12, lr} // Save upper half of registers
MOV r4, r3 // Save SPSR in r4
MOV r2, #IRQ_MODE // Build IRQ mode CPSR
MSR CPSR_c, r2 // Enter IRQ mode
LDMIA sp!, {r0-r3} // Recover r0-r3
MOV r5, #SVC_MODE // Build SVC mode CPSR
MSR CPSR_c, r5 // Enter SVC mode
STMDB sp!, {r0-r3} // Save r0-r3 on thread's stack
LDR r1, =_tx_thread_current_ptr // Pickup address of current thread ptr
LDR r0, [r1] // Pickup current thread pointer
PUSH {r4-r12, lr} // Save upper half of registers
CPS #IRQ_MODE // Enter IRQ mode
POP {r4-r7} // Recover r0-r3
CPS #SYS_MODE // Enter SYS mode
PUSH {r4-r7} // Save r0-r3 on thread's stack
#ifdef TX_ENABLE_VFP_SUPPORT
LDR r2, [r0, #144] // Pickup the VFP enabled flag
CMP r2, #0 // Is the VFP enabled?
BEQ _tx_skip_irq_vfp_save // No, skip VFP IRQ save
VMRS r2, FPSCR // Pickup the FPSCR
STR r2, [sp, #-4]! // Save FPSCR
/* Save VFP registers. */
LDR r1, [r0, #144] // Pickup the VFP enabled flag
CMP r1, #0 // Is the VFP enabled?
BEQ skip_vfp_save // No, skip VFP IRQ save
VMRS r1, FPSCR // Pickup the FPSCR
STR r1, [sp, #-4]! // Save FPSCR
VSTMDB sp!, {D16-D31} // Save D16-D31
VSTMDB sp!, {D0-D15} // Save D0-D15
_tx_skip_irq_vfp_save:
skip_vfp_save:
#endif
MOV r3, #1 // Build interrupt stack type
STMDB sp!, {r3, r4} // Save interrupt stack type and SPSR
STR sp, [r0, #8] // Save stack pointer in thread control
// block
/* Save CPSR and stack type. */
MOV r1, #1 // Build interrupt stack type
PUSH {r1, r2} // Save interrupt stack type and SPSR
STR sp, [r0, #8] // Save stack pointer in thread control block
/* Save the remaining time-slice and disable it. */
LDR r3, =_tx_timer_time_slice // Pickup time-slice variable address
LDR r2, [r3] // Pickup time-slice
CMP r2, #0 // Is it active?
BEQ __tx_thread_dont_save_ts // No, don't save it
STR r2, [r0, #24] // Save thread's time-slice
MOV r2, #0 // Clear value
STR r2, [r3] // Disable global time-slice flag
LDR r2, =_tx_timer_time_slice // Pickup time-slice variable address
LDR r1, [r2] // Pickup time-slice
CMP r1, #0 // Is it active?
BEQ dont_save_ts // No, don't save it
STR r1, [r0, #24] // Save thread's time-slice
STR r3, [r2] // Disable global time-slice flag
dont_save_ts:
__tx_thread_dont_save_ts:
B _tx_thread_schedule // Go to the scheduler
/* Clear the current task pointer. */
MOV r0, #0 // NULL value
STR r0, [r1] // Clear current thread pointer
/* Return to the scheduler. */
B _tx_thread_schedule // Return to scheduler
__tx_thread_idle_system_restore:
/* Just return back to the scheduler! */
MOV r0, #SVC_MODE // Build SVC mode CPSR
MSR CPSR_c, r0 // Enter SVC mode
B _tx_thread_schedule // Return to scheduler
/* Return to point of interrupt */
restore_and_return_from_irq:
/* Recover the saved context and return to the point of interrupt. */
POP {r0, r10, r12, lr} // Recover SPSR, POI, and scratch regs
MSR SPSR_cxsf, r0 // Put SPSR back
POP {r0-r3} // Recover r0-r3
MOVS pc, lr // Return to point of interrupt

94
ports_module/cortex_a7/gnu/module_manager/src/tx_thread_context_save.s
View File

@@ -20,6 +20,13 @@
/**************************************************************************/
/**************************************************************************/
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
.arm
#endif
.global _tx_thread_system_state
.global _tx_thread_current_ptr
.global __tx_irq_processing_return
@@ -28,7 +35,6 @@
/* No 16-bit Thumb mode veneer code is needed for _tx_thread_context_save
since it will never be called 16-bit mode. */
.arm
.text
.align 2
/**************************************************************************/
@@ -36,7 +42,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_thread_context_save ARMv7-A */
/* 6.1.11 */
/* 6.x */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
@@ -73,8 +79,14 @@
/* resulting in version 6.1.9 */
/* 04-25-2022 Zhen Kong Updated comments, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _tx_thread_context_save
.type _tx_thread_context_save,function
_tx_thread_context_save:
@@ -82,91 +94,29 @@ _tx_thread_context_save:
/* Upon entry to this routine, it is assumed that IRQ interrupts are locked
out, we are in IRQ mode, and all registers are intact. */
/* Check for a nested interrupt condition. */
STMDB sp!, {r0-r3} // Save some working registers
#ifdef TX_ENABLE_FIQ_SUPPORT
CPSID if // Disable FIQ interrupts
#endif
LDR r3, =_tx_thread_system_state // Pickup address of system state variable
LDR r2, [r3] // Pickup system state
CMP r2, #0 // Is this the first interrupt?
BEQ __tx_thread_not_nested_save // Yes, not a nested context save
/* Nested interrupt condition. */
ADD r2, r2, #1 // Increment the interrupt counter
STR r2, [r3] // Store it back in the variable
/* Save the rest of the scratch registers on the stack and return to the
calling ISR. */
MRS r0, SPSR // Pickup saved SPSR
SUB lr, lr, #4 // Adjust point of interrupt
STMDB sp!, {r0, r10, r12, lr} // Store other registers
/* Return to the ISR. */
MOV r10, #0 // Clear stack limit
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
/* Call the ISR enter function to indicate an ISR is executing. */
PUSH {lr} // Save ISR lr
BL _tx_execution_isr_enter // Call the ISR enter function
POP {lr} // Recover ISR lr
#endif
B __tx_irq_processing_return // Continue IRQ processing
__tx_thread_not_nested_save:
/* Otherwise, not nested, check to see if a thread was running. */
ADD r2, r2, #1 // Increment the interrupt counter
STR r2, [r3] // Store it back in the variable
LDR r1, =_tx_thread_current_ptr // Pickup address of current thread ptr
LDR r0, [r1] // Pickup current thread pointer
CMP r0, #0 // Is it NULL?
BEQ __tx_thread_idle_system_save // If so, interrupt occurred in
// scheduling loop - nothing needs saving!
PUSH {r0-r3} // Save some working registers
/* Save minimal context of interrupted thread. */
MRS r2, SPSR // Pickup saved SPSR
MRS r0, SPSR // Pickup saved SPSR
SUB lr, lr, #4 // Adjust point of interrupt
STMDB sp!, {r2, r10, r12, lr} // Store other registers
PUSH {r0, r10, r12, lr} // Store other registers
LDR r1, =_tx_thread_system_state // Pickup address of system state variable
LDR r0, [r1] // Pickup system state
ADD r0, #1 // Increment the interrupt counter
STR r0, [r1] // Store it back in the variable
MOV r10, #0 // Clear stack limit
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
/* Call the ISR enter function to indicate an ISR is executing. */
PUSH {lr} // Save ISR lr
BL _tx_execution_isr_enter // Call the ISR enter function
POP {lr} // Recover ISR lr
#endif
B __tx_irq_processing_return // Continue IRQ processing
__tx_thread_idle_system_save:
/* Interrupt occurred in the scheduling loop. */
/* Not much to do here, just adjust the stack pointer, and return to IRQ
processing. */
MOV r10, #0 // Clear stack limit
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
/* Call the ISR enter function to indicate an ISR is executing. */
PUSH {lr} // Save ISR lr
BL _tx_execution_isr_enter // Call the ISR enter function
POP {lr} // Recover ISR lr
#endif
ADD sp, sp, #16 // Recover saved registers
B __tx_irq_processing_return // Continue IRQ processing

38
ports_module/cortex_a7/gnu/module_manager/src/tx_thread_fiq_context_restore.s
View File

@@ -19,11 +19,16 @@
/** */
/**************************************************************************/
/**************************************************************************/
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
.arm
#endif
SVC_MODE = 0xD3 // SVC mode
FIQ_MODE = 0xD1 // FIQ mode
MODE_MASK = 0x1F // Mode mask
THUMB_MASK = 0x20 // Thumb bit mask
IRQ_MODE_BITS = 0x12 // IRQ mode bits
@@ -36,11 +41,6 @@ IRQ_MODE_BITS = 0x12 // IRQ mode bits
.global _tx_thread_preempt_disable
.global _tx_execution_isr_exit
/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_context_restore
since it will never be called 16-bit mode. */
.arm
.text
.align 2
/**************************************************************************/
@@ -48,7 +48,7 @@ IRQ_MODE_BITS = 0x12 // IRQ mode bits
/* FUNCTION RELEASE */
/* */
/* _tx_thread_fiq_context_restore ARMv7-A */
/* 6.1.11 */
/* 6.x */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
@@ -86,8 +86,14 @@ IRQ_MODE_BITS = 0x12 // IRQ mode bits
/* resulting in version 6.1.9 */
/* 04-25-2022 Zhen Kong Updated comments, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _tx_thread_fiq_context_restore
.type _tx_thread_fiq_context_restore,function
_tx_thread_fiq_context_restore:
@@ -116,9 +122,9 @@ _tx_thread_fiq_context_restore:
/* Just recover the saved registers and return to the point of
interrupt. */
LDMIA sp!, {r0, r10, r12, lr} // Recover SPSR, POI, and scratch regs
POP {r0, r10, r12, lr} // Recover SPSR, POI, and scratch regs
MSR SPSR_cxsf, r0 // Put SPSR back
LDMIA sp!, {r0-r3} // Recover r0-r3
POP {r0-r3} // Recover r0-r3
MOVS pc, lr // Return to point of interrupt
__tx_thread_fiq_not_nested_restore:
@@ -153,26 +159,26 @@ __tx_thread_fiq_no_preempt_restore:
/* Restore interrupted thread or ISR. */
/* Recover the saved context and return to the point of interrupt. */
LDMIA sp!, {r0, lr} // Recover SPSR, POI, and scratch regs
POP {r0, lr} // Recover SPSR, POI, and scratch regs
MSR SPSR_cxsf, r0 // Put SPSR back
LDMIA sp!, {r0-r3} // Recover r0-r3
POP {r0-r3} // Recover r0-r3
MOVS pc, lr // Return to point of interrupt
__tx_thread_fiq_preempt_restore:
LDMIA sp!, {r3, lr} // Recover temporarily saved registers
POP {r3, lr} // Recover temporarily saved registers
MOV r1, lr // Save lr (point of interrupt)
MOV r2, #SVC_MODE // Build SVC mode CPSR
MSR CPSR_c, r2 // Enter SVC mode
STR r1, [sp, #-4]! // Save point of interrupt
STMDB sp!, {r4-r12, lr} // Save upper half of registers
PUSH {r4-r12, lr} // Save upper half of registers
MOV r4, r3 // Save SPSR in r4
MOV r2, #FIQ_MODE // Build FIQ mode CPSR
MSR CPSR_c, r2 // Reenter FIQ mode
LDMIA sp!, {r0-r3} // Recover r0-r3
POP {r0-r3} // Recover r0-r3
MOV r5, #SVC_MODE // Build SVC mode CPSR
MSR CPSR_c, r5 // Enter SVC mode
STMDB sp!, {r0-r3} // Save r0-r3 on thread's stack
PUSH {r0-r3} // Save r0-r3 on thread's stack
LDR r1, =_tx_thread_current_ptr // Pickup address of current thread ptr
LDR r0, [r1] // Pickup current thread pointer
@@ -189,7 +195,7 @@ _tx_skip_fiq_vfp_save:
#endif
MOV r3, #1 // Build interrupt stack type
STMDB sp!, {r3, r4} // Save interrupt stack type and SPSR
PUSH {r3, r4} // Save interrupt stack type and SPSR
STR sp, [r0, #8] // Save stack pointer in thread control
// block */
LDR r3, =_tx_timer_time_slice // Pickup time-slice variable address

23
ports_module/cortex_a7/gnu/module_manager/src/tx_thread_fiq_context_save.s
View File

@@ -19,6 +19,12 @@
/** */
/**************************************************************************/
/**************************************************************************/
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
.arm
#endif
.global _tx_thread_system_state
.global _tx_thread_current_ptr
@@ -29,7 +35,6 @@
/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_context_save
since it will never be called 16-bit mode. */
.arm
.text
.align 2
/**************************************************************************/
@@ -37,7 +42,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_thread_fiq_context_save ARMv7-A */
/* 6.1.11 */
/* 6.x */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
@@ -74,8 +79,14 @@
/* resulting in version 6.1.9 */
/* 04-25-2022 Zhen Kong Updated comments, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _tx_thread_fiq_context_save
.type _tx_thread_fiq_context_save,function
_tx_thread_fiq_context_save:
@@ -85,7 +96,7 @@ _tx_thread_fiq_context_save:
/* Check for a nested interrupt condition. */
STMDB sp!, {r0-r3} // Save some working registers
PUSH {r0-r3} // Save some working registers
LDR r3, =_tx_thread_system_state // Pickup address of system state variable
LDR r2, [r3] // Pickup system state
CMP r2, #0 // Is this the first interrupt?
@@ -101,7 +112,7 @@ _tx_thread_fiq_context_save:
MRS r0, SPSR // Pickup saved SPSR
SUB lr, lr, #4 // Adjust point of interrupt
STMDB sp!, {r0, r10, r12, lr} // Store other registers
PUSH {r0, r10, r12, lr} // Store other registers
/* Return to the ISR. */
@@ -134,7 +145,7 @@ __tx_thread_fiq_not_nested_save:
MRS r2, SPSR // Pickup saved SPSR
SUB lr, lr, #4 // Adjust point of interrupt
STMDB sp!, {r2, lr} // Store other registers, Note that we don't
PUSH {r2, lr} // Store other registers, Note that we don't
// need to save sl and ip since FIQ has
// copies of these registers. Nested
// interrupt processing does need to save
@@ -172,7 +183,7 @@ __tx_thread_fiq_idle_system_save:
MRS r0, SPSR // Pickup saved SPSR
SUB lr, lr, #4 // Adjust point of interrupt
STMDB sp!, {r0, lr} // Store other registers that will get used
PUSH {r0, lr} // Store other registers that will get used
// or stripped off the stack in context
// restore
B __tx_fiq_processing_return // Continue FIQ processing

24
ports_module/cortex_a7/gnu/module_manager/src/tx_thread_fiq_nesting_end.s
View File

@@ -20,6 +20,13 @@
/**************************************************************************/
/**************************************************************************/
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
.arm
#endif
#ifdef TX_ENABLE_FIQ_SUPPORT
DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts
#else
@@ -28,11 +35,6 @@ DISABLE_INTS = 0x80 // Disable IRQ interrupts
MODE_MASK = 0x1F // Mode mask
FIQ_MODE_BITS = 0x11 // FIQ mode bits
/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_nesting_end
since it will never be called 16-bit mode. */
.arm
.text
.align 2
/**************************************************************************/
@@ -40,7 +42,7 @@ FIQ_MODE_BITS = 0x11 // FIQ mode bits
/* FUNCTION RELEASE */
/* */
/* _tx_thread_fiq_nesting_end ARMv7-A */
/* 6.1.11 */
/* 6.x */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
@@ -82,8 +84,14 @@ FIQ_MODE_BITS = 0x11 // FIQ mode bits
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-25-2022 Zhen Kong Updated comments, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _tx_thread_fiq_nesting_end
.type _tx_thread_fiq_nesting_end,function
_tx_thread_fiq_nesting_end:
@@ -97,8 +105,4 @@ _tx_thread_fiq_nesting_end:
ORR r0, r0, #FIQ_MODE_BITS // Build IRQ mode CPSR
MSR CPSR_c, r0 // Reenter IRQ mode
#ifdef __THUMB_INTERWORK
BX r3 // Return to caller
#else
MOV pc, r3 // Return to caller
#endif

22
ports_module/cortex_a7/gnu/module_manager/src/tx_thread_fiq_nesting_start.s
View File

@@ -24,11 +24,13 @@ FIQ_DISABLE = 0x40 // FIQ disable bit
MODE_MASK = 0x1F // Mode mask
SYS_MODE_BITS = 0x1F // System mode bits
/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_nesting_start
since it will never be called 16-bit mode. */
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
.arm
#endif
.text
.align 2
/**************************************************************************/
@@ -36,7 +38,7 @@ SYS_MODE_BITS = 0x1F // System mode bits
/* FUNCTION RELEASE */
/* */
/* _tx_thread_fiq_nesting_start ARMv7-A */
/* 6.1.11 */
/* 6.x */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
@@ -75,8 +77,14 @@ SYS_MODE_BITS = 0x1F // System mode bits
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-25-2022 Zhen Kong Updated comments, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _tx_thread_fiq_nesting_start
.type _tx_thread_fiq_nesting_start,function
_tx_thread_fiq_nesting_start:
@@ -89,8 +97,4 @@ _tx_thread_fiq_nesting_start:
// and push r1 just to keep 8-byte alignment
BIC r0, r0, #FIQ_DISABLE // Build enable FIQ CPSR
MSR CPSR_c, r0 // Enter system mode
#ifdef __THUMB_INTERWORK
BX r3 // Return to caller
#else
MOV pc, r3 // Return to caller
#endif

67
ports_module/cortex_a7/gnu/module_manager/src/tx_thread_interrupt_control.s
View File

@@ -20,25 +20,18 @@
/**************************************************************************/
/**************************************************************************/
INT_MASK = 0x03F
/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_control for
applications calling this function from to 16-bit Thumb mode. */
.text
.align 2
.global $_tx_thread_interrupt_control
$_tx_thread_interrupt_control:
.thumb
BX pc // Switch to 32-bit mode
NOP //
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
.arm
STMFD sp!, {lr} // Save return address
BL _tx_thread_interrupt_control // Call _tx_thread_interrupt_control function
LDMFD sp!, {lr} // Recover saved return address
BX lr // Return to 16-bit caller
#endif
INT_MASK = 0x0C0
IRQ_MASK = 0x080
#ifdef TX_ENABLE_FIQ_SUPPORT
FIQ_MASK = 0x040
#endif
.text
.align 2
@@ -47,7 +40,7 @@ $_tx_thread_interrupt_control:
/* FUNCTION RELEASE */
/* */
/* _tx_thread_interrupt_control ARMv7-A */
/* 6.1.11 */
/* 6.x */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
@@ -80,25 +73,35 @@ $_tx_thread_interrupt_control:
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-25-2022 Zhen Kong Updated comments, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _tx_thread_interrupt_control
.type _tx_thread_interrupt_control,function
_tx_thread_interrupt_control:
MRS r1, CPSR // Pickup current CPSR
/* Pickup current interrupt lockout posture. */
MRS r3, CPSR // Pickup current CPSR
MOV r2, #INT_MASK // Build interrupt mask
AND r1, r3, r2 // Clear interrupt lockout bits
ORR r1, r1, r0 // Or-in new interrupt lockout bits
/* Apply the new interrupt posture. */
MSR CPSR_c, r1 // Setup new CPSR
BIC r0, r3, r2 // Return previous interrupt mask
#ifdef __THUMB_INTERWORK
BX lr // Return to caller
#ifdef TX_ENABLE_FIQ_SUPPORT
CPSID if // Disable IRQ and FIQ
#else
MOV pc, lr // Return to caller
CPSID i // Disable IRQ
#endif
TST r0, #IRQ_MASK
BNE no_irq
CPSIE i
no_irq:
#ifdef TX_ENABLE_FIQ_SUPPORT
TST r0, #FIQ_MASK
BNE no_fiq
CPSIE f
no_fiq:
#endif
AND r0, r1, #INT_MASK
BX lr

32
ports_module/cortex_a7/gnu/module_manager/src/tx_thread_interrupt_disable.s
View File

@@ -20,22 +20,12 @@
/**************************************************************************/
/**************************************************************************/
/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_disable for
applications calling this function from to 16-bit Thumb mode. */
.text
.align 2
.global $_tx_thread_interrupt_disable
$_tx_thread_interrupt_disable:
.thumb
BX pc // Switch to 32-bit mode
NOP //
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
.arm
STMFD sp!, {lr} // Save return address
BL _tx_thread_interrupt_disable // Call _tx_thread_interrupt_disable function
LDMFD sp!, {lr} // Recover saved return address
BX lr // Return to 16-bit caller
#endif
.text
.align 2
@@ -44,7 +34,7 @@ $_tx_thread_interrupt_disable:
/* FUNCTION RELEASE */
/* */
/* _tx_thread_interrupt_disable ARMv7-A */
/* 6.1.11 */
/* 6.x */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
@@ -76,8 +66,14 @@ $_tx_thread_interrupt_disable:
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-25-2022 Zhen Kong Updated comments, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _tx_thread_interrupt_disable
.type _tx_thread_interrupt_disable,function
_tx_thread_interrupt_disable:
@@ -94,8 +90,4 @@ _tx_thread_interrupt_disable:
CPSID i // Disable IRQ
#endif
#ifdef __THUMB_INTERWORK
BX lr // Return to caller
#else
MOV pc, lr // Return to caller
#endif

48
ports_module/cortex_a7/gnu/module_manager/src/tx_thread_interrupt_restore.s
View File

@@ -20,22 +20,18 @@
/**************************************************************************/
/**************************************************************************/
/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_restore for
applications calling this function from to 16-bit Thumb mode. */
.text
.align 2
.global $_tx_thread_interrupt_restore
$_tx_thread_interrupt_restore:
.thumb
BX pc // Switch to 32-bit mode
NOP //
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
.arm
STMFD sp!, {lr} // Save return address
BL _tx_thread_interrupt_restore // Call _tx_thread_interrupt_restore function
LDMFD sp!, {lr} // Recover saved return address
BX lr // Return to 16-bit caller
#endif
INT_MASK = 0x0C0
IRQ_MASK = 0x080
#ifdef TX_ENABLE_FIQ_SUPPORT
FIQ_MASK = 0x040
#endif
.text
.align 2
@@ -44,7 +40,7 @@ $_tx_thread_interrupt_restore:
/* FUNCTION RELEASE */
/* */
/* _tx_thread_interrupt_restore ARMv7-A */
/* 6.1.11 */
/* 6.x */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
@@ -77,17 +73,29 @@ $_tx_thread_interrupt_restore:
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-25-2022 Zhen Kong Updated comments, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _tx_thread_interrupt_restore
.type _tx_thread_interrupt_restore,function
_tx_thread_interrupt_restore:
/* Apply the new interrupt posture. */
MSR CPSR_c, r0 // Setup new CPSR
#ifdef __THUMB_INTERWORK
BX lr // Return to caller
#else
MOV pc, lr // Return to caller
TST r0, #IRQ_MASK
BNE no_irq
CPSIE i
no_irq:
#ifdef TX_ENABLE_FIQ_SUPPORT
TST r0, #FIQ_MASK
BNE no_fiq
CPSIE f
no_fiq:
#endif
BX lr // Return to caller

24
ports_module/cortex_a7/gnu/module_manager/src/tx_thread_irq_nesting_end.s
View File

@@ -20,6 +20,13 @@
/**************************************************************************/
/**************************************************************************/
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
.arm
#endif
#ifdef TX_ENABLE_FIQ_SUPPORT
DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts
#else
@@ -28,11 +35,6 @@ DISABLE_INTS = 0x80 // Disable IRQ interrupts
MODE_MASK = 0x1F // Mode mask
IRQ_MODE_BITS = 0x12 // IRQ mode bits
/* No 16-bit Thumb mode veneer code is needed for _tx_thread_irq_nesting_end
since it will never be called 16-bit mode. */
.arm
.text
.align 2
/**************************************************************************/
@@ -40,7 +42,7 @@ IRQ_MODE_BITS = 0x12 // IRQ mode bits
/* FUNCTION RELEASE */
/* */
/* _tx_thread_irq_nesting_end ARMv7-A */
/* 6.1.11 */
/* 6.x */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
@@ -82,8 +84,14 @@ IRQ_MODE_BITS = 0x12 // IRQ mode bits
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-25-2022 Zhen Kong Updated comments, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _tx_thread_irq_nesting_end
.type _tx_thread_irq_nesting_end,function
_tx_thread_irq_nesting_end:
@@ -96,8 +104,4 @@ _tx_thread_irq_nesting_end:
BIC r0, r0, #MODE_MASK // Clear mode bits
ORR r0, r0, #IRQ_MODE_BITS // Build IRQ mode CPSR
MSR CPSR_c, r0 // Reenter IRQ mode
#ifdef __THUMB_INTERWORK
BX r3 // Return to caller
#else
MOV pc, r3 // Return to caller
#endif

24
ports_module/cortex_a7/gnu/module_manager/src/tx_thread_irq_nesting_start.s
View File

@@ -20,15 +20,17 @@
/**************************************************************************/
/**************************************************************************/
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
.arm
#endif
IRQ_DISABLE = 0x80 // IRQ disable bit
MODE_MASK = 0x1F // Mode mask
SYS_MODE_BITS = 0x1F // System mode bits
/* No 16-bit Thumb mode veneer code is needed for _tx_thread_irq_nesting_start
since it will never be called 16-bit mode. */
.arm
.text
.align 2
/**************************************************************************/
@@ -36,7 +38,7 @@ SYS_MODE_BITS = 0x1F // System mode bits
/* FUNCTION RELEASE */
/* */
/* _tx_thread_irq_nesting_start ARMv7-A */
/* 6.1.11 */
/* 6.x */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
@@ -75,8 +77,14 @@ SYS_MODE_BITS = 0x1F // System mode bits
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-25-2022 Zhen Kong Updated comments, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _tx_thread_irq_nesting_start
.type _tx_thread_irq_nesting_start,function
_tx_thread_irq_nesting_start:
@@ -89,8 +97,4 @@ _tx_thread_irq_nesting_start:
// and push r1 just to keep 8-byte alignment
BIC r0, r0, #IRQ_DISABLE // Build enable IRQ CPSR
MSR CPSR_c, r0 // Enter system mode
#ifdef __THUMB_INTERWORK
BX r3 // Return to caller
#else
MOV pc, r3 // Return to caller
#endif

186
ports_module/cortex_a7/gnu/module_manager/src/tx_thread_schedule.s
View File

@@ -20,6 +20,13 @@
/**************************************************************************/
/**************************************************************************/
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
.arm
#endif
.global _tx_thread_execute_ptr
.global _tx_thread_current_ptr
.global _tx_timer_time_slice
@@ -32,15 +39,15 @@
#define SVC_MODE 0x13 // SVC mode
#define SYS_MODE 0x1F // SYS mode
#ifdef TX_ENABLE_FIQ_SUPPORT
#define ENABLE_INTS 0xC0 // IRQ & FIQ Interrupts enabled mask
#else
#define ENABLE_INTS 0x80 // IRQ Interrupts enabled mask
#endif
#define MODE_MASK 0x1F // Mode mask
#define THUMB_MASK 0x20 // Thumb bit mask
INT_MASK = 0x0C0
IRQ_MASK = 0x080
#ifdef TX_ENABLE_FIQ_SUPPORT
FIQ_MASK = 0x040
#endif
.global _txm_system_mode_enter
.global _txm_system_mode_exit
.global _txm_ttbr1_page_table
@@ -52,7 +59,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_thread_schedule Cortex-A7/MMU/GNU */
/* 6.2.1 */
/* 6.x */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -86,10 +93,16 @@
/* DATE NAME DESCRIPTION */
/* */
/* 03-08-2023 Scott Larson Initial Version 6.2.1 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
// VOID _tx_thread_schedule(VOID)
// {
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _tx_thread_schedule
.type _tx_thread_schedule,function
_tx_thread_schedule:
@@ -98,6 +111,7 @@ _tx_thread_schedule:
SVC 0
// We should never get here - ever!
BKPT 0x0000
_tx_scheduler_fault__:
B _tx_scheduler_fault__
// }
@@ -107,36 +121,37 @@ _tx_scheduler_fault__:
// SWI_Handler
/////////////////////////////////////////////////////////////////////
.global __tx_swi_interrupt // Software interrupt handler
#if defined(THUMB_MODE)
.thumb_func
#endif
.global __tx_swi_interrupt // Software interrupt handler
__tx_swi_interrupt:
STMFD sp!, {r0-r3, r12, lr} // Store the registers
MOV r1, sp // Set pointer to parameters
MRS r0, spsr // Get spsr
STMFD sp!, {r0, r3} // Store spsr onto stack and another
// register to maintain 8-byte-aligned stack
TST r0, #THUMB_MASK // Occurred in Thumb state?
LDRNEH r0, [lr,#-2] // Yes: Load halfword and...
BICNE r0, r0, #0xFF00 // ...extract comment field
LDREQ r0, [lr,#-4] // No: Load word and...
BICEQ r0, r0, #0xFF000000 // ...extract comment field
PUSH {r0-r3, r12, lr} // Store the registers
// r0 now contains SVC number
// r1 now contains pointer to stacked registers
MRS r0, spsr // Get spsr
TST r0, #THUMB_MASK // Occurred in Thumb state?
ITTEE NE
LDRHNE r1, [lr,#-2] // Yes: Load halfword and...
BICNE r1, r1, #0xFF00 // ...extract comment field
LDREQ r1, [lr,#-4] // No: Load word and...
BICEQ r1, r1, #0xFF000000 // ...extract comment field
// r1 now contains SVC number
// The service call is handled here
CMP r0, #0 // Is it a schedule request?
CMP r1, #0 // Is it a schedule request?
BEQ _tx_handler_svc_schedule // Yes, go there
CMP r0, #1 // Is it a system mode enter request?
CMP r1, #1 // Is it a system mode enter request?
BEQ _tx_handler_svc_super_enter // Yes, go there
CMP r0, #2 // Is it a system mode exit request?
CMP r1, #2 // Is it a system mode exit request?
BEQ _tx_handler_svc_super_exit // Yes, go there
LDR r2, =0x123456
CMP r0, r2 // Is it an ARM request?
CMP r1, r2 // Is it an ARM request?
BEQ _tx_handler_svc_arm // Yes, go there
/////////////////////////////////////////////////////////////////////
@@ -145,7 +160,7 @@ __tx_swi_interrupt:
// Unrecognized service call
.weak _tx_handler_svc_unrecognized
_tx_handler_svc_unrecognized:
BKPT 0x0000
_tx_handler_svc_unrecognized_loop: // We should never get here
B _tx_handler_svc_unrecognized_loop
@@ -156,7 +171,12 @@ _tx_handler_svc_unrecognized_loop: // We should never get here
_tx_handler_svc_super_enter:
// Make sure that we have been called from the system mode enter location (security)
LDR r2, =_txm_system_mode_enter // Load the address of the known call point
SUB r1, lr, #4 // Calculate the address of the actual call
BIC r2, #1 // Clear bit 0 of the symbol address (it is 1 in Thumb mode, 0 in ARM mode)
MOV r1, lr // Get return address
TST r0, #THUMB_MASK // Check if we come from Thumb mode or ARM mode
ITE NE
SUBNE r1, #2 // Calculate the address of the actual call (thumb mode)
SUBEQ r1, #4 // Calculate the address of the actual call (ARM mode)
CMP r1, r2 // Did we come from txm_module_manager_user_mode_entry?
BNE _tx_handler_svc_unrecognized // Return to where we came
@@ -167,7 +187,6 @@ _tx_handler_svc_super_enter:
STR r1, [r2, #0x9C] // Clear tx_thread_module_current_user_mode for thread
// Now we enter the system mode and return
LDMFD sp!, {r0, r3} // Get spsr from the stack
BIC r0, r0, #MODE_MASK // clear mode field
ORR r0, r0, #SYS_MODE // system mode code
MSR SPSR_cxsf, r0 // Restore the spsr
@@ -187,7 +206,13 @@ _tx_handler_svc_super_enter:
STRD r0, r1, [r2, #0x0C] // Set stack start and end
#endif
LDMFD sp!, {r0-r3, r12, pc}^ // Restore the registers and return
// Restore the registers and return
#if defined(THUMB_MODE)
POP {r0-r3, r12, lr}
SUBS pc, lr, #0
#else
LDMFD sp!, {r0-r3, r12, pc}^
#endif
/////////////////////////////////////////////////////////////////////
// SVC 2
@@ -196,7 +221,12 @@ _tx_handler_svc_super_enter:
_tx_handler_svc_super_exit:
// Make sure that we have been called from the system mode exit location (security)
LDR r2, =_txm_system_mode_exit // Load the address of the known call point
SUB r1, lr, #4 // Calculate the address of the actual call
BIC r2, #1 // Clear bit 0 of the symbol address (it is 1 in Thumb mode, 0 in ARM mode)
MOV r1, lr // Get return address
TST r0, #THUMB_MASK // Check if we come from Thumb mode or ARM mode
ITE NE
SUBNE r1, #2 // Calculate the address of the actual call (thumb mode)
SUBEQ r1, #4 // Calculate the address of the actual call (ARM mode)
CMP r1, r2 // Did we come from txm_module_manager_user_mode_entry?
BNE _tx_handler_svc_unrecognized // Return to where we came
@@ -207,7 +237,6 @@ _tx_handler_svc_super_exit:
STR r1, [r2, #0x9C] // Set tx_thread_module_current_user_mode for thread
// Now we enter user mode (exit the system mode) and return
LDMFD sp!, {r0, r3} // Get spsr from the stack
BIC r0, r0, #MODE_MASK // clear mode field
ORR r0, r0, #USR_MODE // user mode code
MSR SPSR_cxsf, r0 // Restore the spsr
@@ -225,7 +254,6 @@ _tx_handler_svc_super_exit:
LDRD r0, r1, [r2, #0xB4] // Load the module thread stack start and end
STRD r0, r1, [r2, #0x0C] // Set stack start and end
#endif
LDMFD sp!, {r0-r3, r12, pc}^ // Restore the registers and return
/////////////////////////////////////////////////////////////////////
// ARM Semihosting
@@ -234,10 +262,13 @@ _tx_handler_svc_arm:
// *** TODO: handle semihosting requests or ARM angel requests ***
// just return
LDMFD sp!, {r0, r3} // Get spsr from the stack
MSR SPSR_cxsf, r0 // Restore the spsr
LDMFD sp!, {r0-r3, r12, pc}^ // Restore the registers and return
// Restore the registers and return
#if defined(THUMB_MODE)
POP {r0-r3, r12, lr}
SUBS pc, lr, #0
#else
LDMFD sp!, {r0-r3, r12, pc}^
#endif
/////////////////////////////////////////////////////////////////////
// SVC 0
@@ -245,9 +276,7 @@ _tx_handler_svc_arm:
// At this point we have an SVC 0: enter the scheduler.
_tx_handler_svc_schedule:
LDMFD sp!, {r0, r3} // Get spsr from stack
MSR SPSR_cxsf, r0 // Restore spsr
LDMFD sp!, {r0-r3, r12, lr} // Restore the registers
POP {r0-r3, r12, lr} // Restore the registers
// This code waits for a thread control block pointer to appear in
// the _tx_thread_execute_ptr variable. Once a thread pointer appears
@@ -255,10 +284,11 @@ _tx_handler_svc_schedule:
/* Enable interrupts. */
MRS r2, CPSR // Pickup CPSR
BIC r0, r2, #ENABLE_INTS // Clear the disable bit(s)
MSR CPSR_cxsf, r0 // Enable interrupts
#ifdef TX_ENABLE_FIQ_SUPPORT
CPSIE if // Enable IRQ and FIQ interrupts
#else
CPSIE i // Enable IRQ interrupts
#endif
/* Wait for a thread to execute. */
// do
@@ -310,13 +340,14 @@ __tx_thread_schedule_loop:
// Determine if an interrupt frame or a synchronous task suspension frame is present.
CPS #SYS_MODE // Enter SYS mode
LDR sp, [r0, #8] // Switch to thread stack pointer
LDMIA sp!, {r4, r5} // Pickup the stack type and saved CPSR
POP {r4, r5} // Pickup the stack type and saved CPSR
CPS #SVC_MODE // Enter SVC mode
/////////////////////////////////////////////////////////////////////
// Set up MMU for module.
LDR r2, [r0, #0x94] // Pickup the module pointer
CMP r2, #0 // Valid module pointer?
IT NE
LDRNE r2, [r2, #0x64] // Load ASID
// Otherwise, ASID 0 & master table will be loaded.
// Is ASID already loaded?
@@ -329,15 +360,14 @@ __tx_thread_schedule_loop:
ISB
// Load new ASID and TTBR
LDR r1, =_txm_ttbr1_page_table // Load master TTBR
ORR r1, r1, #0x48 // OR it with #TTBR0_ATTRIBUTES
ORR r1, r1, #0x9 // OR it with #TTBR0_ATTRIBUTES
MCR p15, 0, r1, c2, c0, 0 // Change TTBR to master
ISB
DSB
MCR p15, 0, r2, c13, c0, 1 // Change ASID to new value
ISB
// Change TTBR to new value
MOV r3, #14
ADD r1, r1, r2, LSL r3
ADD r1, r1, r2, LSL #14 // r1 = _txm_ttbr1_page_table + (asid << 14)
MCR p15, 0, r1, c2, c0, 0 // Change TTBR to new value
// refresh TLB
@@ -377,8 +407,8 @@ _tx_skip_mmu_update:
_tx_skip_interrupt_vfp_restore:
#endif
LDMIA sp!, {r0-r12, lr} // Restore registers
ADD sp, sp, #4 // Fix stack pointer
POP {r0-r12, lr} // Restore registers
ADD sp, #4 // Fix stack pointer (skip PC saved on stack)
CPS #SVC_MODE // Enter SVC mode
SUBS pc, lr, #0 // Return to point of thread interrupt
@@ -397,7 +427,7 @@ _tx_solicited_return:
_tx_skip_solicited_vfp_restore:
#endif
LDMIA sp!, {r4-r11, lr} // Restore registers
POP {r4-r11, lr} // Restore registers
MOV r1, lr // Copy lr to r1 to preserve across mode change
CPS #SVC_MODE // Enter SVC mode
MSR SPSR_cxsf, r2 // Recover CPSR
@@ -408,40 +438,54 @@ _tx_skip_solicited_vfp_restore:
// End __tx_handler_swi
/////////////////////////////////////////////////////////////////////
#if defined(THUMB_MODE)
.thumb_func
#endif
.global tx_thread_vfp_enable
.type tx_thread_vfp_enable,function
tx_thread_vfp_enable:
MRS r2, CPSR // Pickup the CPSR
MRS r0, CPSR // Pickup current CPSR
#ifdef TX_ENABLE_FIQ_SUPPORT
CPSID if // Enable IRQ and FIQ interrupts
CPSID if // Disable IRQ and FIQ
#else
CPSID i // Enable IRQ interrupts
CPSID i // Disable IRQ
#endif
LDR r0, =_tx_thread_current_ptr // Build current thread pointer address
LDR r1, [r0] // Pickup current thread pointer
LDR r2, =_tx_thread_current_ptr // Build current thread pointer address
LDR r1, [r2] // Pickup current thread pointer
CMP r1, #0 // Check for NULL thread pointer
BEQ __tx_no_thread_to_enable // If NULL, skip VFP enable
MOV r0, #1 // Build enable value
STR r0, [r1, #144] // Set the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
__tx_no_thread_to_enable:
MSR CPSR_cxsf, r2 // Recover CPSR
BX LR // Return to caller
BEQ restore_ints // If NULL, skip VFP enable
MOV r2, #1 // Build enable value
STR r2, [r1, #144] // Set the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
B restore_ints
#if defined(THUMB_MODE)
.thumb_func
#endif
.global tx_thread_vfp_disable
.type tx_thread_vfp_disable,function
tx_thread_vfp_disable:
MRS r2, CPSR // Pickup the CPSR
MRS r0, CPSR // Pickup current CPSR
#ifdef TX_ENABLE_FIQ_SUPPORT
CPSID if // Enable IRQ and FIQ interrupts
CPSID if // Disable IRQ and FIQ
#else
CPSID i // Enable IRQ interrupts
CPSID i // Disable IRQ
#endif
LDR r0, =_tx_thread_current_ptr // Build current thread pointer address
LDR r1, [r0] // Pickup current thread pointer
LDR r2, =_tx_thread_current_ptr // Build current thread pointer address
LDR r1, [r2] // Pickup current thread pointer
CMP r1, #0 // Check for NULL thread pointer
BEQ __tx_no_thread_to_disable // If NULL, skip VFP disable
MOV r0, #0 // Build disable value
STR r0, [r1, #144] // Clear the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
__tx_no_thread_to_disable:
MSR CPSR_cxsf, r2 // Recover CPSR
BX LR // Return to caller
BEQ restore_ints // If NULL, skip VFP disable
MOV r2, #0 // Build disable value
STR r2, [r1, #144] // Clear the VFP enable flag (tx_thread_vfp_enable field in TX_THREAD)
restore_ints:
TST r0, #IRQ_MASK
BNE no_irq
CPSIE i
no_irq:
#ifdef TX_ENABLE_FIQ_SUPPORT
TST r0, #FIQ_MASK
BNE no_fiq
CPSIE f
no_fiq:
#endif
BX lr

74
ports_module/cortex_a7/gnu/module_manager/src/tx_thread_stack_build.s
View File

@@ -19,33 +19,24 @@
/** */
/**************************************************************************/
/**************************************************************************/
.arm
SVC_MODE = 0x13 // SVC mode
#ifdef TX_ENABLE_FIQ_SUPPORT
CPSR_MASK = 0xDF // Mask initial CPSR, IRQ & FIQ interrupts enabled
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
CPSR_MASK = 0x9F // Mask initial CPSR, IRQ interrupts enabled
.arm
#endif
USR_MODE = 0x10 // USR mode
SVC_MODE = 0x13 // SVC mode
SYS_MODE = 0x1F // SYS mode
THUMB_MASK = 0x20
/* Define the 16-bit Thumb mode veneer for _tx_thread_stack_build for
applications calling this function from to 16-bit Thumb mode. */
.text
.align 2
.thumb
.global $_tx_thread_stack_build
.type $_tx_thread_stack_build,function
$_tx_thread_stack_build:
BX pc // Switch to 32-bit mode
NOP //
.arm
STMFD sp!, {lr} // Save return address
BL _tx_thread_stack_build // Call _tx_thread_stack_build function
LDMFD sp!, {lr} // Recover saved return address
BX lr // Return to 16-bit caller
#ifdef TX_ENABLE_FIQ_SUPPORT
CPSR_MASK = 0xFF // Mask initial CPSR, T, IRQ & FIQ interrupts enabled
#else
CPSR_MASK = 0xBF // Mask initial CPSR, T, IRQ interrupts enabled
#endif
.text
.align 2
@@ -54,7 +45,7 @@ $_tx_thread_stack_build:
/* FUNCTION RELEASE */
/* */
/* _tx_thread_stack_build ARMv7-A */
/* 6.1.11 */
/* 6.x */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
@@ -89,8 +80,14 @@ $_tx_thread_stack_build:
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-25-2022 Zhen Kong Updated comments, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _tx_thread_stack_build
.type _tx_thread_stack_build,function
_tx_thread_stack_build:
@@ -128,6 +125,15 @@ _tx_thread_stack_build:
MOV r3, #1 // Build interrupt stack type
STR r3, [r2, #0] // Store stack type
MRS r3, CPSR // Pickup CPSR
BIC r3, #CPSR_MASK // Mask mode bits of CPSR
ORR r3, #SYS_MODE // Build CPSR, SYS mode, interrupts enabled
TST r1, #1 // Check if the initial PC is a Thumb function
IT NE
ORRNE r3, #THUMB_MASK // If the initial PC is a thumb function, CPSR must reflect this
STR r3, [r2, #4] // Store initial CPSR
MOV r3, #0 // Build initial register value
STR r3, [r2, #8] // Store initial r0
STR r3, [r2, #12] // Store initial r1
@@ -139,26 +145,20 @@ _tx_thread_stack_build:
STR r3, [r2, #36] // Store initial r7
STR r3, [r2, #40] // Store initial r8
STR r3, [r2, #44] // Store initial r9
LDR r3, [r0, #12] // Pickup stack starting address
STR r3, [r2, #48] // Store initial r10 (sl)
LDR r3,=_tx_thread_schedule // Pickup address of _tx_thread_schedule for GDB backtrace
STR r3, [r2, #60] // Store initial r14 (lr)
MOV r3, #0 // Build initial register value
STR r3, [r2, #52] // Store initial r11
STR r3, [r2, #56] // Store initial r12
STR r1, [r2, #64] // Store initial pc
STR r3, [r2, #68] // 0 for back-trace
MRS r1, CPSR // Pickup CPSR
BIC r1, r1, #CPSR_MASK // Mask mode bits of CPSR
ORR r3, r1, #SVC_MODE // Build CPSR, SVC mode, interrupts enabled
STR r3, [r2, #4] // Store initial CPSR
LDR r3, [r0, #12] // Pickup stack starting address
STR r3, [r2, #48] // Store initial r10 (sl)
LDR r3,=_tx_thread_schedule // Pickup address of _tx_thread_schedule for GDB backtrace
STR r3, [r2, #60] // Store initial r14 (lr)
STR r1, [r2, #64] // Store initial pc
/* Setup stack pointer. */
STR r2, [r0, #8] // Save stack pointer in thread's
// control block
#ifdef __THUMB_INTERWORK
BX lr // Return to caller
#else
MOV pc, lr // Return to caller
#endif

49
ports_module/cortex_a7/gnu/module_manager/src/tx_thread_system_return.s
View File

@@ -20,32 +20,18 @@
/**************************************************************************/
/**************************************************************************/
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
.arm
#endif
.global _tx_thread_current_ptr
.global _tx_timer_time_slice
.global _tx_thread_schedule
/* Define the 16-bit Thumb mode veneer for _tx_thread_system_return for
applications calling this function from to 16-bit Thumb mode. */
.text
.align 2
.global $_tx_thread_system_return
.type $_tx_thread_system_return,function
$_tx_thread_system_return:
.thumb
BX pc // Switch to 32-bit mode
NOP //
.arm
STMFD sp!, {lr} // Save return address
BL _tx_thread_system_return // Call _tx_thread_system_return function
LDMFD sp!, {lr} // Recover saved return address
BX lr // Return to 16-bit caller
SYS_MODE = 0x1F // SYS mode
.text
.align 2
@@ -54,7 +40,7 @@ $_tx_thread_system_return:
/* FUNCTION RELEASE */
/* */
/* _tx_thread_system_return ARMv7-A */
/* 6.1.11 */
/* 6.x */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
@@ -92,15 +78,21 @@ $_tx_thread_system_return:
/* resulting in version 6.1.9 */
/* 04-25-2022 Zhen Kong Updated comments, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _tx_thread_system_return
.type _tx_thread_system_return,function
_tx_thread_system_return:
/* Save minimal context on the stack. */
STMDB sp!, {r4-r11, lr} // Save minimal context
PUSH {r4-r11, lr} // Save minimal context
LDR r4, =_tx_thread_current_ptr // Pickup address of current ptr
LDR r5, [r4] // Pickup current thread pointer
@@ -117,15 +109,16 @@ _tx_skip_solicited_vfp_save:
#endif
MOV r0, #0 // Build a solicited stack type
MRS r1, CPSR // Pickup the CPSR
STMDB sp!, {r0-r1} // Save type and CPSR
/* Lockout interrupts. */
MRS r1, CPSR // Pickup the CPSR, T bit is always cleared by hardware
TST lr, #1 // Check if calling function is in Thumb mode
IT NE
ORRNE r1, #0x20 // Set the T bit so that the correct mode is set on return
PUSH {r0-r1} // Save type and CPSR
#ifdef TX_ENABLE_FIQ_SUPPORT
CPSID if // Disable IRQ and FIQ interrupts
CPSID if // Disable IRQ and FIQ
#else
CPSID i // Disable IRQ interrupts
CPSID i // Disable IRQ
#endif
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))

16
ports_module/cortex_a7/gnu/module_manager/src/tx_thread_vectored_context_save.s
View File

@@ -19,17 +19,21 @@
/** */
/**************************************************************************/
/**************************************************************************/
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
.arm
#endif
.global _tx_thread_system_state
.global _tx_thread_current_ptr
.global _tx_execution_isr_enter
/* No 16-bit Thumb mode veneer code is needed for _tx_thread_vectored_context_save
since it will never be called 16-bit mode. */
.arm
.text
.align 2
/**************************************************************************/
@@ -37,7 +41,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_thread_vectored_context_save ARMv7-A */
/* 6.1.11 */
/* 6.x */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
@@ -74,8 +78,14 @@
/* resulting in version 6.1.9 */
/* 04-25-2022 Zhen Kong Updated comments, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _tx_thread_vectored_context_save
.type _tx_thread_vectored_context_save,function
_tx_thread_vectored_context_save:

43
ports_module/cortex_a7/gnu/module_manager/src/tx_timer_interrupt.s
View File

@@ -20,8 +20,12 @@
/**************************************************************************/
/**************************************************************************/
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
.arm
#endif
/* Define Assembly language external references... */
@@ -34,26 +38,6 @@
.global _tx_timer_expired
.global _tx_thread_time_slice
/* Define the 16-bit Thumb mode veneer for _tx_timer_interrupt for
applications calling this function from to 16-bit Thumb mode. */
.text
.align 2
.thumb
.global $_tx_timer_interrupt
.type $_tx_timer_interrupt,function
$_tx_timer_interrupt:
BX pc // Switch to 32-bit mode
NOP //
.arm
STMFD sp!, {lr} // Save return address
BL _tx_timer_interrupt // Call _tx_timer_interrupt function
LDMFD sp!, {lr} // Recover saved return address
BX lr // Return to 16-bit caller
.text
.align 2
/**************************************************************************/
@@ -61,7 +45,7 @@ $_tx_timer_interrupt:
/* FUNCTION RELEASE */
/* */
/* _tx_timer_interrupt ARMv7-A */
/* 6.1.11 */
/* 6.x */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
@@ -98,8 +82,14 @@ $_tx_timer_interrupt:
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 04-25-2022 Zhen Kong Updated comments, */
/* resulting in version 6.1.11 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _tx_timer_interrupt
.type _tx_timer_interrupt,function
_tx_timer_interrupt:
@@ -191,7 +181,7 @@ __tx_timer_done:
__tx_something_expired:
STMDB sp!, {r0, lr} // Save the lr register on the stack
PUSH {r0, lr} // Save the lr register on the stack
// and save r0 just to keep 8-byte alignment
/* Did a timer expire? */
@@ -219,13 +209,8 @@ __tx_timer_dont_activate:
__tx_timer_not_ts_expiration:
LDMIA sp!, {r0, lr} // Recover lr register (r0 is just there for
// the 8-byte stack alignment
POP {r0, lr} // Recover lr register (r0 is just there for the 8-byte stack alignment
__tx_timer_nothing_expired:
#ifdef __THUMB_INTERWORK
BX lr // Return to caller
#else
MOV pc, lr // Return to caller
#endif

25
ports_module/cortex_a7/gnu/module_manager/src/txm_module_manager_thread_stack_build.s
View File

@@ -20,6 +20,12 @@
/**************************************************************************/
/**************************************************************************/
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
.arm
#endif
#define THUMB_MASK 0x20 // THUMB bit
#define USR_MODE 0x10 // USR mode
@@ -35,7 +41,7 @@
/* FUNCTION RELEASE */
/* */
/* _txm_module_manager_thread_stack_build Cortex-A7/MMU/GNU */
/* 6.2.1 */
/* 6.x */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -68,11 +74,18 @@
/* DATE NAME DESCRIPTION */
/* */
/* 03-08-2023 Scott Larson Initial Version 6.2.1 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
// VOID _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *))
// {
.text
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _txm_module_manager_thread_stack_build
.type _txm_module_manager_thread_stack_build, "function"
_txm_module_manager_thread_stack_build:
@@ -132,13 +145,15 @@ _txm_module_manager_thread_stack_build:
STR r1, [r2, #64] // Store initial pc
STR r3, [r2, #68] // 0 for back-trace
MRS r3, CPSR // Pickup CPSR
BIC r3, r3, #CPSR_MASK // Mask mode bits of CPSR
BIC r3, #CPSR_MASK // Mask mode bits of CPSR
TST r1, #1 // Test if THUMB bit set in initial PC
ORRNE r3, r3, #THUMB_MASK // Set T bit if set
IT NE
ORRNE r3, #THUMB_MASK // Set T bit if set
LDR r1, [r0, #156] // Load tx_thread_module_current_user_mode
TST r1, #1 // Test if the flag is set
ORREQ r3, r3, #SYS_MODE // Flag not set: Build CPSR, SYS mode, IRQ enabled
ORRNE r3, r3, #USR_MODE // Flag set: Build CPSR, USR mode, IRQ enabled
ITE EQ
ORREQ r3, #SYS_MODE // Flag not set: Build CPSR, SYS mode, IRQ enabled
ORRNE r3, #USR_MODE // Flag set: Build CPSR, USR mode, IRQ enabled
STR r3, [r2, #4] // Store initial CPSR
/* Setup stack pointer. */

28
ports_module/cortex_a7/gnu/module_manager/src/txm_module_manager_user_mode_entry.s
View File

@@ -19,16 +19,21 @@
/** */
/**************************************************************************/
/**************************************************************************/
.syntax unified
#if defined(THUMB_MODE)
.thumb
#else
.arm
#endif
.global _txm_module_manager_kernel_dispatch
.global _txm_system_mode_enter
.global _txm_system_mode_exit
/**************************************************************************/
/* */
/* FUNCTION RELEASE */
/* */
/* _txm_module_manager_user_mode_entry Cortex-A7/MMU/GNU */
/* 6.2.1 */
/* 6.x */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -59,23 +64,38 @@
/* DATE NAME DESCRIPTION */
/* */
/* 03-08-2023 Scott Larson Initial Version 6.2.1 */
/* xx-xx-xxxx Yajun Xia Updated comments, */
/* Added thumb mode support, */
/* resulting in version 6.x */
/* */
/**************************************************************************/
.text
.align 12
.eabi_attribute Tag_ABI_align_preserved, 1
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _txm_module_manager_user_mode_entry
.type _txm_module_manager_user_mode_entry, "function"
_txm_module_manager_user_mode_entry:
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _txm_system_mode_enter
_txm_system_mode_enter:
SVC 1 // Get out of user mode
_txm_module_priv:
// At this point, we are in system mode.
// Save LR (and r3 for 8 byte aligned stack) and call the kernel dispatch function.
PUSH {r3, lr}
BL _txm_module_manager_kernel_dispatch
POP {r3, lr}
#if defined(THUMB_MODE)
.thumb_func
#endif
.global _txm_system_mode_exit
_txm_system_mode_exit:
// Trap to restore user mode while inside of ThreadX

10
test/ports/azrtos_cicd.csv
View File

@@ -133,11 +133,11 @@
"ThreadX Modules for Cortex M33 using the ARM compiler v6", "TXM ThreadX Modules ARM Cortex M33 ARM compiler v6 KEIL MDK v5", "ports_module\cortex_m33\ac6\example_build", "Win32NT", "azrtos_setenv_mdk5.bat", "azrtos_clean_txm_tz_mdk5.bat", "azrtos_setenv_mdk5.bat", "azrtos_build_txm_tz_mdk5.bat", "", ""
"ThreadX Modules for Cortex A35 using the ARM compiler v6", "TXM ThreadX Modules ARM Cortex A35 ARMv8-A ARM compiler v6", "ports_module\cortex_a35\ac6\example_build", "Win32NT", "azrtos_setenv_arm_ds.bat", "azrtos_clean_txm_arm_ds.bat", "azrtos_setenv_arm_ds.bat", "azrtos_build_txm_arm_ds.bat", "", ""
### GCC
"ThreadX Modules for Cortex M0+ using the GNU Compiler Collection", "TXM ThreadX Modules ARM Cortex M0+ GNU GCC", "ports_module\cortex_m0+\gnu\example_build", "Win32NT", "azrtos_setenv_arm_ds.bat", "azrtos_clean_txm_arm_ds.bat", "azrtos_build_txm_arm_ds.bat", "", ""
"ThreadX Modules for Cortex M3 using the GNU Compiler Collection", "TXM ThreadX Modules ARM Cortex M3 GNU GCC", "ports_module\cortex_m3\gnu\example_build", "Win32NT", "azrtos_setenv_arm_ds.bat", "azrtos_clean_txm_arm_ds.bat", "azrtos_build_txm_arm_ds.bat", "", ""
"ThreadX Modules for Cortex M4 using the GNU Compiler Collection", "TXM ThreadX Modules ARM Cortex M4 GNU GCC", "ports_module\cortex_m4\gnu\example_build", "Win32NT", "azrtos_setenv_arm_ds.bat", "azrtos_clean_txm_arm_ds.bat", "azrtos_build_txm_arm_ds.bat", "", ""
"ThreadX Modules for Cortex M7 using the GNU Compiler Collection", "TXM ThreadX Modules ARM Cortex M7 GNU GCC", "ports_module\cortex_m7\gnu\example_build", "Win32NT", "azrtos_setenv_arm_ds.bat", "azrtos_clean_txm_arm_ds.bat", "azrtos_build_txm_arm_ds.bat", "", ""
"ThreadX Modules for Cortex A35 using the GNU Compiler Collection", "TXM ThreadX Modules ARM Cortex A35 ARMv8-A GNU GCC", "ports_module\cortex_a35\gnu\example_build", "Win32NT", "azrtos_setenv_arm_ds.bat", "azrtos_clean_txm_arm_ds.bat", "azrtos_build_txm_arm_ds.bat", "", ""
"ThreadX Modules for Cortex M0+ using the GNU Compiler Collection", "TXM ThreadX Modules ARM Cortex M0+ GNU GCC", "ports_module\cortex_m0+\gnu\example_build", "Win32NT", "azrtos_setenv_arm_ds.bat", "azrtos_clean_txm_arm_ds.bat", "azrtos_setenv_arm_ds.bat", "azrtos_build_txm_arm_ds.bat", "", ""
"ThreadX Modules for Cortex M3 using the GNU Compiler Collection", "TXM ThreadX Modules ARM Cortex M3 GNU GCC", "ports_module\cortex_m3\gnu\example_build", "Win32NT", "azrtos_setenv_arm_ds.bat", "azrtos_clean_txm_arm_ds.bat", "azrtos_setenv_arm_ds.bat", "azrtos_build_txm_arm_ds.bat", "", ""
"ThreadX Modules for Cortex M4 using the GNU Compiler Collection", "TXM ThreadX Modules ARM Cortex M4 GNU GCC", "ports_module\cortex_m4\gnu\example_build", "Win32NT", "azrtos_setenv_arm_ds.bat", "azrtos_clean_txm_arm_ds.bat", "azrtos_setenv_arm_ds.bat", "azrtos_build_txm_arm_ds.bat", "", ""
"ThreadX Modules for Cortex M7 using the GNU Compiler Collection", "TXM ThreadX Modules ARM Cortex M7 GNU GCC", "ports_module\cortex_m7\gnu\example_build", "Win32NT", "azrtos_setenv_arm_ds.bat", "azrtos_clean_txm_arm_ds.bat", "azrtos_setenv_arm_ds.bat", "azrtos_build_txm_arm_ds.bat", "", ""
"ThreadX Modules for Cortex A35 using the GNU Compiler Collection", "TXM ThreadX Modules ARM Cortex A35 ARMv8-A GNU GCC", "ports_module\cortex_a35\gnu\example_build", "Win32NT", "azrtos_setenv_arm_ds.bat", "azrtos_clean_txm_arm_ds.bat", "azrtos_setenv_arm_ds.bat", "azrtos_build_txm_arm_ds.bat", "", ""
##############################################################################
# ThreadX SMP
##############################################################################
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