Commit Graph

2660 Commits

Author SHA1 Message Date
Bamboo
57e5417ce2 Release 10.1.1
Update VERSION
Update CHANGES
10.1.1
2018-11-12 05:17:02 +11:00
Rafal Kolanski
d12bb374ab remove theoretical uninitialised variable use in infer_cpu_gic_id
The C semantics used by our binary correctness mechanism understand
uninitialised variables as non-deterministic assignment. The translation
to a simplified form suitable for further analysis occurs on a
per-function basis which does not support non-determinism. This means
uninitialised local variables must not be used for decision making in
any function.

In infer_cpu_gic_id, 'target' is initialised in the loop, which will not
be executed if nirqs <= 0, after which the uninitialised 'target' is
examined. We address this by initialising 'target' to 0.

The overall C code is still safe, as infer_cpu_gic_id is only called
once in dist_init, where 0 < nirqs.
2018-11-08 16:28:55 +11:00
Bamboo
7d16e3dcae Update VERSION file to 10.1.0-dev 2018-11-07 14:47:15 +11:00
Bamboo
a3c341adc4 Release 10.1.0
Update VERSION
Update CHANGES
10.1.0
2018-11-07 14:47:15 +11:00
Anna Lyons
567c30442b CHANGES: update for upcoming release
Add notes for changes missed during development.
2018-11-07 14:47:09 +11:00
Peter Chubb
896e864431 TX2: Add initial TX2 support
See CHANGES and https://docs.sel4.systems/Hardware/ for more information
2018-11-07 11:52:51 +11:00
Kent McLeod
69b14e80f4 gic_pl390: Infer CPU target ID instead of using 0
The CPU target ID can be calculated from the GIC by reading the
interrupt target registers for private interrupts that are RO and are
guaranteed to return the current target ID.
2018-11-07 11:52:46 +11:00
Kofi Doku Atuah
a96e005924 TCB API: Fix minor discrepancy: seL4_CNode was used for VSpace roots 2018-11-06 10:40:17 +11:00
Kofi Doku Atuah
f1f6f975b6 Document the behaviour of bound notification signals
Specifically, what happens when a TCB is bound to a notification,
and that notification gets signaled while in the TCB is in the middle
of waiting during seL4_Call's receive phase.
2018-10-30 14:51:53 +11:00
Curtis Millar
b203026382 Store TLS_BASE in globals frame on fastpath switch.
The TLS_BASE stored in the globals frame needs to refer to the TLS_BASE
of the current thread and so must be maintained across all context
switches. (This was only being maintained on the slow path).
2018-10-24 09:17:43 +11:00
Kofi Doku Atuah
b3aebb3a4a ARM: HYP: Document functions that update the s2 translation base 2018-10-12 18:44:36 +02:00
Kofi Doku Atuah
47fd1a6abe ARM: HYP: Fix bug in VMID update
The VTTBR register is found at coprocessor address p15, 6
and not p15, 4.
2018-10-12 18:38:42 +02:00
Edward Pierzchalski
1283345bfd bitfield_gen: merge clarsimp/simp in generated proofs
The old generated proofs would fail if a simp set change made
`clarsimp` discharge what `simp` simplified.
2018-10-02 14:41:21 +10:00
Axel Heider
8cf34ab395 add missing include for config.h
These files contain conditional parts which depends on CONFIG_PLAT_xxx being set, thus they must include config.h.
2018-09-24 11:03:14 +02:00
Anna Lyons
db3e18b7e4 SELFOUR-1491: error if set trigger not supported
So far this is only implemented for the GIC, which most of our platforms
use. Error if this invocation is made on another platform, and guard
calls to the trigger function if it is not supported.
2018-09-19 12:17:52 +10:00
Mitchell Buckley
0c51eabdbe SELFOUR-1491: Modified Arch_invokeIRQControl
It will now return the value coming from invokeIRQControl directly.
2018-09-19 12:06:35 +10:00
Mitchell Buckley
f4f6b156e3 SELFOUR-1491: verification updates
- renamed an architecture label so that it begins with ARM.
- changed setIRQTrigger so that it takes a boolean value instead of an int.
- Arch_decodeIRQControlInvocation converts the second argument (trigger)
to a boolean immediately.
2018-09-19 12:06:35 +10:00
Anna Lyons
eb0553fa75 SELFOUR-1491: add seL4_IRQCOntrol_GetTrigger
Add a new invocation which allows an irq handler capability to be
obtained with a specific trigger method (edge or level). Obtaining
this capability modifies the GIC state.
2018-09-19 12:06:35 +10:00
Anna Lyons
5539b9e8b3 docs: s/depth of 32/depth equivalent to the wordsize 2018-09-19 12:06:35 +10:00
Anna Lyons
ffbb278305 trivial: move MS_IN_S to utils.h 2018-09-18 10:05:26 +10:00
Anna Lyons
63a9e6bac5 Update MS_IN_S to be llu
If verification ever see this constant the proofs are much nicer if the
type is specified.
2018-09-18 10:04:22 +10:00
Anna Lyons
be64f7e2da trivial: s/MS_PER_S/MS_IN_S
This is consistent with time defintions on the new-rt branch of the
kernel.
2018-09-18 10:03:39 +10:00
Chris Guikema
9a3449a42f riscv: move virtual memory fence after address space switch
While the RISC-V ISA says to that a VMFENCE before a write to the
satp may be necessary, vm faults occur with this ordering when
running on the Rocket Chip. Placing the VMFENCE after the satp write
resolves these faults.

This is also the ordering used in the RISC-V port of Linux when
switching MMU contexts.

Change-Id: I1ec794651d080a5e7a987fa8b2062dc01daeb683
2018-09-18 09:55:48 +10:00
Chris Guikema
2d498cb23d riscv: add spike instance for hi-five freedom unleashed board
Change-Id: Id43de3638156b39c2fdc5af7d8c54c2aac6f2709
2018-09-18 09:55:48 +10:00
Chris Guikema
dfa4a35854 riscv: cmake support for different spike instances
Change-Id: I77eec6f3ef8fd18c112201e823df6ffa6a5fd3d1
2018-09-18 09:55:48 +10:00
Chris Guikema
b63d026b61 riscv: add cycle count for scheduling timer.
This commit adds a cmake variable for the Clock Frequency used
in the rdtime instruction, which is used for the scheduling tick.

The resetTimer and initTimer functions were updated to use a
calculated cycle count, which is based on the clock frequency and
the timer tick variable.

Change-Id: I130013003ed2c4aec8d5d294624413ee05477d58
2018-09-18 09:55:48 +10:00
Axel Heider
924d1c2639 zynqmp: add Ultra96 platform
Add Ultra96 platform, which is based on the zynqmp SoC
2018-09-14 16:16:23 +02:00
Anna Lyons
4e910ebfbb python deps: add seL4 tutorial deps 2018-09-14 17:08:05 +10:00
Kent McLeod
5ee9dec227 CMake: Move APPLE host check into x86 branch
This is to more clearly record the OSX host + x86 target assumption
when setting CROSS_COMPILER_PREFIX to "x86_64-unknown-linux-gnu-"
2018-09-10 15:57:19 +10:00
Ilya Yanok
a5a1efeaf5 Use Linux cross-compiler if building for x86_64 on OS X
Even if we are building for x86_64, we still need a cross compiler to be able to
build ELF binaries.

OS X cross compilers can be installed via brew from here:
https://github.com/SergioBenitez/homebrew-osxct
2018-09-10 15:57:19 +10:00
Ilya Yanok
03a07bef6e libsel4: rename sel4_gen custom target to sel4_generated
add_config_library for sel4 adds sel4_Gen custom target. Having two targets with
names that only differ in case results in strange build problems on systems with
case insensitive file systems (I've seen it only on OS X but I assume Win is
affected too).
2018-09-10 15:57:19 +10:00
Adam Felizzi
bc4580c64e parse_doxygen: Removed tab in Markdown doc format
Removed a trailing tab character in the Markdown API doc format
string.
2018-09-04 12:05:06 +10:00
Kent McLeod
02c9895f66 CMake: Add missing dependency to CPPFile function 2018-09-03 11:11:51 +10:00
Anna Lyons
f33035f053 aarch32: remove obselete code in traps.S
The stack is loaded on the preceding lines of code from
TPIDRPRW, regardless of SMP being enabled or not. Loading ksCurThread
into r7 is from the previous approach of loading the kernel stack and is
not longer used.
2018-08-31 10:44:16 +10:00
Adam Felizzi
43b7bca872 CMake: CPPFile EXACT_NAME creates a temp copy
Modified the behaviour of the EXACT_INPUT option within the
CPPFile helper function. Now named EXACT_NAME, the option
copies the input file to a temporary file. The name of the
temporary file is also passed in by the caller. This
step in necessary in getting the CPP step to correctly
depend on the targets given by the caller
(through EXTRA_DEPS). Also updated the CPP generation of the
kernel_all.i file to reflect the change.
2018-08-27 10:18:10 +10:00
Adam Felizzi
2bf255c8a3 tools: Ignore option for circular_includes script
Added an "ignore" argument to the circular_includes script. This
allows the caller to specify files for the script to ignore when
it parses the source file. Rather than creating a special
ignore case for "kernel_all.c" in the script itself, the user
parses the file as an argument (plus others if needed). Updated
the kernels cmake file to reflect the change.
2018-08-27 10:18:10 +10:00
Kent McLeod
880686dd22 bitfield_gen: Improve prune list generation time
Previously this would create a very big regex to parse the input
sources. This didn't scale as well on architectures with more bitfield
objects
2018-08-24 16:57:31 +10:00
Thomas Sewell
e11d930bc4 Move some lockTLB magic into C.
This patch moves the 'outer' chunk of lockTLBEntry into C rather
than handwritten assembly. The outer chunk accesses a global
counter and does arithmetic. The inner chunk (lockTLBEntryCritical)
writes to the registers, must be specially aligned, and is generally
special.

The change reduces unnecessary handwritten assembly, and also avoids
a special case that was problematic for binary verification.
2018-08-22 15:06:51 +10:00
Thomas Sewell
f6a88c6bad Retire boot_ctzl.
This was a workaround for a problem that was properly fixed in
f8606c86 however the boot_ctzl version somehow persisted.
2018-08-13 15:03:31 +10:00
Thomas Sewell
fa4568ed2d Drop SEL4_PACKED from types used by seL4.
It has become clear that the 'packed' GCC attribute affects the
memory semantics of C in a way that the verification tools do not
understand. The bootinfo types are used by kernel boot code (not
currently verified, but covered by binary verification) and should
not use this attribute.

This is a source-compatible but not binary-compatible change.
2018-08-10 16:18:58 +10:00
Curtis Millar
d419b41c7b Remove attribute for RISCV as well 2018-08-10 13:35:31 +10:00
Curtis Millar
3f702e5d02 Erroneous const attribute from void function.
This raises compile errors when compiling for aarch64.

From the [GCC Manual](https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#Common-Function-Attributes):

> Note that a function that has pointer arguments and examines the data
> pointed to must _not_ be declared const.
2018-08-10 13:35:31 +10:00
Adam Felizzi
72e675f1da Kbuild: Removed Kbuild
Removed all Kbuild/Kconfig/Makefiles from the kernel as we migrate
to a CMake only build system. Kbuild is no longer supported.
2018-08-10 10:38:53 +10:00
Adam Felizzi
4c265f369e Kbuild: Removed autoconf files
Removed the autoconf files for the various kernel platforms. This
is since we no longer support Kbuild in the kernel.
2018-08-10 10:38:53 +10:00
Adam Felizzi
a9fe71ea8d tools: Added astyle,pylint and xmllint checks
Added small bash scripts to run astyle, pylint and xmllint
checks over the kernel source. These style checks were ported
from the old Make build system.
2018-08-10 10:38:53 +10:00
Adam Felizzi
9bd2b784c1 zynqmp: Added CMake support
Added support for building the zynqmp platform with CMake.
2018-08-10 10:12:03 +10:00
Kent McLeod
9d218f8ca2 intel-vtd: Improve DMA fault error helpfulness
The error will now split the source up into bus,dev,func components.
2018-08-09 15:52:17 +10:00
Adrian Danis
3eefc3e7c2 riscv: Make room for devices in rv32
Leaves the last entry in the top level page table free so that it can be used for mapping
devices in the future. This moves the kernel image down to the second last entry in the
top level page table. Leaving the last entry in the top level page table also matches the
rv64 design.
2018-08-09 12:36:28 +10:00
Adrian Danis
e009e99b56 riscv: Trivial cleanup in map_kernel_window 2018-08-09 10:43:42 +10:00
Adrian Danis
2112cd6e7d riscv: Explicit single level 2 page table
Only a single level 2 page table is now used for mapping the kernel image so this simplifies
the state data to only allocate a single PT and removes the now out of date description.
2018-08-09 10:43:42 +10:00