ARM64: Add option to ignore SErrors

By default any SError interrupt will halt the kernel. SErrors
may be caused by e.g. writes to read-only device registers or
uncorrectable ECC errors.

When this option is enabled SErrors will be ignored.

Enable this option for the TX2 platform.

Signed-off-by: Indan Zupancic <Indan.Zupancic@mep-info.com>

src/arch/arm/64/traps.S

@@ -141,7 +141,7 @@ BEGIN_FUNC(cur_el_irq)
 END_FUNC(cur_el_irq)
 
 BEGIN_FUNC(cur_el_serr)
-#ifdef CONFIG_PLAT_TX2
+#ifdef CONFIG_AARCH64_SERROR_IGNORE
     eret
 #else
     b       invalid_vector_entry
@@ -234,7 +234,7 @@ BEGIN_FUNC(lower_el_irq)
 END_FUNC(lower_el_irq)
 
 BEGIN_FUNC(lower_el_serr)
-#ifdef CONFIG_PLAT_TX2
+#ifdef CONFIG_AARCH64_SERROR_IGNORE
     eret
 #else
     b       invalid_vector_entry

src/arch/arm/config.cmake

@@ -183,6 +183,16 @@ config_option(
     DEFAULT_DISABLED OFF
 )
 
+config_option(
+    KernelAArch64SErrorIgnore AARCH64_SERROR_IGNORE
+    "By default any SError interrupt will halt the kernel. SErrors may \
+    be caused by e.g. writes to read-only device registers or ECC errors. \
+    When this option is enabled SErrors will be ignored."
+    DEFAULT OFF
+    DEPENDS "KernelSel4ArchAarch64;NOT KernelVerificationBuild"
+)
+mark_as_advanced(KernelAArch64SErrorIgnore)
+
 if(KernelAArch32FPUEnableContextSwitch OR KernelSel4ArchAarch64)
     set(KernelHaveFPU ON)
 endif()

src/plat/tx2/config.cmake

@@ -15,6 +15,7 @@ if(KernelPlatformTx2)
     set(KernelArmCortexA57 ON)
     set(KernelArchArmV8a ON)
     set(KernelArmSMMU ON)
+    set(KernelAArch64SErrorIgnore ON)
     config_set(KernelARMPlatform ARM_PLAT tx2)
     config_set(KernelArmMach MACH "nvidia")
     list(APPEND KernelDTSList "tools/dts/tx2.dts")