bsps/imxrt1166*: Absolute address for pins in FDT

The i.MXRT1166 has three iomux controllers. The driver in RTEMS
(originally for i.MX6) doesn't support that. Switching to absolute
addresses for the pins in the FDT works around that.

Compared to changing the IOMUX driver, it has the following advantages:

- If a devicetree is written, the pinctrl-groups don't have to be split
up between different iomux controllers which makes device trees simpler
to read.

- A driver or application doesn't has to handle multiple pinctrl-groups
which simplifies the drivers.

bsps/arm/imxrt/dts/imxrt1166-cm7-saltshaker.dts

@@ -277,9 +277,7 @@
 			IMXRT_PAD_GPIO_AD_19_GPIO9_IO18		0x00
 		>;
 	};
-};
 
-&iomuxc_lpsr {
 	pinctrl_lpi2c5: lpi2c5grp {
 		fsl,pins = <
 			IMXRT_PAD_GPIO_LPSR_09_LPI2C5_SCL	0x40000011
@@ -303,6 +301,3 @@
 		>;
 	};
 };
-
-&iomuxc_snvs {
-};

bsps/arm/imxrt/include/imxrt/imxrt1166.dtsi

@@ -103,9 +103,7 @@
 		iee-apc = &iee_apc;
 		iomuxc = &iomuxc;
 		iomuxc-gpr = &iomuxc_gpr;
-		iomuxc-lpsr = &iomuxc_lpsr;
 		iomuxc-lpsr-gpr = &iomuxc_lpsr_gpr;
-		iomuxc-snvs = &iomuxc_snvs;
 		iomuxc-snvs-gpr = &iomuxc_snvs_gpr;
 		keymgr = &keymgr;
 		kpp = &kpp;
@@ -213,6 +211,25 @@
 		interrupt-parent = <&nvic>;
 		ranges;
 
+		iomuxc: pinctrl@0 {
+			compatible = "nxp,imxrt1166-iomuxc",
+			             "nxp,imxrt1050-iomuxc";
+			/*
+			 * Note: In reality, there are three iomuxc:
+			 * - normal iomuxc at 0x400e8000
+			 * - iomuxc for LPSR pins at 0x40c08000
+			 * - iomuxc for SNVR pins at 0x40c94000
+			 *
+			 * But there is a big disadvantage of that: Multiple
+			 * instances of the iomuxc would be necessary. That
+			 * makes handling pins in each application quite a bit
+			 * more effort.
+			 *
+			 * Just having one fake iomuxc at 0x0, simplifies a lot.
+			 */
+			reg = <0x00000000 0x50000000>;
+		};
+
 		aips_1: aips-bus@40000000 {
 			compatible = "fsl,aips-bus", "simple-bus";
 			#address-cells = <1>;
@@ -490,12 +507,6 @@
 				interrupts = <53>;
 			};
 
-			iomuxc: pinctrl@400e8000 {
-				compatible = "nxp,imxrt1166-iomuxc",
-				             "nxp,imxrt1050-iomuxc";
-				reg = <0x400e8000 0x4000>;
-			};
-
 			gpt1: timer@400ec000 {
 				reg = <0x400ec000 0x4000>;
 				interrupts = <119>;
@@ -946,12 +957,6 @@
 				reg = <0x40c04000 0x4000>;
 			};
 
-			iomuxc_lpsr: iomuxc_lpsr@40c08000 {
-				compatible = "nxp,imxrt1166-iomuxc",
-				             "nxp,imxrt1050-iomuxc";
-				reg = <0x40c08000 0x4000>;
-			};
-
 			iomuxc_lpsr_gpr: iomuxc_lpsr_gpr@40c0c000 {
 				reg = <0x40c0c000 0x4000>;
 			};
@@ -1131,12 +1136,6 @@
 				interrupts = <66>, <67>, <68>;
 			};
 
-			iomuxc_snvs: iomuxc_snvs@40c94000 {
-				compatible = "nxp,imxrt1166-iomuxc",
-				             "nxp,imxrt1050-iomuxc";
-				reg = <0x40c94000 0x4000>;
-			};
-
 			iomuxc_snvs_gpr: iomuxc_snvs_gpr@40c98000 {
 				reg = <0x40c98000 0x4000>;
 			};