2009-08-26 Joel Sherrill <joel.sherrill@oarcorp.com>

* Makefile.am, startup/bspstart.c: Rename BSP specific idle thread to
	bsp_idle_thread and split into its own file.
	* startup/bspidle.c: New file.
This commit is contained in:
Joel Sherrill
2009-08-26 13:31:40 +00:00
parent 7173c43715
commit fc472c9796
20 changed files with 250 additions and 115 deletions

View File

@@ -1,3 +1,9 @@
2009-08-26 Joel Sherrill <joel.sherrill@oarcorp.com>
* Makefile.am, startup/bspstart.c: Rename BSP specific idle thread to
bsp_idle_thread and split into its own file.
* startup/bspidle.c: New file.
2009-08-24 Joel Sherrill <joel.sherrill@oarcorp.com>
* include/bsp.h, startup/bspstart.c: Rename _Thread_Idle_body to

View File

@@ -116,6 +116,7 @@ libbsp_a_SOURCES += ../../shared/bootcard.c \
../../shared/bspclean.c \
startup/bspreset.c \
../../shared/bspgetworkarea.c \
startup/bspidle.c \
startup/bspstart.c \
startup/cpuinit.c \
startup/uboot_support.c

View File

@@ -0,0 +1,38 @@
/*===============================================================*\
| Project: RTEMS generic MPC5200 BSP |
+-----------------------------------------------------------------+
| Partially based on the code references which are named below. |
| Adaptions, modifications, enhancements and any recent parts of |
| the code are: |
| Copyright (c) 2005 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
+-----------------------------------------------------------------+
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| this file contains the BSP initialization code |
\*===============================================================*/
#include <rtems.h>
/*
* bsp_idle_thread
*
* The MSR[POW] bit is set to put the CPU into the low power mode
* defined in HID0. HID0 is set during starup in start.S.
*/
void *bsp_idle_thread( uintptr_t ignored )
{
for(;;) {
asm volatile(
"mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0"
);
}
return 0;
}

View File

@@ -193,22 +193,3 @@ void bsp_start(void)
printk("Exit from bspstart\n");
#endif
}
/*
*
* bsp_idle_thread
*
* Replaces the one in c/src/exec/score/src/threadidlebody.c
* The MSR[POW] bit is set to put the CPU into the low power mode
* defined in HID0. HID0 is set during starup in start.S.
*
*/
void *bsp_idle_thread( uintptr_t ignored )
{
for(;;) {
asm volatile(
"mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0"
);
}
return 0;
}

View File

@@ -1,3 +1,9 @@
2009-08-26 Joel Sherrill <joel.sherrill@oarcorp.com>
* Makefile.am, startup/bspstart.c: Rename BSP specific idle thread to
bsp_idle_thread and split into its own file.
* startup/bspidle.c: New file.
2009-07-16 Joel Sherrill <joel.sherrill@oarcorp.com>
* configure.ac: Rename BSP_BOOTCARD_OPTIONS to

View File

@@ -52,6 +52,7 @@ libbsp_a_SOURCES += ../../shared/bsplibc.c \
../../shared/gnatinstallhandler.c \
../shared/src/tictac.c \
startup/cpuinit.c \
startup/bspidle.c \
startup/bspstart.c \
../../shared/bspclean.c \
startup/bspreset.c \

View File

@@ -0,0 +1,48 @@
/**
* @file
*
* @ingroup mpc83xx
*
* @brief Source for BSP Idle Thread
*/
/*
* Copyright (c) 2008
* Embedded Brains GmbH
* Obere Lagerstr. 30
* D-82178 Puchheim
* Germany
* rtems@embedded-brains.de
*
* The license and distribution terms for this file may be found in the file
* LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <bsp.h>
/**
* @brief Idle thread body.
*
* Replaces the one in c/src/exec/score/src/threadidlebody.c
* The MSR[POW] bit is set to put the CPU into the low power mode
* defined in HID0. HID0 is set during starup in start.S.
*/
void *bsp_idle_thread( uintptr_t ignored )
{
while (1) {
asm volatile (
"mfmsr 3;"
"oris 3, 3, 4;"
"sync;"
"mtmsr 3;"
"isync;"
"ori 3, 3, 0;"
"ori 3, 3, 0"
);
}
return NULL;
}

View File

@@ -152,28 +152,3 @@ void bsp_start( void)
printk("Exit from bspstart\n");
#endif
}
/**
* @brief Idle thread body.
*
* Replaces the one in c/src/exec/score/src/threadidlebody.c
* The MSR[POW] bit is set to put the CPU into the low power mode
* defined in HID0. HID0 is set during starup in start.S.
*/
void *_Thread_Idle_body( uintptr_t ignored )
{
while (1) {
asm volatile (
"mfmsr 3;"
"oris 3, 3, 4;"
"sync;"
"mtmsr 3;"
"isync;"
"ori 3, 3, 0;"
"ori 3, 3, 0"
);
}
return NULL;
}

View File

@@ -1,3 +1,9 @@
2009-08-26 Joel Sherrill <joel.sherrill@oarcorp.com>
* Makefile.am, startup/bspstart.c: Rename BSP specific idle thread to
bsp_idle_thread and split into its own file.
* startup/bspidle.c: New file.
2009-07-20 Sebastian Huber <sebastian.huber@embedded-brains.de>
* clock/clock-config.c, include/smsc9218i.h, network/smsc9218i.c: New

View File

@@ -45,7 +45,8 @@ include_bsp_HEADERS = include/mpc55xxevb.h \
# startup
libbsp_a_SOURCES += ../../shared/bsplibc.c ../../shared/bsppost.c \
../../shared/bootcard.c ../shared/src/tictac.c ../../shared/bspclean.c \
startup/bspstart.c startup/bspgetworkarea.c ../../shared/bsppretaskinghook.c
startup/bspidle.c startup/bspstart.c startup/bspgetworkarea.c \
../../shared/bsppretaskinghook.c
# clock
libbsp_a_SOURCES += clock/clock-config.c

View File

@@ -0,0 +1,41 @@
/**
* @file
*
* @ingroup mpc55xx
*
* @brief BSP Idle Thread Code
*/
/*
* Copyright (c) 2008
* Embedded Brains GmbH
* Obere Lagerstr. 30
* D-82178 Puchheim
* Germany
* rtems@embedded-brains.de
*
* The license and distribution terms for this file may be found in the file
* LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
*/
#include <bsp.h>
/**
* @brief Idle thread body.
*/
void *bsp_idle_thread( uintptr_t ignored )
{
while (1) {
asm volatile(
"mfmsr 3;"
"oris 3,3,4;"
"sync;"
"mtmsr 3;"
"isync;"
"ori 3,3,0;"
"ori 3,3,0"
);
}
return 0;
}

View File

@@ -255,23 +255,3 @@ void bsp_start(void)
rtems_cache_enable_data();
#endif
}
/**
* @brief Idle thread body.
*/
void *_Thread_Idle_body( uintptr_t ignored )
{
while (1) {
asm volatile(
"mfmsr 3;"
"oris 3,3,4;"
"sync;"
"mtmsr 3;"
"isync;"
"ori 3,3,0;"
"ori 3,3,0"
);
}
return 0;
}

View File

@@ -1,3 +1,9 @@
2009-08-26 Joel Sherrill <joel.sherrill@oarcorp.com>
* Makefile.am, startup/bspstart.c: Rename BSP specific idle thread to
bsp_idle_thread and split into its own file.
* startup/bspidle.c: New file.
2009-08-10 Joel Sherrill <joel.sherrill@oarcorp.com>
* network/network.c: Disable use of simple vectored interrupt install

View File

@@ -43,8 +43,8 @@ include_bsp_HEADERS += vectors/vectors.h
# startup
libbsp_a_SOURCES += ../../shared/bspclean.c ../../shared/bsplibc.c \
../../shared/bsppredriverhook.c ../../shared/bsppost.c \
startup/bspstart.c ../../shared/bootcard.c ../../shared/sbrk.c \
../../shared/gnatinstallhandler.c startup/cpuinit.c \
startup/bspidle.c startup/bspstart.c ../../shared/bootcard.c \
../../shared/sbrk.c ../../shared/gnatinstallhandler.c startup/cpuinit.c \
../../shared/bspgetworkarea.c ../../shared/bsppretaskinghook.c
# vectors

View File

@@ -0,0 +1,35 @@
/*
* The MPC860 specific stuff was written by Jay Monkman (jmonkman@frasca.com)
*
* Modified for the MPC8260ADS board by Andy Dachs <a.dachs@sstl.co.uk>
* Surrey Satellite Technology Limited, 2001
*
* COPYRIGHT (c) 1989-2007.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <bsp.h>
/*
* bsp_idle_thread
*
* The MSR[POW] bit is set to put the CPU into the low power mode
* defined in HID0. HID0 is set during starup in start.S.
*
*/
void *bsp_idle_thread( uintptr_t ignored )
{
for( ; ; ) {
asm volatile(
"mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0"
);
}
return 0; /* to remove warning */
}

View File

@@ -237,25 +237,3 @@ void bsp_start(void)
#endif
}
/*
*
* _Thread_Idle_body
*
* Replaces the one in c/src/exec/score/src/threadidlebody.c
* The MSR[POW] bit is set to put the CPU into the low power mode
* defined in HID0. HID0 is set during starup in start.S.
*
*/
void *_Thread_Idle_body( uintptr_t ignored )
{
for( ; ; )
{
asm volatile(
"mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0"
);
}
return 0; /* to remove warning */
}

View File

@@ -1,3 +1,9 @@
2009-08-26 Joel Sherrill <joel.sherrill@oarcorp.com>
* Makefile.am, startup/bspstart.c: Rename BSP specific idle thread to
bsp_idle_thread and split into its own file.
* startup/bspidle.c: New file.
2009-08-07 Joel Sherrill <joel.sherrill@oarcorp.com>
* console/console.c: Disable call to rtems_interrupt_catch until it is

View File

@@ -58,7 +58,7 @@ libbsp_a_SOURCES += timer/timer.c
# startup
libbsp_a_SOURCES += ../../shared/bspclean.c ../../shared/bsplibc.c \
../../shared/bsppost.c ../../shared/bsppredriverhook.c \
../../shared/bsppretaskinghook.c startup/bspstart.c \
../../shared/bsppretaskinghook.c startup/bspidle.c startup/bspstart.c \
startup/bspgetworkarea.c ../../shared/bootcard.c startup/mmutlbtab.c \
startup/cpuinit.c ../../shared/sbrk.c ../../shared/gnatinstallhandler.c

View File

@@ -0,0 +1,51 @@
/**
* @file
*
* @ingroup tqm8xx
*
* @brief Source for BSP Idle Thread
*/
/*
* Copyright (c) 2008
* Embedded Brains GmbH
* Obere Lagerstr. 30
* D-82178 Puchheim
* Germany
* rtems@embedded-brains.de
*
* The license and distribution terms for this file may be found in the file
* LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <rtems.h>
#include <libcpu/powerpc-utility.h>
#include <bsp.h>
/**
* @brief BSP Idle thread body.
*
* Replaces the one in c/src/exec/score/src/threadidlebody.c
* The MSR[POW] bit is set to put the CPU into the low power mode
* defined in HID0. HID0 is set during starup in start.S.
*/
void *bsp_idle_thread( uintptr_t ignored )
{
while (1) {
asm volatile (
"mfmsr 3;"
"oris 3, 3, 4;"
"sync;"
"mtmsr 3;"
"isync;"
"ori 3, 3, 0;"
"ori 3, 3, 0"
);
}
return NULL;
}

View File

@@ -193,28 +193,3 @@ void bsp_start( void)
printk("Exit from bspstart\n");
#endif
}
/**
* @brief Idle thread body.
*
* Replaces the one in c/src/exec/score/src/threadidlebody.c
* The MSR[POW] bit is set to put the CPU into the low power mode
* defined in HID0. HID0 is set during starup in start.S.
*/
void *_Thread_Idle_body( uintptr_t ignored )
{
while (1) {
asm volatile (
"mfmsr 3;"
"oris 3, 3, 4;"
"sync;"
"mtmsr 3;"
"isync;"
"ori 3, 3, 0;"
"ori 3, 3, 0"
);
}
return NULL;
}