bsps/arm: Improve Doxygen groups

bsps/arm/include/bsp/arm-a9mpcore-clock.h

@@ -1,5 +1,13 @@
 /* SPDX-License-Identifier: BSD-2-Clause */
 
+/**
+ * @file
+ *
+ * @ingroup A9MPCoreSupport
+ *
+ * @brief This header file provides the interfaces of the @ref A9MPCoreSupport.
+ */
+
 /*
  * Copyright (c) 2013 Chris Johns <chrisj@rtems.org>.  All rights reserved.
  *
@@ -34,6 +42,12 @@
 extern "C" {
 #endif /* __cplusplus */
 
+/**
+ * @addtogroup A9MPCoreSupport
+ *
+ * @{
+ */
+
 /*
  * Return the peripheral clock. For systems such as the zynq this
  * is controlled by the PL logic generation and can vary. Provide this
@@ -41,6 +55,8 @@ extern "C" {
  */
 uint32_t a9mpcore_clock_periphclk(void);
 
+/** @} */
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */

bsps/arm/include/bsp/arm-a9mpcore-irq.h

@@ -1,11 +1,11 @@
 /* SPDX-License-Identifier: BSD-2-Clause */
 
 /**
- *  @file
+ * @file
  *
- *  @ingroup RTEMSBSPsARMShared
+ * @ingroup A9MPCoreSupport
  *
- *  @brief ARM_A9MPCORE_IRQ Support
+ * @brief This header file provides the interfaces of the @ref A9MPCoreSupport.
  */
 
 /*
@@ -40,12 +40,20 @@
 extern "C" {
 #endif /* __cplusplus */
 
+/**
+ * @addtogroup A9MPCoreSupport
+ *
+ * @{
+ */
+
 #define A9MPCORE_IRQ_GT 27
 #define A9MPCORE_IRQ_NFIQ 28
 #define A9MPCORE_IRQ_PT 29
 #define A9MPCORE_IRQ_PW 30
 #define A9MPCORE_IRQ_NIRQ 31
 
+/** @} */
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */

bsps/arm/include/bsp/arm-a9mpcore-regs.h

@@ -1,11 +1,11 @@
 /* SPDX-License-Identifier: BSD-2-Clause */
 
 /**
- *  @file
+ * @file
  *
- *  @ingroup RTEMSBSPsARMShared
+ * @ingroup A9MPCoreSupport
  *
- *  @brief ARM_A9MPCORE_REGS Support
+ * @brief This header file provides the interfaces of the @ref A9MPCoreSupport.
  */
 
 /*
@@ -38,6 +38,16 @@
 
 #include <bsp/utility.h>
 
+/**
+ * @defgroup A9MPCoreSupport Cortex-A9 MPCore Support
+ *
+ * @ingroup RTEMSBSPsARMShared
+ *
+ * @brief This group contains support interfaces for the Cortex-A9 MPCore.
+ *
+ * @{
+ */
+
 typedef struct {
   uint32_t ctrl;
 #define A9MPCORE_SCU_CTRL_SCU_EN BSP_BIT32(0)
@@ -143,4 +153,6 @@ typedef struct {
   a9mpcore_idist idist;
 } a9mpcore;
 
+/** @} */
+
 #endif /* LIBBSP_ARM_SHARED_ARM_A9MPCORE_REGS_H */

bsps/arm/include/bsp/arm-a9mpcore-start.h

@@ -1,11 +1,11 @@
 /* SPDX-License-Identifier: BSD-2-Clause */
 
 /**
- *  @file
+ * @file
  *
- *  @ingroup RTEMSBSPsARMShared
+ * @ingroup A9MPCoreSupport
  *
- *  @brief A9MPCORE_START Support
+ * @brief This header file provides the interfaces of the @ref A9MPCoreSupport.
  */
 
 /*
@@ -51,6 +51,12 @@
 extern "C" {
 #endif /* __cplusplus */
 
+/**
+ * @addtogroup A9MPCoreSupport
+ *
+ * @{
+ */
+
 BSP_START_TEXT_SECTION static inline void arm_a9mpcore_start_scu_invalidate(
   volatile a9mpcore_scu *scu,
   uint32_t cpu_id,
@@ -188,6 +194,8 @@ BSP_START_TEXT_SECTION static inline void arm_a9mpcore_start_hook_1(void)
   arm_a9mpcore_start_global_timer();
 }
 
+/** @} */
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */

bsps/arm/shared/clock/clock-a9mpcore.c

@@ -1,5 +1,14 @@
 /* SPDX-License-Identifier: BSD-2-Clause */
 
+/**
+ * @file
+ *
+ * @ingroup A9MPCoreSupport
+ *
+ * @brief This source file contains the Clock Driver for Cortex-A9 MPCore
+ * compatible devices.
+ */
+
 /*
  * Copyright (C) 2013, 2016 embedded brains GmbH & Co. KG
  *