arm: Simplify default exception handling

Writes to the execution state bits of the CPSR through MRS instructions
are ignored.
This commit is contained in:
Sebastian Huber
2024-08-28 04:19:39 +02:00
parent 7915631552
commit eb8a39e115

View File

@@ -103,7 +103,6 @@ save_more_context:
mrs r3, spsr
mrs r7, cpsr
orr r5, r5, r3
bic r5, #ARM_PSR_T
msr cpsr, r5
mov r0, sp
mov r1, lr