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x86_64: Fix ISR handler macros
Modify the ISR handler macros for the x86_64 arch to follow the behavior expected of them
This commit is contained in:
committed by
Amar Takhar
parent
e46135290a
commit
dd882e1291
@@ -170,29 +170,28 @@ extern Context_Control_fp _CPU_Null_fp_context;
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#define _CPU_ISR_Enable(_level) \
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{ \
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amd64_enable_interrupts(); \
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_level = 0; \
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(void) _level; /* Prevent -Wunused-but-set-variable */ \
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if (_level == 0) { \
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amd64_enable_interrupts(); \
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} \
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}
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#define _CPU_ISR_Disable(_level) \
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{ \
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amd64_enable_interrupts(); \
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_level = 1; \
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(void) _level; /* Prevent -Wunused-but-set-variable */ \
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_level = _CPU_ISR_Get_level(); \
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amd64_disable_interrupts(); \
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}
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#define _CPU_ISR_Flash(_level) \
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{ \
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amd64_enable_interrupts(); \
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if (_level == 0) { \
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amd64_enable_interrupts(); \
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} \
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amd64_disable_interrupts(); \
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_level = 1; \
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(void) _level; /* Prevent -Wunused-but-set-variable */ \
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}
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static inline bool _CPU_ISR_Is_enabled(uint32_t level)
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{
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return (level & EFLAGS_INTR_ENABLE) != 0;
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return level == 0;
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}
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static inline void _CPU_ISR_Set_level(uint32_t new_level)
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