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* Makefile.am, vectors/vectors.S: use shared version of vectors.S.
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@@ -1,3 +1,7 @@
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2006-01-05 Till Straumann <strauman@slac.stanford.edu>
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* Makefile.am, vectors/vectors.S: use shared version of vectors.S.
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2005-05-26 Ralf Corsepius <ralf.corsepius@rtems.org>
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* include/bsp.h: New header guard.
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@@ -66,7 +66,7 @@ irq_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
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EXTRA_DIST += vectors/README
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noinst_PROGRAMS += vectors.rel
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vectors_rel_SOURCES = vectors/align_h.S vectors/vectors.S \
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vectors_rel_SOURCES = vectors/align_h.S ../../powerpc/shared/vectors/vectors.S \
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../../powerpc/shared/vectors/vectors_init.c
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vectors_rel_CPPFLAGS = $(AM_CPPFLAGS)
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vectors_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
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@@ -1,160 +0,0 @@
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/*
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* (c) 1999, Eric Valette valette@crf.canon.fr
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*
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*
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* This file contains the assembly code for the PowerPC
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* exception veneers for RTEMS.
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*
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* vectors.S,v 1.3.4.1 2003/02/20 21:48:25 joel Exp
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*/
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#include <rtems/asm.h>
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#include <rtems/score/cpu.h>
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#include <bsp/vectors.h>
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#define SYNC \
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sync; \
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isync
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PUBLIC_VAR (__rtems_start)
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.section .entry_point_section,"awx",@progbits
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/*
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* Entry point information used by bootloader code
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*/
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SYM (__rtems_start):
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.long __rtems_entry_point
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/*
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* end of special Entry point section
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*/
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.text
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.p2align 5
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PUBLIC_VAR(default_exception_vector_code_prolog)
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SYM (default_exception_vector_code_prolog):
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/*
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* let room for exception frame
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*/
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stwu r1, - (EXCEPTION_FRAME_END)(r1)
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stw r3, GPR3_OFFSET(r1)
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/* R2 should never change (EABI: pointer to .sdata2) - we
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* save it nevertheless..
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*/
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stw r2, GPR2_OFFSET(r1)
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mflr r3
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stw r3, EXC_LR_OFFSET(r1)
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bl 0f
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0: /*
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* r3 = exception vector entry point
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* (256 * vector number) + few instructions
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*/
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mflr r3
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/*
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* r3 = r3 >> 8 = vector
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*/
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srwi r3,r3,8
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ba push_normalized_frame
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PUBLIC_VAR (default_exception_vector_code_prolog_size)
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default_exception_vector_code_prolog_size= . - default_exception_vector_code_prolog
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.p2align 5
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PUBLIC_VAR (push_normalized_frame)
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SYM (push_normalized_frame):
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stw r3, EXCEPTION_NUMBER_OFFSET(r1)
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stw r0, GPR0_OFFSET(r1)
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mfsrr0 r3
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stw r3, SRR0_FRAME_OFFSET(r1)
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mfsrr1 r3
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stw r3, SRR1_FRAME_OFFSET(r1)
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/*
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* Save general purpose registers
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* Already saved in prolog : R1, R2, R3, LR.
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* Saved a few line above : R0
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*
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* Manual says that "stmw" instruction may be slower than
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* series of individual "stw" but who cares about performance
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* for the DEFAULT exception handler?
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*/
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stmw r4, GPR4_OFFSET(r1) /* save R4->R31 */
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mfcr r31
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stw r31, EXC_CR_OFFSET(r1)
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mfctr r30
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stw r30, EXC_CTR_OFFSET(r1)
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mfxer r28
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stw r28, EXC_XER_OFFSET(r1)
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mfmsr r28
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stw r28, EXC_MSR_OFFSET(r1)
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mfdar r28
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stw r28, EXC_DAR_OFFSET(r1)
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/*
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* compute SP at exception entry
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*/
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addi r3, r1, EXCEPTION_FRAME_END
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/*
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* store it at the right place
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*/
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stw r3, GPR1_OFFSET(r1)
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/*
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* Enable data and instruction address translation, exception nesting
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*/
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mfmsr r3
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ori r3,r3, MSR_RI /* | MSR_IR | MSR_DR */
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mtmsr r3
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SYNC
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/*
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* Call C exception handler
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*/
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/*
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* store the execption frame address in r3 (first param)
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*/
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addi r3, r1, 0x8
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/*
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* globalExceptHdl(r3)
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*/
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addis r4, 0, globalExceptHdl@ha
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lwz r5, globalExceptHdl@l(r4)
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mtlr r5
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blrl
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/*
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* Restore registers status
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*/
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lwz r31, EXC_CR_OFFSET(r1)
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mtcr r31
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lwz r30, EXC_CTR_OFFSET(r1)
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mtctr r30
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lwz r29, EXC_LR_OFFSET(r1)
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mtlr r29
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lwz r28, EXC_XER_OFFSET(r1)
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mtxer r28
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lmw r4, GPR4_OFFSET(r1)
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lwz r2, GPR2_OFFSET(r1)
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lwz r0, GPR0_OFFSET(r1)
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/*
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* Disable data and instruction translation. Make path non recoverable...
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*/
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mfmsr r3
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xori r3, r3, MSR_RI | MSR_IR | MSR_DR
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mtmsr r3
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SYNC
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/*
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* Restore rfi related settings
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*/
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lwz r3, SRR1_FRAME_OFFSET(r1)
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mtsrr1 r3
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lwz r3, SRR0_FRAME_OFFSET(r1)
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mtsrr0 r3
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lwz r3, GPR3_OFFSET(r1)
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addi r1,r1, EXCEPTION_FRAME_END
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SYNC
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rfi
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