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bsps/aarch64: add mnemonic for ICC_IGRPEN1_EL3

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Gedare Bloom
2021-06-22 19:55:39 -06:00
parent fedd279f80
commit bcad0aaee6
1 changed files with 1 additions and 0 deletions
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bsps/shared/dev/irq/arm-gicv3.c
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@@ -112,6 +112,7 @@
/* AArch64 GICv3 registers are not named in GCC */
#define ICC_IGRPEN0 "S3_0_C12_C12_6, %0"
#define ICC_IGRPEN1 "S3_0_C12_C12_7, %0"
#define ICC_IGRPEN1_EL3 "S3_6_C12_C12_7, %0"
#define ICC_PMR "S3_0_C4_C6_0, %0"
#define ICC_EOIR1 "S3_0_C12_C12_1, %0"
#define ICC_SRE "S3_0_C12_C12_5, %0"