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2005-09-12 Thomas Doerfler <Thomas.Doerfler@imd-systems.de>

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PR 822/bsps
	* console/console.c, startup/bspstart.c, startup/imbx8xx.c,
	startup/mmutlbtab.c, startup/start.S, vectors/vectors_init.c:
	Currently the MBX8xx BSP does not boot, because some logical errors
	are in the startup code. Additionally, the mpc8xx shared clock driver
	does not support the clocking scheme of some of the board variants,
	which are clocked from a 32768Hz (!) external crystal.
This commit is contained in:
Joel Sherrill
2005-09-12 13:32:58 +00:00
parent 22f1f670da
commit 848e900c5c
7 changed files with 88 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog
View File

@@ -1,3 +1,13 @@
2005-09-12 Thomas Doerfler <Thomas.Doerfler@imd-systems.de>
PR 822/bsps
* console/console.c, startup/bspstart.c, startup/imbx8xx.c,
startup/mmutlbtab.c, startup/start.S, vectors/vectors_init.c:
Currently the MBX8xx BSP does not boot, because some logical errors
are in the startup code. Additionally, the mpc8xx shared clock driver
does not support the clocking scheme of some of the board variants,
which are clocked from a 32768Hz (!) external crystal.
2005-05-26 Ralf Corsepius <ralf.corsepius@rtems.org>
* include/bsp.h: New header guard.

26
c/src/lib/libbsp/powerpc/mbx8xx/console/console.c
View File

@@ -537,6 +537,13 @@ serial_init()
unsigned int dpaddr, memaddr;
bd_t *bd;
#if NVRAM_CONFIGURE == 1
if ( ((nvram->console_mode & 0x06) != 0x04 ) ||
((nvram->console_mode & 0x30) != 0x20 )) {
/*
* FIXME: refine this condition...
*/
#endif
bd = eppcbugInfo;
cp = cpmp;
@@ -642,7 +649,26 @@ serial_init()
/* Enable transmitter/receiver.
*/
sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
#if NVRAM_CONFIGURE == 1
}
else {
const char bootmsg_text[]= "using EPPC bug for console I/O\n";
_EPPCBug_pollWrite((nvram->console_printk_port & 0x70) >> 4,
bootmsg_text,
sizeof(bootmsg_text)-1);
}
#endif
#if NVRAM_CONFIGURE == 1
if ((nvram->console_mode & 0x30) == 0x20 ) {
BSP_output_char = _BSP_output_char;
}
else {
BSP_output_char = serial_putchar;
}
#else
BSP_output_char = serial_putchar;
#endif
}
void

1
c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c
View File

@@ -196,6 +196,7 @@ void bsp_start(void)
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
Cpu_table.postdriver_hook = bsp_postdriver_hook;
if( Cpu_table.interrupt_stack_size < 4 * 1024 )
Cpu_table.interrupt_stack_size = 4 * 1024;

4
c/src/lib/libbsp/powerpc/mbx8xx/startup/imbx8xx.c
View File

@@ -271,6 +271,7 @@ void _InitMBX8xx (void)
m8xx.sccrk = M8xx_UNLOCK_KEY; /* unlock SCCR */
m8xx.sccr = 0x02800000; /* for MBX860/MBX821 */
#if 0 /* IMD hack: do not init PLL after EPPCbug load */
/* Initialize the PLL, Low-Power, and Reset Control Register (PLPRCR) */
/* - set the clock speed and set normal power mode */
m8xx.plprck = M8xx_UNLOCK_KEY; /* unlock PLPRCR */
@@ -300,6 +301,7 @@ void _InitMBX8xx (void)
m8xx.plprcr = 0x4C400000;
#else
#error "MBX board not defined"
#endif
#endif
/* Unlock the timebase and decrementer registers. */
m8xx.tbk = M8xx_UNLOCK_KEY;
@@ -316,6 +318,7 @@ void _InitMBX8xx (void)
_mtspr( M8xx_TBU_WR, r1 );
_mtspr( M8xx_TBL_WR, r1 );
#if 0 /* IMD hack: do not init UPMs after EPPCbug load */
/*
* Memory Controller Initialization
*/
@@ -584,6 +587,7 @@ void _InitMBX8xx (void)
#endif
m8xx.memc[7]._br = M8xx_BR_BA(0xFC000000) | M8xx_BR_AT(0) | M8xx_BR_PS8 |
M8xx_BR_MS_GPCM | M8xx_MEMC_BR_V;
#endif /* IMD hack */
/*
* PCMCIA initialization
*/

15
c/src/lib/libbsp/powerpc/mbx8xx/startup/mmutlbtab.c
View File

@@ -31,19 +31,8 @@
* location is equal to its real address.
*/
MMU_TLB_table_t MMU_TLB_table[] = {
#if ( defined(mbx860_001b) )
/*
* DRAM: CS1, Start address 0x00000000, 2M,
* ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy,
* R/W,X for all, no ASID comparison, not cache-inhibited.
* Last 512K block is cache-inhibited, but not guarded for use by EPPCBug.
* EPN TWC RPN
*/
{ 0x00000200, 0x05, 0x000009FD }, /* DRAM - PS=512K */
{ 0x00080200, 0x05, 0x000809FD }, /* DRAM - PS=512K */
{ 0x00100200, 0x05, 0x001009FD }, /* DRAM - PS=512K */
{ 0x00180200, 0x05, 0x001809FF }, /* DRAM - PS=512K, cache-inhibited */
#elif ( defined(mbx860_002b) || \
#if ( defined(mbx860_001b) || \
defined(mbx860_002b) || \
defined(mbx860_003b) || \
defined(mbx821_001b) || \
defined(mbx821_002b) || \

40
c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S
View File

@@ -238,6 +238,46 @@ spin:
lwz r3, spin@l(r3)
cmpwi r3, 0x1
beq .spin
/*
* test function: blink orange led once
*/
#define LEDBLINK_DELAY (5*1000*1000)
#define LEDPORT 0xFA100001
#define LEDMASK 0xf0
#define LEDON 0x00
#define LEDOFF 0x08
PUBLIC_VAR(ledblink)
SYM(ledblink):
lis r3,LEDBLINK_DELAY>>16
ledblink1:
subi r3,r3,1
cmpi 0,1,r3,0
bne ledblink1
/*
* turn orange led off
*/
lis r3,LEDPORT@ha
lbz r0,LEDPORT@l(r3)
andi. r0,r0,LEDMASK
ori r0,r0,LEDOFF
stb r0,LEDPORT@l(r3)
lis r3,LEDBLINK_DELAY>>16
ledblink2:
subi r3,r3,1
cmpi 0,1,r3,0
bne ledblink2
/*
* turn orange led on
*/
lis r3,LEDPORT@ha
lbz r0,LEDPORT@l(r3)
andi. r0,r0,LEDMASK
ori r0,r0,LEDON
stb r0,LEDPORT@l(r3)
blr
/*
* #define LOADED_BY_EPPCBUG
*/

5
c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors_init.c
View File

@@ -115,6 +115,11 @@ void initialize_exceptions()
if (!mpc8xx_vector_is_valid (i)) {
continue;
}
#if 0 /* FIXME: refine this condition, leave Syscall for EPPCBug console */
if (i == ASM_SYS_VECTOR) {
continue;
}
#endif
exception_table[i].exceptIndex = i;
exception_table[i].hdl = exception_config.defaultRawEntry.hdl;
exception_table[i].hdl.vector = i;