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bsps/arm/stm32f4: Correct PLS macro Potential Bug in STM32F4 PWR header

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STM32F4_PWR_CR_PLS now correctly takes a 'val' argument
to avoid compilation errors when selecting PVD level.
Verified other CR/CSR bit definitions and comments; no spelling issues.
This commit is contained in:
Mohamed Ayman
2026-03-15 22:19:41 +02:00
committed by Kinsey Moore
parent df28cf6e31
commit 657cd11729
1 changed files with 1 additions and 1 deletions
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bsps/arm/stm32f4/include/bsp/stm32f4xxxx_pwr.h
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@@ -25,7 +25,7 @@ struct stm32f4_pwr_s {
#define STM32F4_PWR_CR_VOS BSP_BIT32(14) // Regulator scaling output selection
#define STM32F4_PWR_CR_FPDS BSP_BIT32(9) // Flash power-down in stop mode
#define STM32F4_PWR_CR_DBP BSP_BIT32(8) // Disable backup domain write protection
#define STM32F4_PWR_CR_PLS BSP_FLD32(val, 5, 7) // PVD level selection
#define STM32F4_PWR_CR_PLS(val) BSP_FLD32(val, 5, 7) // PVD level selection
#define STM32F4_PWR_CR_PLS_GET(reg) BSP_FLD32GET(reg, 5, 7)
#define STM32F4_PWR_CR_PLS_SET(reg, val) BSP_FLD32SET(reg, val, 5, 7)
#define STM32F4_PWR_CR_PVDE BSP_BIT32(4) // Power voltage detector enable