bsps/riscv: Provide bsp_reset()

Update #5067.

bsps/riscv/griscv/start/bsp_fatal_halt.c

@@ -26,12 +26,17 @@
  * SUCH DAMAGE.
  */
 
-#include <bsp.h>
+#include <bsp/bootcard.h>
 #include <rtems/score/cpuimpl.h>
 
-void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error )
+void bsp_reset( rtems_fatal_source source, rtems_fatal_code code )
 {
     /* ecall is currently used to halt the griscv cpu */
     asm ("ecall");
-    for(;;);
+    RTEMS_UNREACHABLE();
+}
+
+void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr code )
+{
+    bsp_reset( source, code );
 }

bsps/riscv/noel/start/bsp_fatal_halt.c

@@ -25,22 +25,26 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
+#include <bsp/bootcard.h>
+
 #include <bsp/riscv.h>
 
 /* From bsps/arm/fvp/include/bsp/semihosting.h */
 #define TARGET_SYS_EXIT_EXTENDED 0x20
 #define ADP_Stopped_ApplicationExit 0x20026
 
-void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error )
+void bsp_reset( rtems_fatal_source source, rtems_fatal_code code )
 {
-  uint64_t args[2] = {ADP_Stopped_ApplicationExit, error};
+  uint64_t args[2] = {ADP_Stopped_ApplicationExit, code};
   __asm__ volatile ("li a0, %0" ::"i"(TARGET_SYS_EXIT_EXTENDED));
   __asm__ volatile ("mv a1, %0" ::"r"(&args));
   __asm__ volatile ("slli zero, zero, 0x1f");
   __asm__ volatile ("ebreak");
   __asm__ volatile ("srai zero, zero, 0x7");
-
-  while (true) {
-    ;
-  }
+  RTEMS_UNREACHABLE();
+}
+
+void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr code )
+{
+  bsp_reset( source, code );
 }

bsps/riscv/riscv/start/bsp_fatal_halt.c

@@ -26,18 +26,22 @@
  * SUCH DAMAGE.
  */
 
+#include <bsp/bootcard.h>
+
 #include <bsp/riscv.h>
 #include <bsp/fdt.h>
 #include <rtems/score/cpuimpl.h>
 
 #include <libfdt.h>
 
-void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error )
+void bsp_reset( rtems_fatal_source source, rtems_fatal_code code )
 {
   const char *fdt;
   int node;
   volatile uint32_t *sifive_test;
 
+  (void) source;
+  (void) code;
   fdt = bsp_fdt_get();
 
 #ifdef RISCV_ENABLE_HTIF_SUPPORT
@@ -61,3 +65,8 @@ void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error )
     }
   }
 }
+
+void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr code )
+{
+  bsp_reset( source, code );
+}

spec/build/bsps/riscv/griscv/obj.yml

@@ -30,6 +30,5 @@ source:
 - bsps/shared/dev/serial/console-termios.c
 - bsps/shared/irq/irq-default-handler.c
 - bsps/shared/start/bspfatal-default.c
-- bsps/shared/start/bspreset-loop.c
 - bsps/shared/start/gettargethash-default.c
 type: build

spec/build/bsps/riscv/noel/obj.yml

@@ -31,7 +31,6 @@ source:
 - bsps/shared/irq/irq-default-handler.c
 - bsps/shared/start/bsp-fdt.c
 - bsps/shared/start/bspfatal-default.c
-- bsps/shared/start/bspreset-loop.c
 - bsps/shared/start/gettargethash-default.c
 - bsps/shared/grlib/uart/apbuart_polled.c
 - bsps/shared/grlib/uart/apbuart_termios.c

spec/build/bsps/riscv/riscv/obj.yml

@@ -37,6 +37,5 @@ source:
 - bsps/shared/irq/irq-default-handler.c
 - bsps/shared/start/bsp-fdt.c
 - bsps/shared/start/bspfatal-default.c
-- bsps/shared/start/bspreset-loop.c
 - bsps/shared/start/gettargethash-default.c
 type: build