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(PPC_Get_timebase_register, PPC_Set_timebase_register): New.
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@@ -160,5 +160,42 @@ static inline uint32_t CPU_swap_u32(
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#endif /* ASM */
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#ifndef ASM
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/*
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* Routines to access the time base register
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*/
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static inline uint64_t PPC_Get_timebase_register( void )
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{
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uint32_t tbr_low;
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uint32_t tbr_high;
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uint32_t tbr_high_old;
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uint64_t tbr;
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do {
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asm volatile( "mftbu %0" : "=r" (tbr_high_old));
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asm volatile( "mftb %0" : "=r" (tbr_low));
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asm volatile( "mftbu %0" : "=r" (tbr_high));
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} while ( tbr_high_old != tbr_high );
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tbr = tbr_high;
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tbr <<= 32;
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tbr |= tbr_low;
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return tbr;
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}
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static inline void PPC_Set_timebase_register (uint64_t tbr)
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{
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uint32_t tbr_low;
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uint32_t tbr_high;
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tbr_low = (tbr & 0xffffffff) ;
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tbr_high = (tbr >> 32) & 0xffffffff;
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asm volatile( "mtspr 284, %0" : : "r" (tbr_low));
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asm volatile( "mtspr 285, %0" : : "r" (tbr_high));
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}
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#endif /* ASM */
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#endif /* _RTEMS_SCORE_CPU_H */
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