bsps: Remove post-link config files

These files are not currently useful in the tree and will be replaced by
a different post-link tool.

Updates rtems/programs/gsoc#74
This commit is contained in:
Kinsey Moore
2025-07-03 17:18:31 -05:00
committed by Kinsey Moore
parent 0757c809b8
commit 4f5723e125
162 changed files with 0 additions and 2189 deletions

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@@ -1 +0,0 @@
include $(RTEMS_ROOT)/make/custom/altcycv.inc

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@@ -1,9 +0,0 @@
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU = arm
CPU_CFLAGS = -mthumb -mcpu=cortex-m7 -mfpu=fpv5-d16 -mfloat-abi=hard
CFLAGS_OPTIMIZE_V ?= -O2 -g -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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# Config file for Original BeagleBoard
include $(RTEMS_ROOT)/make/custom/beagle.inc

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@@ -1,2 +0,0 @@
# Config file for BeagleBoard XM
include $(RTEMS_ROOT)/make/custom/beagle.inc

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@@ -1,2 +0,0 @@
# Config file for BeagleBone Black
include $(RTEMS_ROOT)/make/custom/beagle.inc

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@@ -1,2 +0,0 @@
# Config file for Original BeagleBone (aka BeagleBone White)
include $(RTEMS_ROOT)/make/custom/beagle.inc

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@@ -1,174 +0,0 @@
# Start with: openocd -f interface/ftdi/flyswatter.cfg -f bbxm.cfg -c 'reset init'
# or with: openocd -f interface/ftdi/flyswatter2.cfg -f bbxm.cfg -c 'reset init'
source [find board/ti_beagleboard_xm.cfg]
#
# Use the MLO file from uboot to initialise the board.
#
proc beagleboard_xm_mlo { file } {
global _CHIPNAME
adapter_khz 10
catch { mww phys 0x48307250 0x00000004 }
reset init
icepick_c_wreset $_CHIPNAME.jrc
halt
dm37x.cpu arm core_state arm
puts "Beagleboard xM MLO: $file"
load_image $file 0x402005f8 bin
resume 0x40200800
sleep 500
halt
}
proc beagleboard_xm_init {} {
global _CHIPNAME
adapter_khz 10
catch { mww phys 0x48307250 0x00000004 }
reset init
icepick_c_wreset $_CHIPNAME.jrc
halt
dm37x.cpu arm core_state arm
mwh 0x6e00007c 0x000000ff ;# omap-gpmc
mwh 0x6e00007c 0x00000090 ;# omap-gpmc
mwh 0x6e000080 0x00000000 ;# omap-gpmc
mwh 0x6e00007c 0x00000000 ;# omap-gpmc
mwh 0x6e000080 0x00000000 ;# omap-gpmc
mwh 0x6e000080 0x00000000 ;# omap-gpmc
mwh 0x6e000080 0x00000000 ;# omap-gpmc
mwh 0x6e000080 0x00000000 ;# omap-gpmc
mwh 0x6e000080 0x00000000 ;# omap-gpmc
mwh 0x6e00007c 0x00000030 ;# omap-gpmc
mww 0x48004c00 0x00000020 ;# omap3_cm
mww 0x48004c10 0x00000020 ;# omap3_cm
mww 0x48314048 0x0000aaaa ;# omap3_mpu_wdt
mww 0x48314048 0x00005555 ;# omap3_mpu_wdt
mww 0x6c000048 0xffffffff ;# omap3_sms
mww 0x48004c40 0x00000013 ;# omap3_cm
mww 0x48004c10 0x00000025 ;# omap3_cm
mww 0x48004c00 0x00000021 ;# omap3_cm
mww 0x48306d40 0x00000003 ;# omap3_prm
mww 0x48307270 0x00000083 ;# omap3_prm
mww 0x48307270 0x00000080 ;# omap3_prm
mww 0x48004904 0x00000015 ;# omap3_cm
mww 0x48004d00 0x00110016 ;# omap3_cm
mww 0x48005140 0x10020a50 ;# omap3_cm
mww 0x48004d40 0x08000040 ;# omap3_cm
mww 0x48004d40 0x09900040 ;# omap3_cm
mww 0x48004d40 0x09900c40 ;# omap3_cm
mww 0x48004d40 0x09900c00 ;# omap3_cm
mww 0x48004a40 0x00001305 ;# omap3_cm
mww 0x48004a40 0x00001125 ;# omap3_cm
mww 0x48004a40 0x00001109 ;# omap3_cm
mww 0x48004a40 0x0000110a ;# omap3_cm
mww 0x48004b40 0x00000005 ;# omap3_cm
mww 0x48004c40 0x00000015 ;# omap3_cm
mww 0x48004d00 0x00110006 ;# omap3_cm
mww 0x48004d00 0x00110007 ;# omap3_cm
mww 0x48004d00 0x00110007 ;# omap3_cm
mww 0x48005140 0x03020a50 ;# omap3_cm
mww 0x48004f40 0x00000004 ;# omap3_cm
mww 0x48004e40 0x00000409 ;# omap3_cm
mww 0x48004e40 0x00001009 ;# omap3_cm
mww 0x48004d48 0x00000009 ;# omap3_cm
mww 0x48004d44 0x02436000 ;# omap3_cm
mww 0x48004d44 0x0243600c ;# omap3_cm
mww 0x48004a40 0x0000110a ;# omap3_cm
mww 0x48004d00 0x00170007 ;# omap3_cm
mww 0x48004d04 0x00000011 ;# omap3_cm
mww 0x48004d50 0x00000001 ;# omap3_cm
mww 0x48004d4c 0x00007800 ;# omap3_cm
mww 0x48004d4c 0x0000780c ;# omap3_cm
mww 0x48004d00 0x00170037 ;# omap3_cm
mww 0x48004d04 0x00000017 ;# omap3_cm
mww 0x48004004 0x00000011 ;# omap3_cm
mww 0x48004044 0x00000001 ;# omap3_cm
mww 0x48004040 0x00081400 ;# omap3_cm
mww 0x48004040 0x00081400 ;# omap3_cm
mww 0x48004004 0x00000017 ;# omap3_cm
mww 0x48004944 0x00000001 ;# omap3_cm
mww 0x48004940 0x000a5800 ;# omap3_cm
mww 0x48004940 0x000a580c ;# omap3_cm
mww 0x48004904 0x00000017 ;# omap3_cm
mww 0x48005040 0x000000ff ;# omap3_cm
mww 0x48004c40 0x00000015 ;# omap3_cm
mww 0x48005040 0x000000ff ;# omap3_cm
mww 0x48005010 0x00000008 ;# omap3_cm
mww 0x48005000 0x00000008 ;# omap3_cm
mww 0x48004a00 0x00002000 ;# omap3_cm
mww 0x48004a10 0x00002042 ;# omap3_cm
mww 0x48005000 0x00000808 ;# omap3_cm
mww 0x48005010 0x00000808 ;# omap3_cm
mww 0x48004a00 0x0003a000 ;# omap3_cm
mww 0x48004a10 0x0003a042 ;# omap3_cm
mww 0x48004c10 0x00000025 ;# omap3_cm
mww 0x48004000 0x00000001 ;# omap3_cm
mww 0x48004a00 0x03fffe29 ;# omap3_cm
mww 0x48004a10 0x3ffffffb ;# omap3_cm
mww 0x48004a14 0x0000001f ;# omap3_cm
mww 0x48004c00 0x000000e9 ;# omap3_cm
mww 0x48004c10 0x0000003f ;# omap3_cm
mww 0x48004e00 0x00000005 ;# omap3_cm
mww 0x48004e10 0x00000001 ;# omap3_cm
mww 0x48004f00 0x00000001 ;# omap3_cm
mww 0x48004f10 0x00000001 ;# omap3_cm
mww 0x48005000 0x0003ffff ;# omap3_cm
mww 0x48005010 0x0003ffff ;# omap3_cm
mww 0x48005410 0x00000001 ;# omap3_cm
mww 0x48005400 0x00000003 ;# omap3_cm
mww 0x48004a18 0x00000004 ;# omap3_cm
mww 0x48004a08 0x00000004 ;# omap3_cm
mww 0x6e000060 0x00001800 ;# omap-gpmc
mww 0x6e000064 0x00141400 ;# omap-gpmc
mww 0x6e000068 0x00141400 ;# omap-gpmc
mww 0x6e00006c 0x0f010f01 ;# omap-gpmc
mww 0x6e000070 0x010c1414 ;# omap-gpmc
mww 0x6e000074 0x1f0f0a80 ;# omap-gpmc
mww 0x6e000078 0x00000870 ;# omap-gpmc
mwb 0x6e00007c 0x000000ff ;# omap-gpmc
mwb 0x6e00007c 0x00000070 ;# omap-gpmc
mwb 0x6e00007c 0x00000090 ;# omap-gpmc
mwb 0x6e000080 0x00000000 ;# omap-gpmc
mww 0x6d000010 0x00000002 ;# omap.sdrc
mww 0x6d000010 0x00000000 ;# omap.sdrc
mww 0x6d000044 0x00000100 ;# omap.sdrc
mww 0x6d000070 0x04000081 ;# omap.sdrc
mww 0x6d000060 0x0000000a ;# omap.sdrc
mww 0x6d000080 0x04590099 ;# omap.sdrc
mww 0x6d00009c 0xc29dc4c6 ;# omap.sdrc
mww 0x6d0000a0 0x00022322 ;# omap.sdrc
mww 0x6d0000a4 0x0004e201 ;# omap.sdrc
mww 0x6d0000a8 0x00000000 ;# omap.sdrc
mww 0x6d0000a8 0x00000001 ;# omap.sdrc
mww 0x6d0000a8 0x00000002 ;# omap.sdrc
mww 0x6d0000a8 0x00000002 ;# omap.sdrc
mww 0x6d000084 0x00000032 ;# omap.sdrc
mww 0x6d000040 0x00000004 ;# omap.sdrc
mww 0x6d0000b0 0x04590099 ;# omap.sdrc
mww 0x6d0000c4 0xc29dc4c6 ;# omap.sdrc
mww 0x6d0000c8 0x00022322 ;# omap.sdrc
mww 0x6d0000d4 0x0004e201 ;# omap.sdrc
mww 0x6d0000d8 0x00000000 ;# omap.sdrc
mww 0x6d0000d8 0x00000001 ;# omap.sdrc
mww 0x6d0000d8 0x00000002 ;# omap.sdrc
mww 0x6d0000d8 0x00000002 ;# omap.sdrc
mww 0x6d0000b4 0x00000032 ;# omap.sdrc
mww 0x6d0000b0 0x00000000 ;# omap.sdrc
mww 0x6e00001c 0x00000000 ;# omap-gpmc
mww 0x6e000040 0x00000000 ;# omap-gpmc
mww 0x6e000050 0x00000000 ;# omap-gpmc
mww 0x6e000078 0x00000000 ;# omap-gpmc
mww 0x6e000078 0x00000000 ;# omap-gpmc
mww 0x6e000060 0x00001800 ;# omap-gpmc
mww 0x6e000064 0x00141400 ;# omap-gpmc
mww 0x6e000068 0x00141400 ;# omap-gpmc
mww 0x6e00006c 0x0f010f01 ;# omap-gpmc
mww 0x6e000070 0x010c1414 ;# omap-gpmc
mww 0x6e000074 0x1f0f0a80 ;# omap-gpmc
mww 0x6e000078 0x00000870 ;# omap-gpmc
mww 0x48004a00 0x437ffe00 ;# omap3_cm
mww 0x48004a10 0x637ffed2 ;# omap3_cm
puts "Beagleboard xM initialised"
}
init

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@@ -1,18 +0,0 @@
#
# Config file for Cogent CSB337 - AT91RM9200 SBC
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=arm
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mcpu=arm920
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g
# Add CFLAGS and LDFLAGS for compiling and linking with per item sections
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,18 +0,0 @@
#
# Config file for Cogent CSB337 - AT91RM9200 SBC
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=arm
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mcpu=arm920
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g
# Add CFLAGS and LDFLAGS for compiling and linking with per item sections
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,5 +0,0 @@
#
# Config file for Cogent CSB637 - AT91RM9200 SBC
#
include $(RTEMS_ROOT)/make/custom/csb337.cfg

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@@ -1,6 +0,0 @@
#
# Config file for Cogent KIT637_V6 (CSB637) - AT91RM9200 SBC
# As a KIT637, the package includes a number of peripherals
# not normally on a CSB637.
include $(RTEMS_ROOT)/make/custom/csb337.cfg

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@@ -1,19 +0,0 @@
#
# Config file for Cirrus/Cogent EDB7312 eval board
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=arm
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#
CPU_CFLAGS = -mcpu=arm7tdmi
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g
# Add CFLAGS and LDFLAGS for compiling and linking with per item sections
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,18 +0,0 @@
#
# Config file for Gumstix (http://www.gumstix.com)
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=arm
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mcpu=xscale
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g
# Add CFLAGS and LDFLAGS for compiling and linking with per item sections
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,16 +0,0 @@
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU = arm
CPU_CFLAGS = -march=armv7-a -mthumb -mfpu=neon -mfloat-abi=hard -mtune=cortex-a7
LDFLAGS = -Wl,--gc-sections
CFLAGS_OPTIMIZE_V ?= -O2 -g -ffunction-sections -fdata-sections
# define bsp-post-link
# $(OBJCOPY) -O binary '$@' '$(basename $@).bin'
# gzip -f -9 '$(basename $@).bin'
# mkimage -A arm -O linux -T kernel -a 0x80200000 -e 0x80200000 -name '$(notdir $@)' -d '$(basename $@).bin.gz' '$(basename $@).img'
# $(default-bsp-post-link)
# endef

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@@ -1,5 +0,0 @@
#
# Config file for LM3S3749.
#
include $(RTEMS_ROOT)/make/custom/lm3s69xx.inc

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@@ -1,5 +0,0 @@
#
# Config file for LM3S6965.
#
include $(RTEMS_ROOT)/make/custom/lm3s69xx.inc

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@@ -1,5 +0,0 @@
#
# Config file for QEMU LM3S6965 emulation.
#
include $(RTEMS_ROOT)/make/custom/lm3s69xx.inc

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@@ -1,5 +0,0 @@
#
# Config file for LM4F120XL.
#
include $(RTEMS_ROOT)/make/custom/lm3s69xx.inc

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@@ -1,22 +0,0 @@
#
# Config file for mbed LPC1768 board.
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU = arm
CPU_CFLAGS = -mthumb -mcpu=cortex-m3
CFLAGS_OPTIMIZE_V = -O2 -ggdb3
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections
BINEXT?=.bin
# This defines the operations performed on the linked executable.
# is currently required.
define bsp-post-link
$(OBJCOPY) -O binary --strip-all \
$(basename $@)$(EXEEXT) $(basename $@)$(BINEXT)
$(SIZE) $(basename $@)$(EXEEXT)
endef

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@@ -1,5 +0,0 @@
#
# Config file for mbed LPC1768 board.
#
include $(RTEMS_ROOT)/make/custom/lpc1768_mbed.cfg

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@@ -1,5 +0,0 @@
#
# Config file for mbed LPC1768 board.
#
include $(RTEMS_ROOT)/make/custom/lpc1768_mbed.cfg

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@@ -1,5 +0,0 @@
#
# Config file for LPC1788 OEM Board from Embedded Artists.
#
include $(RTEMS_ROOT)/make/custom/lpc17xx.inc

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@@ -1,5 +0,0 @@
#
# Config file for LPC1788 OEM Board from Embedded Artists.
#
include $(RTEMS_ROOT)/make/custom/lpc17xx.inc

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@@ -1,5 +0,0 @@
#
# Config file for LPC17XX (PLX800).
#
include $(RTEMS_ROOT)/make/custom/lpc17xx.inc

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@@ -1,5 +0,0 @@
#
# Config file for LPC17XX (PLX800).
#
include $(RTEMS_ROOT)/make/custom/lpc17xx.inc

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@@ -1,5 +0,0 @@
#
# Config file for LPC2362.
#
include $(RTEMS_ROOT)/make/custom/lpc24xx.inc

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@@ -1,5 +0,0 @@
#
# Config file for TLI800.
#
include $(RTEMS_ROOT)/make/custom/lpc24xx.inc

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@@ -1,12 +0,0 @@
#
# Config file for LPC24XX (QVGA Base Board from Embedded Artists).
#
include $(RTEMS_ROOT)/make/custom/lpc24xx.inc
# define bsp-post-link
# $(OBJCOPY) -O binary '$@' '$(basename $@).bin'
# gzip -f -9 '$(basename $@).bin'
# mkimage -A arm -O rtems -T kernel -C gzip -a a0000000 -e a0000040 -name '$(notdir $@)' -d '$(basename $@).bin.gz' '$(basename $@).img'
# $(default-bsp-post-link)
# endef

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@@ -1,5 +0,0 @@
#
# Config file for LPC24XX (NCS).
#
include $(RTEMS_ROOT)/make/custom/lpc24xx.inc

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@@ -1,5 +0,0 @@
#
# Config file for LPC24XX (NCS).
#
include $(RTEMS_ROOT)/make/custom/lpc24xx.inc

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@@ -1,5 +0,0 @@
#
# Config file for LPC24XX (NCS).
#
include $(RTEMS_ROOT)/make/custom/lpc24xx.inc

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@@ -1,5 +0,0 @@
#
# Config file for LPC24XX (PLX800).
#
include $(RTEMS_ROOT)/make/custom/lpc24xx.inc

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@@ -1,5 +0,0 @@
#
# Config file for LPC24XX (PLX800).
#
include $(RTEMS_ROOT)/make/custom/lpc24xx.inc

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@@ -1,5 +0,0 @@
#
# Config file for LPC40XX OEM Board from Embedded Artists.
#
include $(RTEMS_ROOT)/make/custom/lpc40xx.inc

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@@ -1,5 +0,0 @@
#
# Config file for LPC40XX OEM Board from Embedded Artists.
#
include $(RTEMS_ROOT)/make/custom/lpc40xx.inc

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@@ -1,5 +0,0 @@
#
# Config file for MZX application.
#
include $(RTEMS_ROOT)/make/custom/lpc32xx.inc

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@@ -1,7 +0,0 @@
#
# Config file for MZX stage-1 program.
#
CFLAGS_OPTIMIZE_V = -Os -g
include $(RTEMS_ROOT)/make/custom/lpc32xx.inc

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@@ -1,5 +0,0 @@
#
# Config file for MZX stage-2 program.
#
include $(RTEMS_ROOT)/make/custom/lpc32xx.inc

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@@ -1,5 +0,0 @@
#
# Config file for Phycore LPC3250 board.
#
include $(RTEMS_ROOT)/make/custom/lpc32xx.inc

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@@ -1,7 +0,0 @@
#
# Config file for RASPBERRYPI
#
include $(RTEMS_ROOT)/make/custom/raspberrypi.inc
CPU_CFLAGS = -mcpu=arm1176jzf-s

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@@ -1,6 +0,0 @@
#
# Config file for RASPBERRYPI 2
#
include $(RTEMS_ROOT)/make/custom/raspberrypi.inc
CPU_CFLAGS = -march=armv7-a -mthumb -mfpu=neon -mfloat-abi=hard -mtune=cortex-a7

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@@ -1,9 +0,0 @@
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU = arm
CPU_CFLAGS = -march=armv7-a -mthumb -mfpu=neon -mfloat-abi=hard -mtune=cortex-a9
LDFLAGS = -Wl,--gc-sections
CFLAGS_OPTIMIZE_V ?= -O0 -g -ffunction-sections -fdata-sections

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@@ -1,21 +0,0 @@
#
# Config file for LPC22xx board
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=arm
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#
CPU_CFLAGS = -mcpu=arm7tdmi
# optimize flag: typically -0, could use -O4 or -fast
# -O4 is ok for RTEMS
# NOTE2: some level of -O may be actually required by inline assembler (at least
# -O2 so far.
CFLAGS_OPTIMIZE_V = -Os -g
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,15 +0,0 @@
#
# Config file for LPC22xx board in Thumb mode
#
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#
include $(RTEMS_ROOT)/make/custom/rtl22xx.cfg
CPU_CFLAGS += -mthumb
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,17 +0,0 @@
#
# Config file for ARM smdk2410
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=arm
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mcpu=arm920t
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,10 +0,0 @@
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU = arm
CPU_CFLAGS = -mthumb -mcpu=cortex-m3
CFLAGS_OPTIMIZE_V = -O2 -g
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,10 +0,0 @@
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU = arm
CPU_CFLAGS = -mthumb -mcpu=cortex-m4
CFLAGS_OPTIMIZE_V = -O2 -g
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,5 +0,0 @@
#
# Config file for TMS570LS3137 board.
#
include $(RTEMS_ROOT)/make/custom/tms570ls3137.inc

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@@ -1,5 +0,0 @@
#
# Config file for TMS570LS3137 board.
#
include $(RTEMS_ROOT)/make/custom/tms570ls3137.inc

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@@ -1,5 +0,0 @@
#
# Config file for TMS570LS3137 board.
#
include $(RTEMS_ROOT)/make/custom/tms570ls3137.inc

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@@ -1,5 +0,0 @@
#
# Config file for TMS570LS3137 board.
#
include $(RTEMS_ROOT)/make/custom/tms570ls3137.inc

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@@ -1,14 +0,0 @@
#
# Configuration file for the "xen_virtual" target
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU = arm
CPU_CFLAGS = -march=armv7-a -mthumb -mfpu=neon -mfloat-abi=hard
CFLAGS_OPTIMIZE_V += -O2 -g
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,10 +0,0 @@
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU = arm
CPU_CFLAGS = -march=armv7-a -mthumb -mfpu=neon -mfloat-abi=hard -mtune=cortex-a9
CFLAGS_OPTIMIZE_V ?= -O0 -g
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1 +0,0 @@
include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc

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@@ -1 +0,0 @@
include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc

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@@ -1 +0,0 @@
include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc

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@@ -1 +0,0 @@
include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc

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@@ -1 +0,0 @@
include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc

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@@ -1 +0,0 @@
include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc

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@@ -1 +0,0 @@
include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc

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@@ -1 +0,0 @@
include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc

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@@ -1 +0,0 @@
include $(RTEMS_ROOT)/make/custom/xilinx_zynqmp.inc

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@@ -1,33 +0,0 @@
#
# Config file for the PC 386 BSP
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=i386
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#
# NOTE: CPU_CFLAGS is set by pc386 variants.
ifeq ($(CPU_CFLAGS),)
CPU_CFLAGS = -mtune=i386
endif
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections
#+--------------------------------------------------------------------------+
#| Set the value of RELOCADDR to the address where you want your image to
#| load. If you'll be using GRUB to load the images it will have to be >=
#| 0x100000 (1024K). If you are using NetBoot to load the images it can be
#| >= 0x10000 (64K) AND <= 0x97C00 (607K) OR >= 0x100000 (1024K). The memory
#| top is of course another limit. Make sure there is enough space before the
#| upper memory limits for the image and the memory allocated by it to fit.
#| Make sure the value you choose is aligned to 4 bytes.
#+--------------------------------------------------------------------------+
RELOCADDR=0x00100000
LDFLAGS += -Wl,-Ttext,$(RELOCADDR)

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@@ -1,10 +0,0 @@
#
# Configuration file for a PC using an i486DX Class CPU
#
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mtune=i486
include $(RTEMS_ROOT)/make/custom/pc386.cfg

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@@ -1,9 +0,0 @@
#
# Configuration file for a PC using a Pentium Class CPU
#
# This configuration is useful for SMP testing on Qemu
CPU_CFLAGS = -mtune=pentium -march=pentium -msse2
include $(RTEMS_ROOT)/make/custom/pc386.cfg

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@@ -1,10 +0,0 @@
#
# Configuration file for a PC using a Pentium Class CPU
#
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mtune=pentium -march=pentium
include $(RTEMS_ROOT)/make/custom/pc386.cfg

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@@ -1,10 +0,0 @@
#
# Configuration file for a PC using a PentiumPro Class CPU
#
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mtune=pentiumpro -march=pentium
include $(RTEMS_ROOT)/make/custom/pc386.cfg

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@@ -1,17 +0,0 @@
#
# Configuration file for a PC using a Pentium Class CPU
#
# Note: We give the -mtune=pentium option here only so that at least the
# variant optimized for pentium (w/o using any pentium-specific
# features) is used (assuming you use the vanilla RTEMS multilibs).
#
# And: The only sse-related feature the RTEMS support really needs is
# fxsave/fxrstor. You can build with -msse, -msse2 or -msse3,
# depending on your CPU.
# There are run-time checks resulting in a 'panic' if code
# compiled for e.g. -msse3 is executed on a CPU that only
# supports sse2, though.
CPU_CFLAGS = -mtune=pentium4 -march=pentium4 -msse3
include $(RTEMS_ROOT)/make/custom/pc386.cfg

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@@ -1,30 +0,0 @@
#
# Config file for the uC5282 BSP
#
RTEMS_CPU=m68k
include $(RTEMS_ROOT)/make/custom/default.cfg
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mcpu=528x
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer
# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2574.
# The following two lines enable compiling and linking on per element.
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections
ifndef MTARGET
MTARGET=ram
endif
define bsp-post-link
$(default-bsp-post-link)
$(OBJCOPY) -O binary --strip-all \
$(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT)
endef

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@@ -1,10 +0,0 @@
#
# Config file for COBRA5475 module
#
#
# All genmcf548x configurations share the same base file, only a few
# parameters differ.
#
include $(RTEMS_ROOT)/make/custom/genmcf548x.inc

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@@ -1,10 +0,0 @@
#
# Config file for freescale's M5484FireEngine evaluation board
#
#
# All genmcf548x configurations share the same base file, only a few
# parameters differ.
#
include $(RTEMS_ROOT)/make/custom/genmcf548x.inc

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@@ -1,31 +0,0 @@
#
# Config file for the mcf5235 BSP
#
RTEMS_CPU=m68k
include $(RTEMS_ROOT)/make/custom/default.cfg
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mcpu=5235
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer
# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2571.
# The following two lines enable compiling and linking on per element.
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections
ifndef MTARGET
MTARGET=ram
endif
# This defines the operations performed on the linked executable.
# is currently required.
define bsp-post-link
$(OBJCOPY) -O binary --strip-all \
$(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT)
$(SIZE) $(basename $@)$(EXEEXT)
endef

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@@ -1,29 +0,0 @@
#
# Config file for the mcf5329 BSP
#
RTEMS_CPU=m68k
include $(RTEMS_ROOT)/make/custom/default.cfg
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#CPU_CFLAGS = -mcpu=5329
CPU_CFLAGS = -mcpu=5307
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer
# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2569.
# The following two lines enable compiling and linking on per element.
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections
# This defines the operations performed on the linked executable.
# is currently required.
define bsp-post-link
$(OBJCOPY) -O binary --strip-all \
$(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT)
$(SIZE) $(basename $@)$(EXEEXT)
endef

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@@ -1,24 +0,0 @@
#
# Config file for the uC5282 BSP
#
RTEMS_CPU = m68k
include $(RTEMS_ROOT)/make/custom/default.cfg
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mcpu=5282
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g
# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2575.
# The following two lines enable compiling and linking on per element.
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections
define bsp-post-link
$(default-bsp-post-link)
$(OBJCOPY) -O binary $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT)
endef

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@@ -1,19 +0,0 @@
#
# Config file for the Cogent CSB350 board
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=mips
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#
# gcc 3.1 and newer
CPU_CFLAGS = -mips32 -G0 -msoft-float
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,15 +0,0 @@
#
# Config file for the Quick Logic Hurricane evaluation board with PMC-Sierra RM5231 cpu
#
include $(RTEMS_ROOT)/make/custom/default.cfg
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mips3 -G0 -EL
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,16 +0,0 @@
#
# Config file for the jmr3904 board which has a simulator in gdb
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=mips
CPU_CFLAGS = -march=r3900 -Wa,-xgot -G0
CFLAGS_OPTIMIZE_V = -O2 -g
# arguments to compile and link with per-element sections
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,17 +0,0 @@
#
# Config file for the MIPS Malta board with 24kf CPU
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=mips
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -march=24kf1_1 -Wa,-xgot -G0
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O0 -g
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,15 +0,0 @@
#
# Config file for the Toshiba RBTX4925 evaluation board with TX4925 cpu
#
include $(RTEMS_ROOT)/make/custom/default.cfg
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mips3 -G0 -EL
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,20 +0,0 @@
#
# Config file for the Toshiba RBTX4938 evaluation board with TX4938 cpu
#
include $(RTEMS_ROOT)/make/custom/default.cfg
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mips3 -G0 -EL
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections
define bsp-post-link
$(OBJCOPY) --srec-len=30 -O srec $@ $(basename $@)$(DOWNEXT)
$(default-bsp-post-link)
endef

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@@ -1,14 +0,0 @@
#
# Config file for the moxie simulator in gdb.
#
# $Id: moxiesxsim.cfg,v 1.2 2009/10/21 10:41:27 ralf Exp $
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=moxie
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -Os -g -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,29 +0,0 @@
#
# Config file for the NIOS2_EB2_1 BSP
#
# Choices for CPU_MODEL:
# tiny (no cache)
# standard (instruction cache)
# fast (instruction and data cache)
RTEMS_CPU = nios2
include $(RTEMS_ROOT)/make/custom/default.cfg
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mno-hw-mul -mno-hw-div
# optimize flag: typically -O2
# ATM, doesn't work with optimization levels > 0
CFLAGS_OPTIMIZE_V = -O0 -g
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections
define bsp-post-link
$(OBJCOPY) -O binary --strip-all $(basename $@)$(EXEEXT) \
-R entry -R exceptions $(basename $@)$(DOWNEXT)
$(default-bsp-post-link)
endef

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@@ -1,13 +0,0 @@
#
# Configuration file for the "no_bsp" board
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=no_cpu
# Miscellaneous additions go here. Typical options usually look like
CFLAGS_OPTIMIZE_V += -O2 -g
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,10 +0,0 @@
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU = or1k
CPU_CFLAGS = -O2
CFLAGS_OPTIMIZE_V ?= -O0 -g
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections

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@@ -1,105 +0,0 @@
section memory
name = "RAM"
random_seed = 12345
type = random
ce = 0
mc = 0
baseaddr = 0x00000000
size = 0x08000000
delayr = 1
delayw = 2
end
section immu
enabled = 0
nsets = 64
nways = 1
pagesize = 8192
hitdelay = 0
missdelay = 0
end
section dmmu
enabled = 0
nsets = 64
nways = 1
pagesize = 8192
hitdelay = 0
missdelay = 0
end
section mc
enabled = 0
baseaddr = 0x90000000
POC = 0x0000000a /* 32 bit SSRAM */
index = 0
end
section ic
enabled = 1
nsets = 256
nways = 1
blocksize = 32
hitdelay = 20
missdelay = 60
end
section dc
enabled = 1
nsets = 256
nways = 1
blocksize = 32
load_hitdelay = 40
load_missdelay = 120
store_hitdelay = 40
store_missdelay = 120
end
section pic
enabled = 1
edge_trigger = 1
end
section sim
verbose = 1
debug = 0
profile = 0
history = 0
clkcycle = 10ns /* 100MHz clock */
end
section VAPI
enabled = 1
server_port = 50000
log_enabled = 1
vapi_log_file = "vapi.log"
end
section cpu
ver = 0x12
cfg = 0x00
rev = 0x0001
upr = 0x0000075f
superscalar = 0
hazards = 0
dependstats = 0
sbuf_len = 100
end
section debug
enabled = 1
rsp_enabled = 1
rsp_port = 50001
end
section uart
enabled = 1
baseaddr = 0x90000000
#channel = "xterm"
channel = "file:uart0.rx,uart0.tx"
irq = 2
16550 = 1
end
section pm
enabled = 1
end

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@@ -1,35 +0,0 @@
#
# Config file for the PowerPC 745x based mvmexxxx
#
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=powerpc
RTEMS_PPC_EXCEPTION_PROCESSING_MODEL=new
# This is the actual bsp directory used during the build process.
RTEMS_BSP_FAMILY=beatnik
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#
CPU_CFLAGS = -mcpu=7400
#T. Straumann; disable sdata=eabi for now until CEXP supports it -meabi -msdata=eabi
# optimize flag: typically -0, could use -O4 or -fast
# -O4 is ok for RTEMS
# NOTE: some level of -O may be actually required by inline assembler
#CFLAGS_OPTIMIZE_V=-O4 -fno-keep-inline-functions
CFLAGS_OPTIMIZE_V = -O2 -g
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections
define bsp-post-link
$(default-bsp-post-link)
$(OBJCOPY) -O binary $@ $(basename $@)$(DOWNEXT)
endef
# Miscellaneous additions go here
START_BASE = motld_start

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@@ -1,12 +0,0 @@
#
# Config file for Freescale 5200Lite a.k.a. IceCube
#
# NOTE: This is the same as the Embedded Planets EP5200C and
# possibly other MPC5200 boards.
#
# All GEN5200 configurations share the same base file, only a few
# parameters differ.
#
include $(RTEMS_ROOT)/make/custom/gen5200.inc

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@@ -1,10 +0,0 @@
#
# Config file for MicroSys PM520 Module (based on MPC5200)
# on carrier board CR825
#
# All GEN5200 configurations share the same base file, only a few
# parameters differ.
#
include $(RTEMS_ROOT)/make/custom/gen5200.inc

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@@ -1,10 +0,0 @@
#
# Config file for MicroSys PM520 Module (based on MPC5200)
# on carrier board ZE30
#
# All GEN5200 configurations share the same base file, only a few
# parameters differ.
#
include $(RTEMS_ROOT)/make/custom/gen5200.inc

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@@ -1,10 +0,0 @@
##
#
# @file
#
# @ingroup mpc83xx_config
#
# @brief Configuration file for the BR UID base board
#
include $(RTEMS_ROOT)/make/custom/gen83xx.inc

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@@ -1,10 +0,0 @@
#
# Config file for customer specific MPC8349 board
#
#
# All GEN83xx configurations share the same base file, only a few
# parameters differ.
#
include $(RTEMS_ROOT)/make/custom/gen83xx.inc

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@@ -1,10 +0,0 @@
##
#
# @file
#
# @ingroup mpc83xx_config
#
# @brief Configuration file for the MPC8309 System on Module.
#
include $(RTEMS_ROOT)/make/custom/gen83xx.inc

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@@ -1,10 +0,0 @@
##
#
# @file
#
# @ingroup mpc83xx_config
#
# @brief Configuration file for the MPC8313E Reference Design Board.
#
include $(RTEMS_ROOT)/make/custom/gen83xx.inc

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@@ -1,10 +0,0 @@
#
# Config file for freescale's MPC8349EAMDS evaluation board
#
#
# All GEN83xx configurations share the same base file, only a few
# parameters differ.
#
include $(RTEMS_ROOT)/make/custom/gen83xx.inc

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@@ -1,31 +0,0 @@
#
# Config file for Motorola MCP750 -- a MPC750 CompactPCI board
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=powerpc
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#
CPU_CFLAGS = -mcpu=750
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g -mmultiple -mstring -mstrict-align
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections
define bsp-post-link
$(default-bsp-post-link)
$(OBJCOPY) -O binary -R .comment -S $(basename $@)$(EXEEXT) rtems
gzip -vf9 rtems
$(LD) -o $(basename $@)$(DOWNEXT) \
$ $(PROJECT_RELEASE)/lib/bootloader.o \
--just-symbols=$(basename $@)$(EXEEXT) \
--no-warn-mismatch \
-b binary rtems.gz -T $(PROJECT_RELEASE)/lib/ppcboot.lds \
-Map $(basename $@).map && chmod 755 $@
rm -f rtems.gz
endef

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@@ -1,32 +0,0 @@
#
# Config file for Motorola MTX603e -- a MPC603e ATX form factor board
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=powerpc
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mcpu=603e
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g -mmultiple -mstring -mstrict-align
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections
define bsp-post-link
$(default-bsp-post-link)
$(OBJCOPY) -O binary -R .comment -S $(basename $@)$(EXEEXT) rtems
gzip -vf9 rtems
$(LD) -o $(basename $@)$(DOWNEXT) \
$(PROJECT_RELEASE)/lib/bootloader.o \
--just-symbols=$(basename $@)$(EXEEXT) \
--no-warn-mismatch \
-b binary rtems.gz -T $(PROJECT_RELEASE)/lib/ppcboot.lds \
-Map $(basename $@).map && chmod 755 $@
rm -f rtems.gz
endef
# Miscellaneous additions go here

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@@ -1,30 +0,0 @@
#
# Config file for Motorola MVME2100 -- a MPC8240 VMEBus board
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=powerpc
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mcpu=603e
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g -mmultiple -mstring -mstrict-align
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections
define bsp-post-link
$(default-bsp-post-link)
$(OBJCOPY) -O binary -R .comment -S $(basename $@)$(EXEEXT) rtems
gzip -vf9 rtems
$(LD) -o $(basename $@)$(DOWNEXT) \
$(PROJECT_RELEASE)/lib/bootloader.o \
--just-symbols=$(basename $@)$(EXEEXT) \
--no-warn-mismatch \
-b binary rtems.gz -T $(PROJECT_RELEASE)/lib/ppcboot.lds \
-Map $(basename $@).map && chmod 755 $@
rm -f rtems.gz
endef

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@@ -1,30 +0,0 @@
#
# Config file for the PowerPC 604 based mvme2307
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=powerpc
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#
CPU_CFLAGS = -mcpu=604 -mmultiple -mstring -mstrict-align -meabi
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections
define bsp-post-link
$(default-bsp-post-link)
$(OBJCOPY) -O binary -R .comment -S $(basename $@)$(EXEEXT) rtems
gzip -vf9 rtems
$(LD) -o $(basename $@)$(DOWNEXT) $(PROJECT_RELEASE)/lib/bootloader.o \
--just-symbols=$(basename $@)$(EXEEXT) \
--no-warn-mismatch \
-b binary rtems.gz -T $(PROJECT_RELEASE)/lib/ppcboot.lds \
-Map $(basename $@).map && chmod 755 $@
rm -f rtems.gz
endef

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@@ -1,37 +0,0 @@
#
# Config file for the QemuPrep w/Altivec
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=powerpc
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#
CPU_CFLAGS = -mcpu=7400 -mmultiple -mstring -mstrict-align
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections
ifdef PURE_BINARY
define bsp-post-link
$(default-bsp-post-link)
$(OBJCOPY) -O binary -R .comment -S $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT)
endef
else
define bsp-post-link
$(default-bsp-post-link)
$(OBJCOPY) -O binary -R .comment -S $(basename $@)$(EXEEXT) rtems
gzip -vf9 rtems
$(LD) -o $(basename $@)$(DOWNEXT) $(PROJECT_RELEASE)/lib/bootloader.o \
--just-symbols=$(basename $@)$(EXEEXT) \
--no-warn-mismatch \
-b binary rtems.gz -T $(PROJECT_RELEASE)/lib/ppcboot.lds \
-Map $(basename $@).map && chmod 755 $@
rm -f rtems.gz
endef
endif

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@@ -1,37 +0,0 @@
#
# Config file for the QemuPrep w/o Altivec
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=powerpc
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#
CPU_CFLAGS = -mcpu=powerpc -mmultiple -mstring -mstrict-align
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections
ifdef PURE_BINARY
define bsp-post-link
$(default-bsp-post-link)
$(OBJCOPY) -O binary -R .comment -S $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT)
endef
else
define bsp-post-link
$(default-bsp-post-link)
$(OBJCOPY) -O binary -R .comment -S $(basename $@)$(EXEEXT) rtems
gzip -vf9 rtems
$(LD) -o $(basename $@)$(DOWNEXT) $(PROJECT_RELEASE)/lib/bootloader.o \
--just-symbols=$(basename $@)$(EXEEXT) \
--no-warn-mismatch \
-b binary rtems.gz -T $(PROJECT_RELEASE)/lib/ppcboot.lds \
-Map $(basename $@).map && chmod 755 $@
rm -f rtems.gz
endef
endif

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