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2001-11-26 Ralf Corsepius <corsepiu@faw.uni-ulm.de>

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* custom/gen405.cfg: Remove PPC_VECTOR_FILE_BASE, PPC_USE_SPRG;
	Remove make-target-options.
	* custom/helas403.cfg:  Remove PPC_VECTOR_FILE_BASE, PPC_USE_SPRG;
	Remove make-target-options.
	* custom/mbx8xx.cfg: Remove INSTRUCTION_CACHE_ENABLE,
	DATA_CACHE_ENABLE.
	* custom/mbx860_005b.cfg: Remove INSTRUCTION_CACHE_ENABLE,
	DATA_CACHE_ENABLE.
	* custom/mpc8260ads.cfg: Remove INSTRUCTION_CACHE_ENABLE,
	DATA_CACHE_ENABLE.
This commit is contained in:
Joel Sherrill
2001-11-27 12:09:48 +00:00
parent 9393f7fa9c
commit 4383f3a669
6 changed files with 14 additions and 50 deletions
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14
make/ChangeLog
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@@ -1,4 +1,18 @@
2001-11-26 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* custom/gen405.cfg: Remove PPC_VECTOR_FILE_BASE, PPC_USE_SPRG;
Remove make-target-options.
* custom/helas403.cfg: Remove PPC_VECTOR_FILE_BASE, PPC_USE_SPRG;
Remove make-target-options.
* custom/mbx8xx.cfg: Remove INSTRUCTION_CACHE_ENABLE,
DATA_CACHE_ENABLE.
* custom/mbx860_005b.cfg: Remove INSTRUCTION_CACHE_ENABLE,
DATA_CACHE_ENABLE.
* custom/mpc8260ads.cfg: Remove INSTRUCTION_CACHE_ENABLE,
DATA_CACHE_ENABLE.
2001-11-25 Joel Sherrill <joel@OARcorp.com>
* custom/papyrus.cfg: Removed.

17
make/custom/gen405.cfg
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@@ -19,23 +19,6 @@ RTEMS_CPU_MODEL=ppc405
# This is the actual bsp directory used during the build process.
RTEMS_BSP_FAMILY=gen405
# This section makes the target dependent options file.
# PPC_VECTOR_FILE_BASE (PowerPC)
# This defines the base address of the exception table.
# NOTE: Vectors are actually at 0xFFF00000 but file starts at offset 0x0100
#
# PPC_USE_SPRG (RTEMS PowerPC port)
# If defined, then the PowerPC specific code in RTEMS will use some
# of the special purpose registers to slightly optimize interrupt
# response time. The use of these registers can conflict with
# other tools like debuggers.
define make-target-options
@echo "#define PPC_VECTOR_FILE_BASE 0x0100" >>$@
@echo "#define PPC_USE_SPRG 1" >>$@
endef
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#

17
make/custom/helas403.cfg
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@@ -13,23 +13,6 @@ RTEMS_CPU_MODEL=ppc403
# This is the actual bsp directory used during the build process.
RTEMS_BSP_FAMILY=helas403
# This section makes the target dependent options file.
# PPC_VECTOR_FILE_BASE (PowerPC)
# This defines the base address of the exception table.
# NOTE: Vectors are actually at 0xFFF00000 but file starts at offset 0x0100
#
# PPC_USE_SPRG (RTEMS PowerPC port)
# If defined, then the PowerPC specific code in RTEMS will use some
# of the special purpose registers to slightly optimize interrupt
# response time. The use of these registers can conflict with
# other tools like debuggers.
define make-target-options
@echo "#define PPC_VECTOR_FILE_BASE 0x0100" >>$@
@echo "#define PPC_USE_SPRG 1" >>$@
endef
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#

3
make/custom/mbx860_005b.cfg
View File

@@ -21,7 +21,4 @@ define make-target-options
@echo "#endif" >>$@
@echo "#define mpc$(CPU_TYPE) 1" >>$@
@echo >>$@
@echo "#define INSTRUCTION_CACHE_ENABLE 1" >>$@
@echo "#define DATA_CACHE_ENABLE 1" >>$@
@echo >>$@
endef

11
make/custom/mbx8xx.cfg
View File

@@ -64,14 +64,6 @@ endif # mbx821
#
# MBX8xx-specific options:
#
# INSTRUCTION_CACHE_ENABLE (BSP--RTEMS)
# If defined, the instruction cache will be enabled after address translation
# is turned on.
#
# DATA_CACHE_ENABLE (BSP--RTEMS)
# If defined, the data cache will be enabled after address translation
# is turned on.
#
define make-target-options
@echo "#ifdef mpc$(CPU_TYPE)" >>$@
@@ -79,9 +71,6 @@ define make-target-options
@echo "#endif" >>$@
@echo "#define mpc$(CPU_TYPE) 1" >>$@
@echo >>$@
@echo "#define INSTRUCTION_CACHE_ENABLE 1" >>$@
@echo "#define DATA_CACHE_ENABLE 1" >>$@
@echo >>$@
endef
# This contains the compiler options necessary to select the CPU model

2
make/custom/mpc8260ads.cfg
View File

@@ -32,8 +32,6 @@ define make-target-options
@echo >>$@
@echo "#define PPC_ABI PPC_ABI_EABI" >>$@
@echo "#define PPC_ASM PPC_ASM_ELF" >>$@
@echo "#define INSTRUCTION_CACHE_ENABLE 0" >>$@
@echo "#define DATA_CACHE_ENABLE 0" >>$@
endef
# This contains the compiler options necessary to select the CPU model