bsp/atsam: Make clock application configurable.

c/src/lib/libbsp/arm/atsam/Makefile.am

@@ -57,6 +57,7 @@ include_bsp_HEADERS += include/atsam-spi.h
 include_bsp_HEADERS += include/spi.h
 include_bsp_HEADERS += include/sc16is752.h
 include_bsp_HEADERS += include/power.h
+include_bsp_HEADERS += include/atsam-clock-config.h
 
 include_libchipdir = $(includedir)/libchip
 
@@ -398,6 +399,9 @@ libbsp_a_SOURCES += startup/bspstart.c
 libbsp_a_SOURCES += startup/bspstarthooks.c
 libbsp_a_SOURCES += startup/getentropy-trng.c
 libbsp_a_SOURCES += startup/pin-config.c
+libbsp_a_SOURCES += startup/pmc-config.c
+libbsp_a_SOURCES += startup/power-clock.c
+libbsp_a_SOURCES += startup/power-rtc.c
 libbsp_a_SOURCES += startup/power.c
 libbsp_a_SOURCES += startup/power-rtc.c
 libbsp_a_SOURCES += startup/power-clock.c

c/src/lib/libbsp/arm/atsam/README

@@ -17,9 +17,28 @@ controller and speed combinations.
 Use BOARD_MAINOSC=XYZ to set the main oscillator frequency in Hz (default
 12MHz).
 
-Use BOARD_MCK=XYZ to set the Master Clock (MCK) frequency in Hz (default
-123MHz).  The default value enables operation of an external SDRAM, e.g. 150MHz
-would be too fast.
+Use ATSAM_MCK=XYZ to set the MCK frequency that should be used. The default case
+(123000000) enables operation of an external SDRAM on the SAMv71 Explained
+evaluation kit. Some other configurations (e.g. 150MHz) would be too fast on
+that board.
+
+Your application can also overwrite the clock settings. To overwrite the clock
+settings, define the following structures in your application:
+
+--------
+const struct atsam_clock_config atsam_clock_config = {
+  .pllar_init = my_custom_pllar_value,
+  .mckr_init = my_custom_mckr_value,
+  .mck_freq = my_resulting_mck_frequency
+};
+
+const struct BOARD_Sdram_Config BOARD_Sdram_Config = {
+  .sdramc_tr = my_custom_sdramc_tr_value,
+  .sdramc_cr = my_custom_sdramc_cr_value,
+  .sdramc_mdr = my_custom_sdramc_mdr_value,
+  .sdramc_cfr1 = my_custom_sdramc_cfr1_value
+};
+--------
 
 Use ATSAM_CONSOLE_BAUD=XYZ to set the initial baud for console devices (default
 115200).

c/src/lib/libbsp/arm/atsam/configure.ac

@@ -63,8 +63,10 @@ esac],
 RTEMS_BSPOPTS_SET([BOARD_MAINOSC],[*],[12000000])
 RTEMS_BSPOPTS_HELP([BOARD_MAINOSC],[Main oscillator frequency in Hz (default 12MHz)])
 
-RTEMS_BSPOPTS_SET([BOARD_MCK],[*],[123000000])
-RTEMS_BSPOPTS_HELP([BOARD_MCK],[Master Clock (MCK) frequency in Hz (default 123MHz)])
+RTEMS_BSPOPTS_SET([ATSAM_MCK],[*],[123000000])
+RTEMS_BSPOPTS_HELP([ATSAM_MCK],
+[Frequency of the MCK in Hz. Set to 0 to force application defined speed.
+See startup/pmc-config.c for available clock configurations.])
 
 RTEMS_BSPOPTS_SET([ATSAM_CONSOLE_BAUD],[*],[115200])
 RTEMS_BSPOPTS_HELP([ATSAM_CONSOLE_BAUD],[initial baud for console devices (default 115200)])

c/src/lib/libbsp/arm/atsam/console/debug-console.c

@@ -15,6 +15,7 @@
 #include <rtems/bspIo.h>
 #include <rtems/sysinit.h>
 
+#include <bsp/atsam-clock-config.h>
 #include <chip.h>
 #include <include/dbg_console.h>
 

c/src/lib/libbsp/arm/atsam/i2c/atsam_i2c_bus.c

@@ -12,6 +12,7 @@
  * http://www.rtems.org/license/LICENSE.
  */
 
+#include <bsp/atsam-clock-config.h>
 #include <bsp/atsam-i2c.h>
 
 #include <rtems/irq-extension.h>

c/src/lib/libbsp/arm/atsam/include/atsam-clock-config.h

@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2017 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef ATSAM_CLOCK_CONFIG_H
+#define ATSAM_CLOCK_CONFIG_H
+
+#include <rtems.h>
+#include <bsp/linker-symbols.h>
+#include <bspopts.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+struct atsam_clock_config {
+  /* Initialization value for the PMC_PLLAR. */
+  uint32_t pllar_init;
+  /* Initialization value for the PMC_MCKR. */
+  uint32_t mckr_init;
+  /* Resulting frequency in Hz. */
+  uint32_t mck_freq;
+};
+
+extern const struct atsam_clock_config atsam_clock_config;
+
+#define BOARD_MCK (atsam_clock_config.mck_freq)
+
+struct BOARD_Sdram_Config {
+  uint32_t sdramc_tr;
+  uint32_t sdramc_cr;
+  uint32_t sdramc_mdr;
+  uint32_t sdramc_cfr1;
+};
+
+extern const struct BOARD_Sdram_Config BOARD_Sdram_Config;
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* ATSAM_CLOCK_CONFIG_H */

c/src/lib/libbsp/arm/atsam/libraries/libboard/board_v71_xult.h

@@ -153,7 +153,6 @@
 #else
 	#define BOARD_MCK    150000000
 #endif
-#endif /* __rtems__ */
 
 #if (BOARD_MCK==123000000)
 
@@ -166,6 +165,9 @@
 	#define PLL_DIV    0x01
 
 #endif
+#else /* __rtems__ */
+#include <bsp/atsam-clock-config.h>
+#endif /* __rtems__ */
 
 /*----------------------------------------------------------------------------*/
 /**

c/src/lib/libbsp/arm/atsam/libraries/libboard/include/board_memories.h

@@ -43,16 +43,6 @@
 
 extern void BOARD_ConfigureSdram(void);
 extern uint32_t BOARD_SdramValidation(uint32_t baseAddr, uint32_t size);
-#ifdef __rtems__
-struct BOARD_Sdram_Config {
-  uint32_t sdramc_tr;
-  uint32_t sdramc_cr;
-  uint32_t sdramc_mdr;
-  uint32_t sdramc_cfr1;
-};
-
-extern const struct BOARD_Sdram_Config BOARD_Sdram_Config;
-#endif /* __rtems__ */
 
 #endif /* #ifndef BOARD_MEMORIES_H */
 

c/src/lib/libbsp/arm/atsam/libraries/libboard/resources_v71/system_samv71.c

@@ -45,6 +45,7 @@ extern "C" {
 	/* Clock Settings (600MHz PLL VDDIO 3.3V and VDDCORE 1.2V) */
 	/* Clock Settings (300MHz HCLK, 150MHz MCK)=> PRESC = 2, MDIV = 2 */
 #define SYS_BOARD_OSCOUNT   (CKGR_MOR_MOSCXTST(0x8U))
+#ifndef __rtems__
 #if BOARD_MCK == 123000000
 	/* For example usb_video, PLLA/HCLK/MCK clock is set to 492/246/123MHz to achieve
 	   the maximum performance, for other examples the clock is set to 300/300/150MHz */
@@ -65,8 +66,11 @@ extern "C" {
 	#error "unexpected Main Clock (MCK) frequency"
 #endif
 
-#ifndef __rtems__
 	uint32_t SystemCoreClock = CHIP_FREQ_MAINCK_RC_4MHZ;
+#else /* __rtems__ */
+#define SYS_BOARD_MCKR_MDIV ((atsam_clock_config.mckr_init) & PMC_MCKR_MDIV_Msk)
+#define SYS_BOARD_MCKR (atsam_clock_config.mckr_init)
+#define SYS_BOARD_PLLAR (atsam_clock_config.pllar_init)
 #endif /* __rtems__ */
 #define USBCLK_DIV          10
 

c/src/lib/libbsp/arm/atsam/preinstall.am

@@ -157,6 +157,10 @@ $(PROJECT_INCLUDE)/bsp/power.h: include/power.h $(PROJECT_INCLUDE)/bsp/$(dirstam
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/power.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/power.h
 
+$(PROJECT_INCLUDE)/bsp/atsam-clock-config.h: include/atsam-clock-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/atsam-clock-config.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/atsam-clock-config.h
+
 $(PROJECT_INCLUDE)/libchip/$(dirstamp):
 	@$(MKDIR_P) $(PROJECT_INCLUDE)/libchip
 	@: > $(PROJECT_INCLUDE)/libchip/$(dirstamp)

c/src/lib/libbsp/arm/atsam/spi/atsam_spi_bus.c

@@ -28,6 +28,7 @@
 /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                           */
 /* ---------------------------------------------------------------------------- */
 
+#include <bsp/atsam-clock-config.h>
 #include <bsp/atsam-spi.h>
 
 #include <dev/spi/spi.h>

c/src/lib/libbsp/arm/atsam/startup/bspstarthooks.c

@@ -15,6 +15,7 @@
 #include <bsp.h>
 #include <bsp/start.h>
 #include <bsp/pin-config.h>
+#include <bsp/atsam-clock-config.h>
 
 #include <chip.h>
 #include <include/board_lowlevel.h>

c/src/lib/libbsp/arm/atsam/startup/pmc-config.c

@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2017 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp/atsam-clock-config.h>
+#include <bspopts.h>
+#include <chip.h>
+
+#if ATSAM_MCK == 123000000
+/* PLLA/HCLK/MCK clock is set to 492/246/123MHz */
+const struct atsam_clock_config atsam_clock_config = {
+  .pllar_init = (CKGR_PLLAR_ONE | CKGR_PLLAR_MULA(0x28U) |
+      CKGR_PLLAR_PLLACOUNT(0x3fU) | CKGR_PLLAR_DIVA(0x1U)),
+  .mckr_init = (PMC_MCKR_PRES_CLK_2 | PMC_MCKR_CSS_PLLA_CLK |
+      PMC_MCKR_MDIV_PCK_DIV2),
+  .mck_freq = 123*1000*1000
+};
+#elif ATSAM_MCK == 150000000
+/* PLLA/HCLK/MCK clock is set to 300/300/150MHz */
+const struct atsam_clock_config atsam_clock_config = {
+  .pllar_init = (CKGR_PLLAR_ONE | CKGR_PLLAR_MULA(0x18U) |
+      CKGR_PLLAR_PLLACOUNT(0x3fU) | CKGR_PLLAR_DIVA(0x1U)),
+  .mckr_init = (PMC_MCKR_PRES_CLK_1 | PMC_MCKR_CSS_PLLA_CLK |
+      PMC_MCKR_MDIV_PCK_DIV2),
+  .mck_freq = 150*1000*1000
+};
+#elif ATSAM_MCK == 60000000
+/* PLLA/HCLK/MCK clock is set to 60/60/60MHz */
+const struct atsam_clock_config atsam_clock_config = {
+  .pllar_init = (CKGR_PLLAR_ONE | CKGR_PLLAR_MULA(0x4U) |
+      CKGR_PLLAR_PLLACOUNT(0x3fU) | CKGR_PLLAR_DIVA(0x1U)),
+  .mckr_init = (PMC_MCKR_PRES_CLK_1 | PMC_MCKR_CSS_PLLA_CLK |
+      PMC_MCKR_MDIV_EQ_PCK),
+  .mck_freq = 60*1000*1000
+};
+#error Unknown ATSAM_MCK.
+#endif

c/src/lib/libbsp/arm/atsam/startup/sdram-config.c

@@ -17,6 +17,11 @@
 #include <include/board_memories.h>
 
 #if defined ATSAM_SDRAM_IS42S16100E_7BLI
+
+#if ATSAM_MCK != 123000000
+#error Please check SDRAM settings for this clock frequency.
+#endif
+
 const struct BOARD_Sdram_Config BOARD_Sdram_Config = {
   /* FIXME: a lot of these values should be calculated using CPU frequency */
   .sdramc_tr = 1562,
@@ -37,8 +42,13 @@ const struct BOARD_Sdram_Config BOARD_Sdram_Config = {
 };
 
 #elif defined ATSAM_SDRAM_IS42S16320F_7BL
+
+#if ATSAM_MCK != 123000000
+#error Please check SDRAM settings for this clock frequency.
+#endif
+
 #define CLOCK_CYCLES_FROM_NS_MAX(ns) \
-    (((ns) * (BOARD_MCK / 1000ul / 1000ul)) / 1000ul)
+    (((ns) * (ATSAM_MCK / 1000ul / 1000ul)) / 1000ul)
 #define CLOCK_CYCLES_FROM_NS_MIN(ns) (CLOCK_CYCLES_FROM_NS_MAX(ns) + 1)
 
 const struct BOARD_Sdram_Config BOARD_Sdram_Config = {
@@ -64,12 +74,6 @@ const struct BOARD_Sdram_Config BOARD_Sdram_Config = {
       SDRAMC_CFR1_TMRD(CLOCK_CYCLES_FROM_NS_MIN(14))
 };
 
-#if CLOCK_CYCLES_FROM_NS_MIN(67) > 0xF
-  /* Prevent the fields to be out of range by checking the one with the biggest
-   * value. */
-  #error SDRAM calculation does not work for the selected clock frequency
-#endif
-
 #else
   #error SDRAM not supported.
 #endif