Add missing prototypes.

c/src/lib/libbsp/powerpc/haleakala/irq/irq.c

@@ -66,7 +66,7 @@ static inline int IsUICIRQ(const rtems_irq_number irqLine)
 	 );
 }
 
-static void WriteIState()
+static void WriteIState(void)
 /* Write the gEnabledInts state masked by gIntInhibited to the hardware */
 {
 	PPC_SET_DEVICE_CONTROL_REGISTER(UIC0_ER, 

c/src/lib/libbsp/powerpc/haleakala/irq/irq_init.c

@@ -21,14 +21,14 @@
 /*
  * default on/off function
  */
-static void nop_func()
+static void nop_func(void)
 {
 }
 
 /*
  * default isOn function
  */
-static int not_connected()
+static int not_connected(void)
 {
 	return 0;
 }

c/src/lib/libbsp/powerpc/haleakala/startup/bspstart.c

@@ -156,7 +156,7 @@ EarlyUARTInit(int baudRate)
 
 
 static void
-InitUARTClock()
+InitUARTClock(void)
 {
 	uint32_t reg;
 	mfsdr(SDR0_UART0,reg);
@@ -184,7 +184,7 @@ void GPIO_AlternateSelect(int bitnum, int source)
 	}
 }
 
-void Init_FPGA()
+void Init_FPGA(void)
 {
 	/* Have to write to the FPGA to enable the UART drivers */
 	/* Have to enable CS2 as an output in GPIO to get the FPGA working */