mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
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bsp/leon3: Move and simplify bsp_irq_fixup()
This commit is contained in:
63
bsps/sparc/erc32/include/bsp/irqimpl.h
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63
bsps/sparc/erc32/include/bsp/irqimpl.h
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@@ -0,0 +1,63 @@
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/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSBSPsSPARCERC32
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*
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* @brief This header file provides interfaces used by the interrupt support
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* implementation.
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*/
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/*
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* Copyright (C) 2023 embedded brains GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef LIBBSP_SPARC_ERC32_BSP_IRQIMPL_H
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#define LIBBSP_SPARC_ERC32_BSP_IRQIMPL_H
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @addtogroup RTEMSBSPsSPARCERC32
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*
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* @{
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*/
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static inline uint32_t bsp_irq_fixup( uint32_t irq )
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{
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return irq;
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}
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* LIBBSP_SPARC_ERC32_BSP_IRQIMPL_H */
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@@ -326,11 +326,6 @@ typedef struct {
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extern ERC32_Register_Map ERC32_MEC;
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static __inline__ int bsp_irq_fixup(int irq)
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{
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return irq;
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}
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/*
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* Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask,
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* and the Interrupt Pending Registers.
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63
bsps/sparc/leon2/include/bsp/irqimpl.h
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63
bsps/sparc/leon2/include/bsp/irqimpl.h
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@@ -0,0 +1,63 @@
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/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup RTEMSBSPsSPARCLEON2
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*
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* @brief This header file provides interfaces used by the interrupt support
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* implementation.
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*/
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/*
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* Copyright (C) 2023 embedded brains GmbH & Co. KG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef LIBBSP_SPARC_LEON3_BSP_IRQIMPL_H
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#define LIBBSP_SPARC_LEON3_BSP_IRQIMPL_H
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @addtogroup RTEMSBSPsSPARCLEON2
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*
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* @{
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*/
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static inline uint32_t bsp_irq_fixup( uint32_t irq )
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{
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return irq;
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}
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* LIBBSP_SPARC_LEON3_BSP_IRQIMPL_H */
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@@ -292,11 +292,6 @@ typedef struct {
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extern LEON_Register_Map LEON_REG;
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static __inline__ int bsp_irq_fixup(int irq)
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{
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return irq;
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}
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/*
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* Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask,
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* and the Interrupt Pending Registers.
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@@ -40,9 +40,9 @@
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*/
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#include <bsp.h>
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#include <bsp/irq.h>
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#include <bspopts.h>
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#include <bsp/fatal.h>
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#include <bsp/irq.h>
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#include <leon.h>
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#include <rtems/rtems/intr.h>
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#include <grlib/ambapp.h>
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#include <rtems/score/profiling.h>
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@@ -37,7 +37,6 @@
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#ifndef LIBBSP_LEON3_IRQ_CONFIG_H
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#define LIBBSP_LEON3_IRQ_CONFIG_H
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#include <leon.h>
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#include <rtems/score/processormask.h>
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#define BSP_INTERRUPT_VECTOR_MAX_STD 15 /* Standard IRQ controller */
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@@ -67,6 +67,14 @@ extern volatile struct irqmp_regs *LEON3_IrqCtrl_Regs;
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*/
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extern struct ambapp_dev *LEON3_IrqCtrl_Adev;
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/**
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* @brief This object provides the interrupt number used to multiplex extended
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* interrupts or is zero if no extended interrupts are available.
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*
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* This object should be read-only after initialization.
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*/
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extern uint32_t LEON3_IrqCtrl_EIrq;
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/**
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* @brief Initializes the interrupt controller for the boot processor.
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*
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@@ -74,6 +82,29 @@ extern struct ambapp_dev *LEON3_IrqCtrl_Adev;
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*/
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void leon3_ext_irq_init( volatile struct irqmp_regs *regs );
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/**
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* @brief Acknowledges and maps extended interrupts if this feature is
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* available and the interrupt for extended interrupts is present.
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*
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* @param irq is the standard interrupt number.
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*/
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static inline uint32_t bsp_irq_fixup( uint32_t irq )
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{
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uint32_t eirq;
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if ( irq != LEON3_IrqCtrl_EIrq ) {
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return irq;
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}
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eirq = LEON3_IrqCtrl_Regs->intid[ _LEON3_Get_current_processor() ] & 0x1f;
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if ( eirq < 16 ) {
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return irq;
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}
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return eirq;
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}
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/** @} */
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#ifdef __cplusplus
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@@ -154,24 +154,6 @@ extern struct ambapp_dev *LEON3_Timer_Adev;
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/* LEON3 CPU Index of boot CPU */
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extern uint32_t LEON3_Cpu_Index;
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/* The external IRQ number, -1 if not external interrupts */
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extern int LEON3_IrqCtrl_EIrq;
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static __inline__ int bsp_irq_fixup(int irq)
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{
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int eirq, cpu;
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if (LEON3_IrqCtrl_EIrq != 0 && irq == LEON3_IrqCtrl_EIrq) {
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/* Get interrupt number from IRQ controller */
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cpu = _LEON3_Get_current_processor();
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eirq = LEON3_IrqCtrl_Regs->intid[cpu] & 0x1f;
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if (eirq & 0x10)
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irq = eirq;
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}
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return irq;
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}
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/* Macros used for manipulating bits in LEON3 GP Timer Control Register */
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#define LEON3_IRQMPSTATUS_CPUNR 28
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@@ -36,7 +36,7 @@
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#include <bsp/irq-generic.h>
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/* GRLIB extended IRQ controller IRQ number */
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int LEON3_IrqCtrl_EIrq = -1;
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uint32_t LEON3_IrqCtrl_EIrq;
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rtems_interrupt_lock LEON3_IrqCtrl_Lock =
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RTEMS_INTERRUPT_LOCK_INITIALIZER("LEON3 IrqCtrl");
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@@ -47,11 +47,7 @@ void leon3_ext_irq_init(volatile struct irqmp_regs *regs)
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regs->mask[LEON3_Cpu_Index] = 0;
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regs->force[LEON3_Cpu_Index] = 0;
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regs->iclear = 0xffffffff;
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if ( (regs->mpstat >> 16) & 0xf ) {
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/* Extended IRQ controller available */
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LEON3_IrqCtrl_EIrq = (regs->mpstat >> 16) & 0xf;
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}
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LEON3_IrqCtrl_EIrq = (regs->mpstat >> 16) & 0xf;
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}
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bool bsp_interrupt_is_valid_vector(rtems_vector_number vector)
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@@ -29,6 +29,7 @@
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#include <bsp.h>
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#include <bsp/irq-generic.h>
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#include <bsp/irqimpl.h>
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/*
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* This function is called directly from _SPARC_Interrupt_trap() for
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@@ -17,6 +17,7 @@ install:
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- destination: ${BSP_INCLUDEDIR}/bsp
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source:
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- bsps/sparc/erc32/include/bsp/irq.h
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- bsps/sparc/erc32/include/bsp/irqimpl.h
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- destination: ${BSP_LIBDIR}
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source:
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- bsps/sparc/erc32/start/linkcmds
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@@ -16,6 +16,7 @@ install:
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source:
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- bsps/sparc/leon2/include/bsp/at697_pci.h
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- bsps/sparc/leon2/include/bsp/irq.h
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- bsps/sparc/leon2/include/bsp/irqimpl.h
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- destination: ${BSP_LIBDIR}
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source:
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- bsps/sparc/leon2/start/linkcmds.at697f
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