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https://gitlab.rtems.org/rtems/rtos/rtems.git
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2001-04-16 Joel Sherrill <joel@OARcorp.com>
* start/start.S, startup/bspstart.c, startup/linkcmds: Cleanup that was not merged from the simple non-RTEMS program.
This commit is contained in:
@@ -1,3 +1,8 @@
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2001-04-16 Joel Sherrill <joel@OARcorp.com>
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* start/start.S, startup/bspstart.c, startup/linkcmds:
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Cleanup that was not merged from the simple non-RTEMS program.
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2001-04-16 Joel Sherrill <joel@OARcorp.com>
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* start/start.S, startup/bspstart.c, startup/linkcmds:
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@@ -1,12 +1,7 @@
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/*
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* start.S -- startup file for GENMONGOOSE-V BSP.
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* It is based on the JMR3904 BSP which is in turn based upon
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* support in newlib-1.8.2/libgloss/mips and adapted for RTEMS.
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* start.S -- startup file for JMR3904 BSP based upon crt0.S from
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* newlib-1.8.2/libgloss/mips and adapted for RTEMS.
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*
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* COPYRIGHT (c) 2001.
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* On-Line Applications Research Corporation (OAR).
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* Mongoose-V Modifications
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*
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* crt0.S -- startup file for MIPS.
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*
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* Copyright (c) 1995, 1996, 1997 Cygnus Support
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@@ -22,13 +17,14 @@
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* they apply.
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*/
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#include <asm.h>
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#include "regs.S"
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#ifdef __mips16
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/* This file contains 32 bit assembly code. */
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.set nomips16
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#endif
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#include "regs.S"
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/* This is for referencing addresses that are not in the .sdata or
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.sbss section under embedded-pic, or before we've set up gp. */
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#ifdef __mips_embedded_pic
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@@ -41,43 +37,6 @@
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# define LA(t,x) la t,x
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#endif /* __mips_embedded_pic */
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#define zero $0
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#define AT $1 /* assembler temporaries */
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#define v0 $2 /* value holders */
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#define v1 $3
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#define a0 $4 /* arguments */
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#define a1 $5
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#define a2 $6
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#define a3 $7
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#define t0 $8 /* temporaries */
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#define t1 $9
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#define t2 $10
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#define t3 $11
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#define t4 $12
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#define t5 $13
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#define t6 $14
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#define t7 $15
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#define s0 $16 /* saved registers */
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#define s1 $17
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#define s2 $18
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#define s3 $19
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#define s4 $20
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#define s5 $21
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#define s6 $22
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#define s7 $23
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#define t8 $24 /* temporaries */
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#define t9 $25
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#define k0 $26 /* kernel registers */
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#define k1 $27
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#define gp $28 /* global pointer */
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#define sp $29 /* stack pointer */
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#define s8 $30 /* saved register */
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#define fp $30 /* frame pointer (old usage) */
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#define ra $31 /* return address */
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.text
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.align 2
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@@ -86,7 +45,7 @@
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* start of the .text section.
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*/
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nop
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.globl _start
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.ent _start
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_start:
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@@ -99,7 +58,8 @@ _start:
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nop
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_branch:
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move $5, $31 # $5 == where are we
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li $6, 0x8002000c # $6 == where we want to be
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li $6, 0x8800000c # $6 == where we want to be
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#la $6,_branch
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beq $5, $6, _start_in_ram
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nop
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# relocate the code from EEPROM to RAM
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@@ -111,7 +71,6 @@ relocate:
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addu $6, $6, 4 # RAM++
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bne $6, $7, relocate # copied all the way to edata?
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nop
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la $6, _start_in_ram
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jr $6
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nop
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@@ -234,42 +193,4 @@ _sys_exit:
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nop
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.end _sys_exit
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#define FRAME(name,frm_reg,offset,ret_reg) \
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.globl name; \
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.ent name; \
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name:; \
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.frame frm_reg,offset,ret_reg
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#define ENDFRAME(name) \
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.end name
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FRAME(mips_enable_interrupts,sp,0,ra)
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mfc0 t0,C0_SR /* get status reg */
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nop
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or t0,t0,a0
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mtc0 t0,C0_SR /* save updated status reg */
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j ra
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nop
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ENDFRAME(mips_enable_interrupts)
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#define SR_IEC 0x00000001 /* cur interrupt enable, 1 => enable */
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#define C0_SR $12 /* status register */
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/*
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FRAME(_CPU_ISR_Set_level,sp,0,ra)
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nop
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mfc0 t0,C0_SR
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andi a0, SR_IEC
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or t0, a0
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mtc0 t0,C0_SR
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nop
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j ra
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ENDFRAME(_CPU_ISR_Set_level)
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*/
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.section vectors
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.align 2
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FRAME(__ISR_MAIN,sp,0,ra)
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ENDFRAME(__ISR_MAIN)
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/* EOF crt0.S */
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@@ -57,18 +57,16 @@ void bsp_libc_init( void *, unsigned32, int );
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void bsp_pretasking_hook(void)
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{
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extern int HeapBase;
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extern int HeapSize;
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extern int HeapBase;
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extern int HeapSize;
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void *heapStart = &HeapBase;
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unsigned long heapSize = (unsigned long)&HeapSize;
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unsigned long ramSpace;
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bsp_libc_init(heapStart, (unsigned32) heapSize, 0);
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#ifdef RTEMS_DEBUG
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rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
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#endif
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}
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/*
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@@ -81,54 +79,33 @@ void bsp_start( void )
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{
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extern int _end;
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extern int WorkspaceBase;
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/* Configure Number of Register Caches */
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extern int _RamSize, _RamBase;
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int ram_left;
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ram_left = (unsigned32) &_RamSize -
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(unsigned32)&WorkspaceBase - (unsigned32) &_RamBase;
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Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
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Cpu_table.postdriver_hook = bsp_postdriver_hook;
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Cpu_table.interrupt_stack_size = 4096;
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/* HACK -- tied to value linkcmds */
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if ( BSP_Configuration.work_space_size >(4096*1024) )
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_sys_exit( 1 );
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if ( BSP_Configuration.work_space_size > ram_left )
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_sys_exit( 1 );
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BSP_Configuration.work_space_start = (void *) &WorkspaceBase;
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/*mips_set_sr( 0xff00 ); all interrupts unmasked but globally off */
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/* depend on the IRC to take care of things */
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/* Clear all pending peripheral interrupts and mask them. */
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MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_CAUSE_REGISTER, 0 );
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MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_MASK_REGISTER, 0 );
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/*
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mips_set_sr( (SR_CU0 | SR_CU1 | SR_IBIT1 | SR_IBIT2 | SR_IBIT3 | SR_IBIT4 | SR_IBIT6 | SR_IBIT8) );
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*/
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* Enable coprocessors.
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* Disable external interrupts.
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* Enable software interrupts.
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*/
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mips_set_sr( (SR_CU0 | SR_CU1 | SR_IBIT1 | SR_IBIT2) );
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mips_install_isr_entries();
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MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_CAUSE_REGISTER, 0 );
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}
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/* XXX */
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void clear_cache( void *address, size_t n )
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{
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}
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/* Structure filled in by get_mem_info. Only the size field is
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actually used (to clear bss), so the others aren't even filled in. */
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struct s_mem
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{
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unsigned int size;
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unsigned int icsize;
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unsigned int dcsize;
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};
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void
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get_mem_info (mem)
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struct s_mem *mem;
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{
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mem->size = 0x1000000; /* XXX figure out something here */
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}
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@@ -117,11 +117,9 @@ data segment after the exception vectors and below 0x80020000,
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__stack = .;
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_stack_init = .;
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_clear_end = .;
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WorkspaceBase = .;
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/* HACK -- tied to value bspstart */
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. += 4096K; /* reserve some memory for workspace */
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HeapBase = .;
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. += HeapSize; /* reserve some memory for heap */
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WorkspaceBase = .;
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}
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end = .;
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_end = .;
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