2001-04-16 Joel Sherrill <joel@OARcorp.com>

* start/start.S, startup/bspstart.c, startup/linkcmds:
	Cleanup that was not merged from the simple non-RTEMS program.
This commit is contained in:
Joel Sherrill
2001-04-16 20:03:31 +00:00
parent d74a92d1fd
commit 2cdde6d820
4 changed files with 30 additions and 129 deletions

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@@ -1,3 +1,8 @@
2001-04-16 Joel Sherrill <joel@OARcorp.com>
* start/start.S, startup/bspstart.c, startup/linkcmds:
Cleanup that was not merged from the simple non-RTEMS program.
2001-04-16 Joel Sherrill <joel@OARcorp.com>
* start/start.S, startup/bspstart.c, startup/linkcmds:

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@@ -1,12 +1,7 @@
/*
* start.S -- startup file for GENMONGOOSE-V BSP.
* It is based on the JMR3904 BSP which is in turn based upon
* support in newlib-1.8.2/libgloss/mips and adapted for RTEMS.
* start.S -- startup file for JMR3904 BSP based upon crt0.S from
* newlib-1.8.2/libgloss/mips and adapted for RTEMS.
*
* COPYRIGHT (c) 2001.
* On-Line Applications Research Corporation (OAR).
* Mongoose-V Modifications
*
* crt0.S -- startup file for MIPS.
*
* Copyright (c) 1995, 1996, 1997 Cygnus Support
@@ -22,13 +17,14 @@
* they apply.
*/
#include <asm.h>
#include "regs.S"
#ifdef __mips16
/* This file contains 32 bit assembly code. */
.set nomips16
#endif
#include "regs.S"
/* This is for referencing addresses that are not in the .sdata or
.sbss section under embedded-pic, or before we've set up gp. */
#ifdef __mips_embedded_pic
@@ -41,43 +37,6 @@
# define LA(t,x) la t,x
#endif /* __mips_embedded_pic */
#define zero $0
#define AT $1 /* assembler temporaries */
#define v0 $2 /* value holders */
#define v1 $3
#define a0 $4 /* arguments */
#define a1 $5
#define a2 $6
#define a3 $7
#define t0 $8 /* temporaries */
#define t1 $9
#define t2 $10
#define t3 $11
#define t4 $12
#define t5 $13
#define t6 $14
#define t7 $15
#define s0 $16 /* saved registers */
#define s1 $17
#define s2 $18
#define s3 $19
#define s4 $20
#define s5 $21
#define s6 $22
#define s7 $23
#define t8 $24 /* temporaries */
#define t9 $25
#define k0 $26 /* kernel registers */
#define k1 $27
#define gp $28 /* global pointer */
#define sp $29 /* stack pointer */
#define s8 $30 /* saved register */
#define fp $30 /* frame pointer (old usage) */
#define ra $31 /* return address */
.text
.align 2
@@ -86,7 +45,7 @@
* start of the .text section.
*/
nop
.globl _start
.ent _start
_start:
@@ -99,7 +58,8 @@ _start:
nop
_branch:
move $5, $31 # $5 == where are we
li $6, 0x8002000c # $6 == where we want to be
li $6, 0x8800000c # $6 == where we want to be
#la $6,_branch
beq $5, $6, _start_in_ram
nop
# relocate the code from EEPROM to RAM
@@ -111,7 +71,6 @@ relocate:
addu $6, $6, 4 # RAM++
bne $6, $7, relocate # copied all the way to edata?
nop
la $6, _start_in_ram
jr $6
nop
@@ -234,42 +193,4 @@ _sys_exit:
nop
.end _sys_exit
#define FRAME(name,frm_reg,offset,ret_reg) \
.globl name; \
.ent name; \
name:; \
.frame frm_reg,offset,ret_reg
#define ENDFRAME(name) \
.end name
FRAME(mips_enable_interrupts,sp,0,ra)
mfc0 t0,C0_SR /* get status reg */
nop
or t0,t0,a0
mtc0 t0,C0_SR /* save updated status reg */
j ra
nop
ENDFRAME(mips_enable_interrupts)
#define SR_IEC 0x00000001 /* cur interrupt enable, 1 => enable */
#define C0_SR $12 /* status register */
/*
FRAME(_CPU_ISR_Set_level,sp,0,ra)
nop
mfc0 t0,C0_SR
andi a0, SR_IEC
or t0, a0
mtc0 t0,C0_SR
nop
j ra
ENDFRAME(_CPU_ISR_Set_level)
*/
.section vectors
.align 2
FRAME(__ISR_MAIN,sp,0,ra)
ENDFRAME(__ISR_MAIN)
/* EOF crt0.S */

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@@ -57,18 +57,16 @@ void bsp_libc_init( void *, unsigned32, int );
void bsp_pretasking_hook(void)
{
extern int HeapBase;
extern int HeapSize;
extern int HeapBase;
extern int HeapSize;
void *heapStart = &HeapBase;
unsigned long heapSize = (unsigned long)&HeapSize;
unsigned long ramSpace;
bsp_libc_init(heapStart, (unsigned32) heapSize, 0);
#ifdef RTEMS_DEBUG
rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
#endif
}
/*
@@ -81,54 +79,33 @@ void bsp_start( void )
{
extern int _end;
extern int WorkspaceBase;
/* Configure Number of Register Caches */
extern int _RamSize, _RamBase;
int ram_left;
ram_left = (unsigned32) &_RamSize -
(unsigned32)&WorkspaceBase - (unsigned32) &_RamBase;
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
Cpu_table.postdriver_hook = bsp_postdriver_hook;
Cpu_table.interrupt_stack_size = 4096;
/* HACK -- tied to value linkcmds */
if ( BSP_Configuration.work_space_size >(4096*1024) )
_sys_exit( 1 );
if ( BSP_Configuration.work_space_size > ram_left )
_sys_exit( 1 );
BSP_Configuration.work_space_start = (void *) &WorkspaceBase;
/*mips_set_sr( 0xff00 ); all interrupts unmasked but globally off */
/* depend on the IRC to take care of things */
/* Clear all pending peripheral interrupts and mask them. */
MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_CAUSE_REGISTER, 0 );
MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_MASK_REGISTER, 0 );
/*
mips_set_sr( (SR_CU0 | SR_CU1 | SR_IBIT1 | SR_IBIT2 | SR_IBIT3 | SR_IBIT4 | SR_IBIT6 | SR_IBIT8) );
*/
* Enable coprocessors.
* Disable external interrupts.
* Enable software interrupts.
*/
mips_set_sr( (SR_CU0 | SR_CU1 | SR_IBIT1 | SR_IBIT2) );
mips_install_isr_entries();
MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_CAUSE_REGISTER, 0 );
}
/* XXX */
void clear_cache( void *address, size_t n )
{
}
/* Structure filled in by get_mem_info. Only the size field is
actually used (to clear bss), so the others aren't even filled in. */
struct s_mem
{
unsigned int size;
unsigned int icsize;
unsigned int dcsize;
};
void
get_mem_info (mem)
struct s_mem *mem;
{
mem->size = 0x1000000; /* XXX figure out something here */
}

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@@ -117,11 +117,9 @@ data segment after the exception vectors and below 0x80020000,
__stack = .;
_stack_init = .;
_clear_end = .;
WorkspaceBase = .;
/* HACK -- tied to value bspstart */
. += 4096K; /* reserve some memory for workspace */
HeapBase = .;
. += HeapSize; /* reserve some memory for heap */
WorkspaceBase = .;
}
end = .;
_end = .;