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2005-05-17 Jennifer Averett <jennifer.averett@oarcorp.com>

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* at91rm9200/irq/irq.h, mc9328mxl/irq/irq.h, s3c2400/irq/irq.h:
	Modified names and types to match rtems/irq.h. Note: rtems/irq.h
	should be included after the addition of a parameter to ISRs.
This commit is contained in:
Jennifer Averett
2005-05-17 15:08:26 +00:00
parent d8999b705a
commit 2c247940a7
4 changed files with 147 additions and 148 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
c/src/lib/libcpu/arm/ChangeLog
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@@ -1,3 +1,9 @@
2005-05-17 Jennifer Averett <jennifer.averett@oarcorp.com>
* at91rm9200/irq/irq.h, mc9328mxl/irq/irq.h, s3c2400/irq/irq.h:
Modified names and types to match rtems/irq.h. Note: rtems/irq.h
should be included after the addition of a parameter to ISRs.
2005-05-11 Ralf Corsepius <ralf.corsepius@rtems.org>
* Makefile.am: Merge-in s3c2400/Makefile.am.

74
c/src/lib/libcpu/arm/at91rm9200/irq/irq.h
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@@ -32,42 +32,40 @@ extern void default_int_handler();
/***********************************************************************
* Constants
**********************************************************************/
/* enum of the possible interrupt sources on the AT91RM9200 */
typedef enum {
AT91RM9200_INT_FIQ = 0,
AT91RM9200_INT_SYSIRQ,
AT91RM9200_INT_PIOA,
AT91RM9200_INT_PIOB,
AT91RM9200_INT_PIOC,
AT91RM9200_INT_PIOD,
AT91RM9200_INT_US0,
AT91RM9200_INT_US1,
AT91RM9200_INT_US2,
AT91RM9200_INT_US3,
AT91RM9200_INT_MCI,
AT91RM9200_INT_UDP,
AT91RM9200_INT_TWI,
AT91RM9200_INT_SPI,
AT91RM9200_INT_SSC0,
AT91RM9200_INT_SSC1,
AT91RM9200_INT_SSC2,
AT91RM9200_INT_TC0,
AT91RM9200_INT_TC1,
AT91RM9200_INT_TC2,
AT91RM9200_INT_TC3,
AT91RM9200_INT_TC4,
AT91RM9200_INT_TC5,
AT91RM9200_INT_UHP,
AT91RM9200_INT_EMAC,
AT91RM9200_INT_IRQ0,
AT91RM9200_INT_IRQ1,
AT91RM9200_INT_IRQ2,
AT91RM9200_INT_IRQ3,
AT91RM9200_INT_IRQ4,
AT91RM9200_INT_IRQ5,
AT91RM9200_INT_IRQ6,
AT91RM9200_MAX_INT
} rtems_irq_symbolic_name;
/* possible interrupt sources on the AT91RM9200 */
#define AT91RM9200_INT_FIQ 0
#define AT91RM9200_INT_SYSIRQ 1
#define AT91RM9200_INT_PIOA 2
#define AT91RM9200_INT_PIOB 3
#define AT91RM9200_INT_PIOC 4
#define AT91RM9200_INT_PIOD 5
#define AT91RM9200_INT_US0 6
#define AT91RM9200_INT_US1 7
#define AT91RM9200_INT_US2 8
#define AT91RM9200_INT_US3 9
#define AT91RM9200_INT_MCI 10
#define AT91RM9200_INT_UDP 11
#define AT91RM9200_INT_TWI 12
#define AT91RM9200_INT_SPI 13
#define AT91RM9200_INT_SSC0 14
#define AT91RM9200_INT_SSC1 15
#define AT91RM9200_INT_SSC2 16
#define AT91RM9200_INT_TC0 17
#define AT91RM9200_INT_TC1 18
#define AT91RM9200_INT_TC2 19
#define AT91RM9200_INT_TC3 20
#define AT91RM9200_INT_TC4 21
#define AT91RM9200_INT_TC5 22
#define AT91RM9200_INT_UHP 23
#define AT91RM9200_INT_EMAC 24
#define AT91RM9200_INT_IRQ0 25
#define AT91RM9200_INT_IRQ1 26
#define AT91RM9200_INT_IRQ2 27
#define AT91RM9200_INT_IRQ3 28
#define AT91RM9200_INT_IRQ4 28
#define AT91RM9200_INT_IRQ5 30
#define AT91RM9200_INT_IRQ6 31
#define AT91RM9200_MAX_INT 32
/* vector table used by shared/irq_init.c */
/* we can treat the AT91RM9200 AIC_SVR_BASE as */
@@ -78,7 +76,7 @@ typedef unsigned char rtems_irq_level;
typedef unsigned char rtems_irq_trigger;
struct __rtems_irq_connect_data__; /* forward declaratiuon */
typedef unsigned int rtems_irq_number;
typedef void (*rtems_irq_hdl) (void);
typedef void (*rtems_irq_enable) (const struct __rtems_irq_connect_data__*);
typedef void (*rtems_irq_disable) (const struct __rtems_irq_connect_data__*);
@@ -86,7 +84,7 @@ typedef int (*rtems_irq_is_enabled)(const struct __rtems_irq_connect_data__*);
typedef struct __rtems_irq_connect_data__ {
/* IRQ line */
rtems_irq_symbolic_name name;
rtems_irq_number name;
/* Handler */
rtems_irq_hdl hdl;

140
c/src/lib/libcpu/arm/mc9328mxl/irq/irq.h
View File

@@ -34,79 +34,77 @@ extern void default_int_handler();
* Constants
**********************************************************************/
/* enum of the possible interrupt sources on the AT91RM9200 */
typedef enum {
BSP_INT_UART3_PFERR = 0,
BSP_INT_UART3_RTS,
BSP_INT_UART3_DTR,
BSP_INT_UART3_UARTC,
BSP_INT_UART3_TX,
BSP_INT_PEN_UP,
BSP_INT_CSI,
BSP_INT_MMA_MAC,
BSP_INT_MMA,
BSP_INT_COMP,
BSP_INT_MSIRQ,
BSP_INT_GPIO_PORTA,
BSP_INT_GPIO_PORTB,
BSP_INT_GPIO_PORTC,
BSP_INT_LCDC,
BSP_INT_SIM_IRQ,
BSP_INT_SIM_DATA,
BSP_INT_RTC,
BSP_INT_RTC_SAM,
BSP_INT_UART2_PFERR,
BSP_INT_UART2_RTS,
BSP_INT_UART2_DTR,
BSP_INT_UART2_UARTC,
BSP_INT_UART2_TX,
BSP_INT_UART2_RX,
BSP_INT_UART1_PFERR,
BSP_INT_UART1_RTS,
BSP_INT_UART1_DTR,
BSP_INT_UART1_UARTC,
BSP_INT_UART1_TX,
BSP_INT_UART1_RX,
BSP_INT_RES31,
BSP_INT_RES32,
BSP_INT_PEN_DATA,
BSP_INT_PWM,
BSP_INT_MMC_IRQ,
BSP_INT_SSI2_TX,
BSP_INT_SSI2_RX,
BSP_INT_SSI2_ERR,
BSP_INT_I2C,
BSP_INT_SPI2,
BSP_INT_SPI1,
BSP_INT_SSI_TX,
BSP_INT_SSI_TX_ERR,
BSP_INT_SSI_RX,
BSP_INT_SSI_RX_ERR,
BSP_INT_TOUCH,
BSP_INT_USBD0,
BSP_INT_USBD1,
BSP_INT_USBD2,
BSP_INT_USBD3,
BSP_INT_USBD4,
BSP_INT_USBD5,
BSP_INT_USBD6,
BSP_INT_UART3_RX,
BSP_INT_BTSYS,
BSP_INT_BTTIM,
BSP_INT_BTWUI,
BSP_INT_TIMER2,
BSP_INT_TIMER1,
BSP_INT_DMA_ERR,
BSP_INT_DMA,
BSP_INT_GPIO_PORTD,
BSP_INT_WDT,
BSP_MAX_INT
} rtems_irq_symbolic_name;
/* possible interrupt sources on the AT91RM9200 */
#define BSP_INT_UART3_PFERR 0
#define BSP_INT_UART3_RTS 1
#define BSP_INT_UART3_DTR 2
#define BSP_INT_UART3_UARTC 3
#define BSP_INT_UART3_TX 4
#define BSP_INT_PEN_UP 5
#define BSP_INT_CSI 6
#define BSP_INT_MMA_MAC 7
#define BSP_INT_MMA 8
#define BSP_INT_COMP 9
#define BSP_INT_MSIRQ 10
#define BSP_INT_GPIO_PORTA 11
#define BSP_INT_GPIO_PORTB 12
#define BSP_INT_GPIO_PORTC 13
#define BSP_INT_LCDC 14
#define BSP_INT_SIM_IRQ 15
#define BSP_INT_SIM_DATA 16
#define BSP_INT_RTC 17
#define BSP_INT_RTC_SAM 18
#define BSP_INT_UART2_PFERR 19
#define BSP_INT_UART2_RTS 20
#define BSP_INT_UART2_DTR 21
#define BSP_INT_UART2_UARTC 22
#define BSP_INT_UART2_TX 23
#define BSP_INT_UART2_RX 24
#define BSP_INT_UART1_PFERR 25
#define BSP_INT_UART1_RTS 26
#define BSP_INT_UART1_DTR 27
#define BSP_INT_UART1_UARTC 28
#define BSP_INT_UART1_TX 29
#define BSP_INT_UART1_RX 30
#define BSP_INT_RES31 31
#define BSP_INT_RES32 32
#define BSP_INT_PEN_DATA 33
#define BSP_INT_PWM 34
#define BSP_INT_MMC_IRQ 35
#define BSP_INT_SSI2_TX 36
#define BSP_INT_SSI2_RX 37
#define BSP_INT_SSI2_ERR 38
#define BSP_INT_I2C 39
#define BSP_INT_SPI2 40
#define BSP_INT_SPI1 41
#define BSP_INT_SSI_TX 42
#define BSP_INT_SSI_TX_ERR 43
#define BSP_INT_SSI_RX 44
#define BSP_INT_SSI_RX_ERR 45
#define BSP_INT_TOUCH 46
#define BSP_INT_USBD0 47
#define BSP_INT_USBD1 48
#define BSP_INT_USBD2 49
#define BSP_INT_USBD3 50
#define BSP_INT_USBD4 51
#define BSP_INT_USBD5 52
#define BSP_INT_USBD6 53
#define BSP_INT_UART3_RX 54
#define BSP_INT_BTSYS 55
#define BSP_INT_BTTIM 56
#define BSP_INT_BTWUI 57
#define BSP_INT_TIMER2 58
#define BSP_INT_TIMER1 59
#define BSP_INT_DMA_ERR 60
#define BSP_INT_DMA 61
#define BSP_INT_GPIO_PORTD 62
#define BSP_INT_WDT 63
#define BSP_MAX_INT 64
typedef unsigned char rtems_irq_level;
typedef unsigned char rtems_irq_trigger;
typedef unsigned int rtems_irq_number;
struct __rtems_irq_connect_data__; /* forward declaratiuon */
typedef void (*rtems_irq_hdl) (void);
@@ -119,7 +117,7 @@ extern rtems_irq_hdl bsp_vector_table[BSP_MAX_INT];
typedef struct __rtems_irq_connect_data__ {
/* IRQ line */
rtems_irq_symbolic_name name;
rtems_irq_number name;
/* Handler */
rtems_irq_hdl hdl;

75
c/src/lib/libcpu/arm/s3c2400/irq/irq.h
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@@ -32,43 +32,40 @@ extern void default_int_handler();
| Constants
+--------------------------------------------------------------------------*/
/* enum of the possible interrupt sources */
typedef enum {
BSP_EINT0 = 0,
BSP_EINT1,
BSP_EINT2,
BSP_EINT3,
BSP_EINT4,
BSP_EINT5,
BSP_EINT6,
BSP_EINT7,
BSP_INT_TICK,
BSP_INT_WDT,
BSP_INT_TIMER0,
BSP_INT_TIMER1,
BSP_INT_TIMER2,
BSP_INT_TIMER3,
BSP_INT_TIMER4,
BSP_INT_UERR01,
_res0,
BSP_INT_DMA0,
BSP_INT_DMA1,
BSP_INT_DMA2,
BSP_INT_DMA3,
BSP_INT_MMC,
BSP_INT_SPI,
BSP_INT_URXD0,
BSP_INT_URXD1,
BSP_INT_USBD,
BSP_INT_USBH,
BSP_INT_IIC,
BSP_INT_UTXD0,
BSP_INT_UTXD1,
BSP_INT_RTC,
BSP_INT_ADC,
BSP_MAX_INT
} rtems_irq_symbolic_name;
/* possible interrupt sources */
#define BSP_EINT0 0
#define BSP_EINT1 1
#define BSP_EINT2 2
#define BSP_EINT3 3
#define BSP_EINT4 4
#define BSP_EINT5 5
#define BSP_EINT6 6
#define BSP_EINT7 7
#define BSP_INT_TICK 8
#define BSP_INT_WDT 9
#define BSP_INT_TIMER0 10
#define BSP_INT_TIMER1 11
#define BSP_INT_TIMER2 12
#define BSP_INT_TIMER3 13
#define BSP_INT_TIMER4 14
#define BSP_INT_UERR01 15
#define _res0 16
#define BSP_INT_DMA0 17
#define BSP_INT_DMA1 18
#define BSP_INT_DMA2 19
#define BSP_INT_DMA3 20
#define BSP_INT_MMC 21
#define BSP_INT_SPI 22
#define BSP_INT_URXD0 23
#define BSP_INT_URXD1 24
#define BSP_INT_USBD 25
#define BSP_INT_USBH 26
#define BSP_INT_IIC 27
#define BSP_INT_UTXD0 28
#define BSP_INT_UTXD1 29
#define BSP_INT_RTC 30
#define BSP_INT_ADC 31
#define BSP_MAX_INT 32
extern void *bsp_vector_table;
#define VECTOR_TABLE &bsp_vector_table
@@ -80,7 +77,7 @@ typedef unsigned char rtems_irq_level;
typedef unsigned char rtems_irq_trigger;
struct __rtems_irq_connect_data__; /* forward declaratiuon */
typedef unsigned int rtems_irq_number;
typedef void (*rtems_irq_hdl) (void);
typedef void (*rtems_irq_enable) (const struct __rtems_irq_connect_data__*);
typedef void (*rtems_irq_disable) (const struct __rtems_irq_connect_data__*);
@@ -90,7 +87,7 @@ typedef struct __rtems_irq_connect_data__ {
/*
* IRQ line
*/
rtems_irq_symbolic_name name;
rtems_irq_number name;
/*
* handler. See comment on handler properties below in function prototype.