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(CPU_swap_u32, CPU_swap_u16): Remove.
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@@ -898,45 +898,7 @@ void _CPU_Fatal_error(
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uint32_t _error
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);
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/* The following routine swaps the endian format of an unsigned int.
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* It must be static because it is referenced indirectly.
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*
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* This version will work on any processor, but if there is a better
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* way for your CPU PLEASE use it. The most common way to do this is to:
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*
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* swap least significant two bytes with 16-bit rotate
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* swap upper and lower 16-bits
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* swap most significant two bytes with 16-bit rotate
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*
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* Some CPUs have special instructions which swap a 32-bit quantity in
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* a single instruction (e.g. i486). It is probably best to avoid
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* an "endian swapping control bit" in the CPU. One good reason is
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* that interrupts would probably have to be disabled to insure that
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* an interrupt does not try to access the same "chunk" with the wrong
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* endian. Another good reason is that on some CPUs, the endian bit
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* endianness for ALL fetches -- both code and data -- so the code
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* will be fetched incorrectly.
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*/
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static inline uint32_t CPU_swap_u32(
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uint32_t value
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)
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{
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uint32_t swapped;
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asm volatile("rlwimi %0,%1,8,24,31;"
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"rlwimi %0,%1,24,16,23;"
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"rlwimi %0,%1,8,8,15;"
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"rlwimi %0,%1,24,0,7;" :
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"=&r" ((swapped)) : "r" ((value)));
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return( swapped );
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}
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#define CPU_swap_u16( value ) \
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(((value&0xff) << 8) | ((value >> 8)&0xff))
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#endif /* ndef ASM */
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#endif /* ASM */
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#ifdef __cplusplus
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}
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@@ -1104,44 +1104,6 @@ void _CPU_Fatal_error(
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uint32_t _error
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);
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/* The following routine swaps the endian format of an unsigned int.
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* It must be static because it is referenced indirectly.
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*
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* This version will work on any processor, but if there is a better
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* way for your CPU PLEASE use it. The most common way to do this is to:
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*
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* swap least significant two bytes with 16-bit rotate
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* swap upper and lower 16-bits
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* swap most significant two bytes with 16-bit rotate
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*
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* Some CPUs have special instructions which swap a 32-bit quantity in
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* a single instruction (e.g. i486). It is probably best to avoid
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* an "endian swapping control bit" in the CPU. One good reason is
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* that interrupts would probably have to be disabled to insure that
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* an interrupt does not try to access the same "chunk" with the wrong
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* endian. Another good reason is that on some CPUs, the endian bit
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* endianness for ALL fetches -- both code and data -- so the code
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* will be fetched incorrectly.
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*/
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static inline uint32_t CPU_swap_u32(
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uint32_t value
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)
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{
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uint32_t swapped;
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asm volatile("rlwimi %0,%1,8,24,31;"
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"rlwimi %0,%1,24,16,23;"
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"rlwimi %0,%1,8,8,15;"
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"rlwimi %0,%1,24,0,7;" :
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"=&r" ((swapped)) : "r" ((value)));
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return( swapped );
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}
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#define CPU_swap_u16( value ) \
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(((value&0xff) << 8) | ((value >> 8)&0xff))
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/*
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* Routines to access the decrementer register
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*/
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