mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2025-12-28 07:20:16 +00:00
Joel Sherrill
committed by
Kinsey Moore
Kinsey Moore
parent
d2d9bd4aee
commit
17ae630e9a
@@ -1,414 +0,0 @@
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MVME162
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=======
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EISCAT Scientific Association. M.Savitski
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This material is a part of the MVME162 Board Support Package
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for the RTEMS executive. Its licensing policies are those of the
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RTEMS distribution.
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Updated by Joel Sherrill (jsherril@redstone.army.mil) after
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inclusion in the standard release.
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Models
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------
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There are three different models of the MVME162 board. There are many
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variations within each model.
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```
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Model Variants
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--------- --------------------------------------------------
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MVME162 MVME162-0xx
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MVME162FX MVME162-4xx, MVME162-5xx
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MVME162LX MVME162-2xx, MVME162-3xx, MVME162-7xx, MVME162-8xx
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```
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All models use either an MC68040 or MC68LC040 (no FPU) processors. The
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processor used varies by variant as does the speed, the amount and type
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of memory and the I/O devices (serial, ethernet, SCSI and VME). See the
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README.models file for details.
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Configuring the BSP
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-------------------
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The BSP needs to be configured for your specific board. The following
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files need to be modified.
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include/bsp.h
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Change the MOT_162BUG_VEC_ADDRESS define to start of memory for your
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board
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make/custom/mvme162.cfg
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If your board has an MC68040 processor
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- change the value of RTEMS_CPU_MODEL
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- remove the -msoft-float flag from CPU_CFLAGS
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MVME162FX and DMA on the IP bus
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-------------------------------
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From Eric Vaitl <eric@viasat.com>:
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If you have any customers that will be using the 162FX, tell them to
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be careful. The main difference between the 162 and the 162FX is DMA
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on the IP bus. I spent over a month trying to write a DMA HDLC driver
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for GreenSprings IP-MP and couldn't get it to work. I talked to some
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people at GreenSprings, and they agreed that there really is no way to
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get DMA to work unless you know the size of the packets in advance.
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Once the IP2 chip DMA controller is given the character count and
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enabled, it doesn't accept further commands until all of the
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characters have arrived. The only way to terminate a DMA transfer
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prematurely is by raising DMAEND* during the last read. None of the IP
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modules that I know of are currently able to do that. GreenSprings is
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working on the problem, but nothing is going to available for a few
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months.
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Installation
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------------
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Nothing unique to the MVME162. It has been incorporated into the
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standard release.
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Port Description
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----------------
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This section describes the initial port effort. There have been
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additions and modifications to the bsp since this was done.
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Interestingly, this was the first bsp submitted to the RTEMS project
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and the submission offer came out of the blue with no prior
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communication with the author. :)
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The port was done using already existing ports to the M68020 boards,
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DMV152 and MVME136.
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The initial host development system was SUN/Solaris 2.3, and
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the cross-development environment consisted of Free Software
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Foundation (FSF)'s GNU C compiler (version 2.6), GNU Assembler
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(version 2.3) and GNU binary utilities binutils version 2.5.2,
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built with m68k as a target. The recent/latest versions of other
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GNU programs (flex, make, etc) were also used at the build stage.
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In all subdirectories of the RTEMS distribution tree, the directories
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mvme136 were duplicated as mvme162.
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Essential modifications are detailed below:
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- the MVME162-specific hardware registers were described in bsp.h
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- timer and clock routines were made to use the MVME162's Tick Timers 1
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and 2, respectively
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- shared memory support was replaced by stubs for the time being
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- console IO was lifted entirely from the DMV152 support code, thanks
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to the fact that Z8530 SCC used in DMV152 is upwards compatible with
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the Z85230 SCC of the MVME162. (Only the memory mapping of the SCC
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registers had to be changed.)
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- symbols in several *.s files were prepended with underscores to
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comply with the xgcc configuration used (it prepends underscores to all
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symbols defined in c code)
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- linkcmds file was modified to place the linked code into the memory
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configured for the board in use
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- bspstart.c was modified as follows:
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monitors_vector_table = (rtems_isr *)0xFFE00000;
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was made to point to the power-up location of MVME162 interrupt vector
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table.
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- The shutdown is a temporary solution. To exit cleanly, it has to disable
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all enabled interrupts and restore the board to its power-up status.
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Presently this is not done satisfactorily, as a result, the board needs
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a hardware reset from the external VMEbus master or from the front
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panel to ensure correct operation for subsequent downloads.
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Host System
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-----------
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The VMEbus master used to externally control and download the MVME162
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is a FORCE CPU-2CE board running Solaris 2.3. A simple program to load
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s-records and start/reset the MVME162 was written. The code is in the
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file tools/sload.c
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This code depends on the external VMEbus master's vme driver and is
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provided as an example, without the Makefile. The bulk of the program
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which parses the s-records is courtesy of Kym Newbery,
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(8918927y@lux.levels.unisa.edu.au).
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In general, apart from x-gcc, the tools most often used while building
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RTEMS for MVME162 were: find, grep, diff, and, of course
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MVME162 Embedded Controller Programmer's Reference Guide,
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Motorola, MVME162PG/D1.
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Thanks
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------
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- to On-Line Applications Research Corporation (OAR) for developing
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RTEMS and making it available on a Technology Transfer basis;
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- to Joel Sherril, the leader of the RTEMS development group for
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stimulating and helpful discussions;
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- to Kym Newbery (8918927y@lux.levels.unisa.edu.au) for his s-record
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parser;
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- to Gerd Truschinski (gt@first.gmd.de) for creating and running the
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crossgcc mailing list
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- to FSF and Cygnus Support for great free software;
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What's new
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----------
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- 28.07.95 BSP adjusted to rtems-3.2.0.
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- Now console driver uses interrupts on receive (ring buffer
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code lifted with thanks from the IDP BSP next door (../idp))
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- both front-panel serial interfaces are supported
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- serious bug in timer interrupts fixed
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- interrupt test tm27 now supported
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```
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+----------------------------------+-------------------------------+
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| Dr. Mikhail (Misha) Savitski | Voice : +46-980-79162 |
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| Software Systems Engineer | Fax : +46-980-79161 |
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| EISCAT Svalbard Radar Project | E-mail: mms@eiscathq.irf.se |
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| EISCAT Scientific Association |----------- /\_/\ -----------|
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| Box 812 S-98128 Kiruna, Sweden | EIS { o o } CAT |
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+----------------------------------+-------oQQQ--(>I<)--QQQo-------+
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```
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MVME162 Models
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==============
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There are three different models of the MVME162 board with many variations
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within each model.
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```
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Model Variants
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--------- --------------------------------------------------
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MVME162 MVME162-0xx
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MVME162FX MVME162-4xx, MVME162-5xx
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MVME162LX MVME162-2xx, MVME162-3xx, MVME162-7xx, MVME162-8xx
|
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```
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All models use either an MC68040 or MC68LC040 (no FPU) processors. The
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processor used varies by variant as does the speed, the amount and type
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of memory and the I/O devices (serial, ethernet, SCSI and VME). See the
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following tables for details.
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MVME162 Variants
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----------------
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Source
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------
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o MVME162 Embedded Controller User's Manual (MVME162/D2)
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Common Configuration
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--------------------
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o One EPROM socket
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o 8Kx8 NVRAM/TOD clock
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o Two serial ports
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o 1MB Flash memory
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o Four MVIP Industry Pack interfaces
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o One or two DRAM/SRAM mezzanine memory boards
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```
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Model Processor Speed DRAM SRAM Other
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----- --------- ----- ---- ----- ------------------
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001 MC68LC040 25MHz 1MB 512KB
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002 MC68040 25MHz 1MB 512KB
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003 MC68LC040 25MHz 1MB 512KB No VMEbus
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010 MC68LC040 25MHz 4MB 512KB
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011 MC68LC040 25MHz 4MB 512KB SCSI
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012 MC68LC040 25MHz 4MB 512KB Ethernet
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013 MC68LC040 25MHz 4MB 512KB Ethernet, SCSI
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014 MC68LC040 25MHz 4MB - Ethernet, No VMEbus
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020 MC68040 25MHz 4MB 512KB
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021 MC68040 25MHz 4MB 512KB SCSI
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022 MC68040 25MHz 4MB 512KB Ethernet
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023 MC68040 25MHz 4MB 512KB Ethernet, SCSI
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026 MC68040 25MHz 4MB - Ethernet, No VMEbus
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030 MC68LC040 25MHz 8MB 512KB
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031 MC68LC040 25MHz 8MB 512KB SCSI
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032 MC68LC040 25MHz 8MB 512KB Ethernet
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033 MC68LC040 25MHz 8MB 512KB Ethernet, SCSI
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040 MC68040 25MHz 8MB 512KB
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041 MC68040 25MHz 8MB 512KB SCSI
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042 MC68040 25MHz 8MB 512KB Ethernet
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043 MC68040 25MHz 8MB 512KB Ethernet, SCSI
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Serial Interface Modules
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------------------------
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SIM05 01-W3846B EIA-232-D DTE
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SIM06 01-W3865B EIA-232-D DCE
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SIM07 01-W3868B EIA-530 DTE
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SIM08 01-W3867B EIA-530 DCE
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DRAM/SRAM Expansion Memory Boards
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---------------------------------
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?
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```
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MVME162FX Variants
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------------------
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Source
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------
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o MVME162FX Data Sheet
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o MVME162FX Embedded Controller Installation and Use (V162FXA/IH3)
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o MVME162FX Embedded Controller Programmer's Reference Guide (V162FXA/PG1)
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o MVME162FX 400/500-Series VME Embedded Controller Installation and Use
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(V162FXA/IH4) Edition of March 2000\Uffffffff
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o V162FXA/LT2, November 1995
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Common Configuration
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--------------------
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o One EPROM socket
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o 8Kx8 NVRAM/TOD clock
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o Two serial ports
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o 1MB Flash memory with 162Bug installed
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o 512KB SRAM with battery backup
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o Four IndustryPack interfaces
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o One or two DRAM/SRAM mezzanine memory boards
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Uses MC2 Chip, IP2 Chip, 4MB or 12MB mezzanine DRAM board
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```
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Model Processor Speed DRAM Other
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----- --------- ----- ---- ------------------
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403
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410 MC68LC040 25Mhz 4MB
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411 MC68LC040 25Mhz 4MB SCSI
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412 MC68LC040 25Mhz 4MB Ethernet
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413 MC68LC040 25Mhz 4MB Ethernet, SCSI
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420 ?
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421 ?
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422 ?
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423 ?
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430 MC68LC040 25Mhz 8MB
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431 MC68LC040 25Mhz 8MB SCSI
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432 MC68LC040 25Mhz 8MB Ethernet
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433 MC68LC040 25Mhz 8MB Ethernet, SCSI
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440 ?
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441 ?
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442 ?
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443 ?
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450 ?
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451 ?
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||||
452 ?
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453 MC68LC040 25Mhz 16MB Ethernet, SCSI
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460 ?
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461 ?
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462 ?
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463 ?
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510 MC68040 32MHz 4MB
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511 MC68040 32MHz 4MB SCSI
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512 MC68040 32MHz 4MB Ethernet
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513 MC68040 32MHz 4MB Ethernet, SCSI
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520 MC68040 32MHz 8MB
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521 MC68040 32MHz 8MB SCSI
|
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522 MC68040 32MHz 8MB Ethernet
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523 MC68040 32MHz 8MB Ethernet, SCSI
|
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530 MC68040 32MHz 16MB
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531 MC68040 32MHz 16MB SCSI
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532 MC68040 32MHz 16MB Ethernet
|
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533 MC68040 32MHz 16MB Ethernet, SCSI
|
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|
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|
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Serial Interface Modules
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------------------------
|
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SIM05 01-W3846B EIA-232-D DTE
|
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SIM06 01-W3865B EIA-232-D DCE
|
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SIM07 01-W3868B EIA-530 DTE
|
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SIM08 01-W3867B EIA-530 DCE
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SIM09 01-W3002F EIA-485/422 DTE/DCE
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DRAM/SRAM Expansion Memory Boards
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---------------------------------
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MVME162-502 4MB DRAM
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MVME162-503 12MB DRAM
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? 2MB SRAM
|
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```
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|
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|
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MVME162LX Variants
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------------------
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Source
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------
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o Supplement to MVME162LX Embedded Controller Installation Guide
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(MVME162LXIG/D1A1) February 1995
|
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o MVME162LX Embedded Controller Data Sheet
|
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o MVME162LX 200/300 Series Embedded Controller Programmer's Reference
|
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Guide (V162LX2-3A/PG2)
|
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o MVME162LX 200/300 Series Embedded Controller Installation and Use
|
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(V162LX2-3A/IH3)
|
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o MVME162LX 700/800 Series Embedded Controller Installation and Use
|
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(V162-7A/IH1)
|
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o MVME162LX 700/800 Series Embedded Controller Installation and Use
|
||||
(V162-7A/IH2)
|
||||
|
||||
|
||||
Common Configuration
|
||||
--------------------
|
||||
o One EPROM socket
|
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o 8Kx8 NVRAM/TOD clock
|
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o 4 serial ports EIA-232-D DTE (unless otherwise noted)
|
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o 1MB Flash
|
||||
o 2 IP sites (unless otherwise noted)
|
||||
|
||||
|
||||
```
|
||||
Model Processor Speed DRAM Other
|
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----- --------- ----- -------- ------------------
|
||||
200 MC68LC040 25MHz 1MB No serial(?)
|
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201 MC68LC040 25MHz 1MB
|
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202 MC68LC040 25MHz 1MB
|
||||
210 MC68LC040 25MHz 4MB
|
||||
211 MC68LC040 25MHz 4MB SCSI
|
||||
212 MC68LC040 25MHz 4MB Ethernet
|
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213 MC68LC040 25MHz 4MB Ethernet, SCSI
|
||||
216 MC68LC040 25MHz 4MB Ethernet, No VMEbus, No serial(?)
|
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220 MC68040 25MHz 4MB
|
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222 MC68040 25MHz 4MB Ethernet
|
||||
223 MC68040 25MHz 4MB Ethernet, SCSI
|
||||
233 MC68LC040 25MHz 4MB ECC
|
||||
233 MC68LC040 25MHz 4MB ECC Ethernet, SCSI
|
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243 MC68040 25MHz 4MB ECC Ethernet, SCSI
|
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253 MC68LC040 25MHz 16MB ECC Ethernet, SCSI
|
||||
253 MC68LC040 25MHz 16MB ECC Ethernet, SCSI
|
||||
262 MC68040 25MHz 16MB ECC Ethernet
|
||||
263 MC68040 25MHz 16MB ECC Ethernet, SCSI
|
||||
322 MC68LC040 25MHz 8MB ECC Ethernet
|
||||
323 MC68LC040 25MHz 8MB ECC Ethernet, SCSI
|
||||
333 MC68040 25MHz 8MB ECC Ethernet, SCSI, No IP sites(?)
|
||||
353 MC68040 25MHz 32MB ECC Ethernet, SCSI, 4 IP sites
|
||||
723 MC68040 32MHz 4MB Ethernet, SCSI
|
||||
743 MC68040 32MHz 4MB ECC Ethernet, SCSI
|
||||
763 MC68040 32MHz 16MB ECC Ethernet, SCSI
|
||||
813 MC68040 32MHz 8MB Ethernet, SCSI
|
||||
833 MC68040 32MHz 8MB ECC Ethernet, SCSI
|
||||
853 MC68040 32MHz 32MB ECC Ethernet, SCSI
|
||||
863 MC68040 32MHz 16MB ECC Ethernet, SCSI
|
||||
```
|
||||
|
||||
|
||||
DRAM Expansion Memory Boards
|
||||
----------------------------
|
||||
MVME162-202 4MB (non-stacking)
|
||||
MVME162-203 16MB ECC (non-stacking)
|
||||
MVME162-204 16MB ECC (stacking)
|
||||
MVME162-207 4MB ECC (non-stakcing)
|
||||
MVME162-208 4MB ECC (stacking)
|
||||
MVME162-209 8MB ECC (non-stacking)
|
||||
MVME162-210 8MB ECC (stacking)
|
||||
MVME162-211 32MB ECC (non-stacking)
|
||||
MVME162-212 32MB ECC (stacking)
|
||||
|
||||
|
||||
@@ -1,73 +0,0 @@
|
||||
/*
|
||||
* This routine initializes the Tick Timer 1 on the MVME162 board.
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*
|
||||
* Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
|
||||
* EISCAT Scientific Association. M.Savitski
|
||||
*
|
||||
* This material is a part of the MVME162 Board Support Package
|
||||
* for the RTEMS executive. Its licensing policies are those of the
|
||||
* RTEMS above.
|
||||
*/
|
||||
|
||||
#include <rtems.h>
|
||||
#include <rtems/btimer.h>
|
||||
#include <bsp.h>
|
||||
|
||||
/* Periodic tick interval */
|
||||
#define TICK_INTERVAL 0x10000U
|
||||
#define TIMER_INT_LEVEL 6
|
||||
|
||||
uint32_t Ttimer_val;
|
||||
bool benchmark_timer_find_average_overhead;
|
||||
|
||||
rtems_isr timerisr(rtems_vector_number vector);
|
||||
|
||||
void benchmark_timer_initialize(void)
|
||||
{
|
||||
(void) set_vector( timerisr, VBR0 * 0x10 + 0x8, 0 );
|
||||
|
||||
Ttimer_val = 0; /* clear timer ISR count */
|
||||
lcsr->vector_base |= MASK_INT; /* unmask VMEchip2 interrupts */
|
||||
lcsr->intr_clear |= 0x01000000; /* clear pending interrupt */
|
||||
lcsr->to_ctl = 0xE7; /* prescaler to 1 MHz (see Appendix A1) */
|
||||
lcsr->timer_cmp_1 = TICK_INTERVAL;
|
||||
lcsr->timer_cnt_1 = 0; /* clear counter */
|
||||
lcsr->board_ctl |= 7; /* increment, reset-on-compare, */
|
||||
/* and clear-overflow-cnt */
|
||||
|
||||
lcsr->intr_level[0] |= TIMER_INT_LEVEL; /* set int level */
|
||||
lcsr->intr_ena |= 0x01000000; /* enable tick timer 1 interrupt */
|
||||
}
|
||||
|
||||
#define AVG_OVERHEAD 3U /* It typically takes 3.0 microseconds */
|
||||
/* (3 countdowns) to start/stop the timer. */
|
||||
#define LEAST_VALID 10U /* Don't trust a value lower than this */
|
||||
|
||||
benchmark_timer_t benchmark_timer_read(void)
|
||||
{
|
||||
uint32_t total;
|
||||
|
||||
total = (Ttimer_val * TICK_INTERVAL) + lcsr->timer_cnt_1;
|
||||
|
||||
if ( benchmark_timer_find_average_overhead == true )
|
||||
return total; /* in one-half microsecond units */
|
||||
|
||||
if ( total < LEAST_VALID )
|
||||
return 0; /* below timer resolution */
|
||||
|
||||
return (total-AVG_OVERHEAD) >> 1;
|
||||
}
|
||||
|
||||
void benchmark_timer_disable_subtracting_average_overhead(
|
||||
bool find_flag
|
||||
)
|
||||
{
|
||||
benchmark_timer_find_average_overhead = find_flag;
|
||||
}
|
||||
@@ -1,44 +0,0 @@
|
||||
/* timer_isr()
|
||||
*
|
||||
* This routine provides the ISR for the Z8036 timer on the MVME136
|
||||
* board. The timer is set up to generate an interrupt at maximum
|
||||
* intervals.
|
||||
*
|
||||
* Input parameters: NONE
|
||||
*
|
||||
* Output parameters: NONE
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*
|
||||
* Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
|
||||
* EISCAT Scientific Association. M.Savitski
|
||||
*
|
||||
* This material is a part of the MVME162 Board Support Package
|
||||
* for the RTEMS executive. Its licensing policies are those of the
|
||||
* RTEMS above.
|
||||
*/
|
||||
|
||||
#include <rtems/asm.h>
|
||||
|
||||
BEGIN_CODE
|
||||
|
||||
.set INTR_CLEAR_REG, 0xfff40074 | interrupt clear register
|
||||
.set RELOAD, 0x01000000 | clear tick 1 interrupt
|
||||
|
||||
PUBLIC (Ttimer_val)
|
||||
PUBLIC (timerisr)
|
||||
SYM (timerisr):
|
||||
move.l a0, -(a7) | save a0
|
||||
movea.l #INTR_CLEAR_REG, a0 | a0 = addr of cmd status reg
|
||||
ori.l #RELOAD, (a0) | reload countdown
|
||||
addq.l #1, SYM (Ttimer_val) | increment timer value
|
||||
move.l (a7)+, a0 | restore a0
|
||||
rte
|
||||
|
||||
END_CODE
|
||||
END
|
||||
@@ -1,83 +0,0 @@
|
||||
/*
|
||||
* This routine initializes the Tick Timer 2 on the MVME162 board.
|
||||
* The tick frequency is 1 millisecond.
|
||||
*/
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*
|
||||
* Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
|
||||
* EISCAT Scientific Association. M.Savitski
|
||||
*
|
||||
* This material is a part of the MVME162 Board Support Package
|
||||
* for the RTEMS executive. Its licensing policies are those of the
|
||||
* RTEMS above.
|
||||
*/
|
||||
|
||||
#include <stdlib.h>
|
||||
|
||||
#include <bsp.h>
|
||||
#include <rtems/clockdrv.h>
|
||||
|
||||
#define MS_COUNT 1000 /* T2's countdown constant (1 ms) */
|
||||
#define CLOCK_INT_LEVEL 6 /* T2's interrupt level */
|
||||
|
||||
uint32_t Clock_isrs; /* ISRs until next tick */
|
||||
volatile uint32_t Clock_driver_ticks; /* ticks since initialization */
|
||||
rtems_isr_entry Old_ticker;
|
||||
|
||||
static void Clock_exit( void );
|
||||
|
||||
#define CLOCK_VECTOR (VBR0 * 0x10 + 0x9)
|
||||
|
||||
/*
|
||||
* ISR Handler
|
||||
*/
|
||||
static rtems_isr Clock_isr(rtems_vector_number vector)
|
||||
{
|
||||
Clock_driver_ticks += 1;
|
||||
lcsr->timer_cnt_2 = 0; /* clear counter */
|
||||
lcsr->intr_clear |= 0x02000000;
|
||||
|
||||
if ( Clock_isrs == 1 ) {
|
||||
rtems_clock_tick();
|
||||
Clock_isrs = rtems_configuration_get_microseconds_per_tick() / 1000;
|
||||
}
|
||||
else
|
||||
Clock_isrs -= 1;
|
||||
}
|
||||
|
||||
static void Install_clock(rtems_isr_entry clock_isr )
|
||||
{
|
||||
|
||||
Clock_driver_ticks = 0;
|
||||
Clock_isrs = rtems_configuration_get_microseconds_per_tick() / 1000;
|
||||
|
||||
Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
|
||||
lcsr->vector_base |= MASK_INT; /* unmask VMEchip2 interrupts */
|
||||
lcsr->to_ctl = 0xE7; /* prescaler to 1 MHz (see Appendix A1) */
|
||||
lcsr->timer_cmp_2 = MS_COUNT;
|
||||
lcsr->timer_cnt_2 = 0; /* clear counter */
|
||||
lcsr->board_ctl |= 0x700; /* increment, reset-on-compare, and */
|
||||
/* clear-overflow-cnt */
|
||||
|
||||
lcsr->intr_level[0] |= CLOCK_INT_LEVEL * 0x10; /* set int level */
|
||||
lcsr->intr_ena |= 0x02000000; /* enable tick timer 2 interrupt */
|
||||
|
||||
atexit( Clock_exit );
|
||||
}
|
||||
|
||||
void Clock_exit( void )
|
||||
{
|
||||
/* Dummy for now. See other m68k BSP's for code examples */
|
||||
}
|
||||
|
||||
void _Clock_Initialize( void )
|
||||
{
|
||||
Install_clock( Clock_isr );
|
||||
}
|
||||
@@ -1,7 +0,0 @@
|
||||
#
|
||||
# mvme162 RTEMS Test Database
|
||||
#
|
||||
# Format is one line per test that is _NOT_ built.
|
||||
#
|
||||
|
||||
exclude: fsdosfsname01
|
||||
@@ -1,29 +0,0 @@
|
||||
#
|
||||
# Config file for the mvme162 BSP
|
||||
#
|
||||
|
||||
include $(RTEMS_ROOT)/make/custom/default.cfg
|
||||
|
||||
RTEMS_CPU=m68k
|
||||
|
||||
RTEMS_MVME162_MODEL=mvme162
|
||||
|
||||
# This contains the compiler options necessary to select the CPU model
|
||||
# and (hopefully) optimize for it.
|
||||
#
|
||||
|
||||
CPU_CFLAGS = -mcpu=68040 -msoft-float
|
||||
|
||||
# optimize flag: typically -O2
|
||||
CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer
|
||||
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
|
||||
|
||||
LDFLAGS = -Wl,--gc-sections
|
||||
|
||||
define bsp-post-link
|
||||
$(default-bsp-post-link)
|
||||
$(OBJCOPY) -O binary $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT)
|
||||
endef
|
||||
|
||||
# BSP-specific tools
|
||||
SLOAD=$(PROJECT_TOOLS)/sload
|
||||
@@ -1,7 +0,0 @@
|
||||
#
|
||||
# mvme162lx RTEMS Test Database
|
||||
#
|
||||
# Format is one line per test that is _NOT_ built.
|
||||
#
|
||||
|
||||
exclude: fsdosfsname01
|
||||
@@ -1,34 +0,0 @@
|
||||
#
|
||||
# Configuration file for a MVME162LX
|
||||
#
|
||||
# This is an MVME162 model with ...
|
||||
|
||||
#
|
||||
# All mvme162 configurations share the same base file, only the cpu model
|
||||
# differs.
|
||||
#
|
||||
|
||||
RTEMS_MVME162_MODEL=mvme162lx
|
||||
|
||||
include $(RTEMS_ROOT)/make/custom/default.cfg
|
||||
|
||||
RTEMS_CPU=m68k
|
||||
|
||||
# This contains the compiler options necessary to select the CPU model
|
||||
# and (hopefully) optimize for it.
|
||||
#
|
||||
CPU_CFLAGS = -mcpu=68040 -msoft-float
|
||||
|
||||
# optimize flag: typically -O2
|
||||
CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer
|
||||
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
|
||||
|
||||
LDFLAGS = -Wl,--gc-sections
|
||||
|
||||
define bsp-post-link
|
||||
$(default-bsp-post-link)
|
||||
$(OBJCOPY) -O binary $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT)
|
||||
endef
|
||||
|
||||
# BSP-specific tools
|
||||
SLOAD=$(PROJECT_TOOLS)/sload
|
||||
@@ -1,277 +0,0 @@
|
||||
/*
|
||||
* This file contains the MVME162 console IO package.
|
||||
*/
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 1989-2013.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*
|
||||
* Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
|
||||
* EISCAT Scientific Association. M.Savitski
|
||||
*
|
||||
* This material is a part of the MVME162 Board Support Package
|
||||
* for the RTEMS executive. Its licensing policies are those of the
|
||||
* RTEMS above.
|
||||
*/
|
||||
|
||||
#define M162_INIT
|
||||
|
||||
#include <rtems/bspIo.h>
|
||||
#include <rtems/console.h>
|
||||
#include <rtems/libio.h>
|
||||
#include <rtems/ringbuf.h>
|
||||
#include <bsp.h>
|
||||
|
||||
Ring_buffer_t Console_Buffer[2];
|
||||
|
||||
/*
|
||||
* Interrupt handler for receiver interrupts
|
||||
*/
|
||||
static rtems_isr C_Receive_ISR(rtems_vector_number vector)
|
||||
{
|
||||
register int ipend, port;
|
||||
|
||||
ZWRITE0(1, 0x38); /* reset highest IUS */
|
||||
|
||||
ipend = ZREAD(1, 3); /* read int pending from A side */
|
||||
|
||||
if (ipend == 0x04) port = 0; /* channel B intr pending */
|
||||
else if (ipend == 0x20) port = 1; /* channel A intr pending */
|
||||
else return;
|
||||
|
||||
Ring_buffer_Add_character(&Console_Buffer[port], ZREADD(port));
|
||||
|
||||
if (ZREAD(port, 1) & 0x70) { /* check error stat */
|
||||
ZWRITE0(port, 0x30); /* reset error */
|
||||
}
|
||||
}
|
||||
|
||||
rtems_device_driver console_initialize(
|
||||
rtems_device_major_number major,
|
||||
rtems_device_minor_number minor,
|
||||
void *arg
|
||||
)
|
||||
{
|
||||
int i;
|
||||
rtems_status_code status;
|
||||
|
||||
/*
|
||||
* Initialise receiver interrupts on both ports
|
||||
*/
|
||||
for (i = 0; i <= 1; i++) {
|
||||
Ring_buffer_Initialize( &Console_Buffer[i] );
|
||||
ZWRITE(i, 2, SCC_VECTOR);
|
||||
ZWRITE(i, 10, 0);
|
||||
ZWRITE(i, 1, 0x10); /* int on all Rx chars or special condition */
|
||||
ZWRITE(i, 9, 8); /* master interrupt enable */
|
||||
}
|
||||
|
||||
set_vector(C_Receive_ISR, SCC_VECTOR, 1); /* install ISR for ports A and B */
|
||||
|
||||
mcchip->vector_base = 0;
|
||||
mcchip->gen_control = 2; /* MIEN */
|
||||
mcchip->SCC_int_ctl = 0x13; /* SCC IEN, IPL3 */
|
||||
|
||||
status = rtems_io_register_name(
|
||||
"/dev/console",
|
||||
major,
|
||||
(rtems_device_minor_number) 1
|
||||
);
|
||||
|
||||
if (status != RTEMS_SUCCESSFUL)
|
||||
rtems_fatal_error_occurred(status);
|
||||
|
||||
status = rtems_io_register_name(
|
||||
"/dev/tty00",
|
||||
major,
|
||||
(rtems_device_minor_number) 0
|
||||
);
|
||||
|
||||
if (status != RTEMS_SUCCESSFUL)
|
||||
rtems_fatal_error_occurred(status);
|
||||
|
||||
status = rtems_io_register_name(
|
||||
"/dev/tty01",
|
||||
major,
|
||||
(rtems_device_minor_number) 1
|
||||
);
|
||||
|
||||
if (status != RTEMS_SUCCESSFUL)
|
||||
rtems_fatal_error_occurred(status);
|
||||
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Non-blocking char input
|
||||
*/
|
||||
bool char_ready(int port, char *ch)
|
||||
{
|
||||
if ( Ring_buffer_Is_empty( &Console_Buffer[port] ) )
|
||||
return false;
|
||||
|
||||
Ring_buffer_Remove_character( &Console_Buffer[port], *ch );
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
/*
|
||||
* Block on char input
|
||||
*/
|
||||
static char inbyte(int port)
|
||||
{
|
||||
char tmp_char;
|
||||
|
||||
while ( !char_ready(port, &tmp_char) );
|
||||
return tmp_char;
|
||||
}
|
||||
|
||||
/*
|
||||
* This routine transmits a character out the SCC. It no longer supports
|
||||
* XON/XOFF flow control.
|
||||
*/
|
||||
static void outbyte(char ch, int port)
|
||||
{
|
||||
while (1) {
|
||||
if (ZREAD0(port) & TX_BUFFER_EMPTY) break;
|
||||
}
|
||||
ZWRITED(port, ch);
|
||||
}
|
||||
|
||||
/*
|
||||
* Open entry point
|
||||
*/
|
||||
rtems_device_driver console_open(
|
||||
rtems_device_major_number major,
|
||||
rtems_device_minor_number minor,
|
||||
void * arg
|
||||
)
|
||||
{
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Close entry point
|
||||
*/
|
||||
rtems_device_driver console_close(
|
||||
rtems_device_major_number major,
|
||||
rtems_device_minor_number minor,
|
||||
void * arg
|
||||
)
|
||||
{
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
/*
|
||||
* read bytes from the serial port. We only have stdin.
|
||||
*/
|
||||
rtems_device_driver console_read(
|
||||
rtems_device_major_number major,
|
||||
rtems_device_minor_number minor,
|
||||
void * arg
|
||||
)
|
||||
{
|
||||
rtems_libio_rw_args_t *rw_args;
|
||||
char *buffer;
|
||||
int maximum;
|
||||
int count = 0;
|
||||
|
||||
rw_args = (rtems_libio_rw_args_t *) arg;
|
||||
|
||||
buffer = rw_args->buffer;
|
||||
maximum = rw_args->count;
|
||||
|
||||
if ( minor > 1 )
|
||||
return RTEMS_INVALID_NUMBER;
|
||||
|
||||
for (count = 0; count < maximum; count++) {
|
||||
buffer[ count ] = inbyte( minor );
|
||||
if (buffer[ count ] == '\n' || buffer[ count ] == '\r') {
|
||||
buffer[ count++ ] = '\n';
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
rw_args->bytes_moved = count;
|
||||
return (count >= 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED;
|
||||
}
|
||||
|
||||
/*
|
||||
* write bytes to the serial port. Stdout and stderr are the same.
|
||||
*/
|
||||
rtems_device_driver console_write(
|
||||
rtems_device_major_number major,
|
||||
rtems_device_minor_number minor,
|
||||
void * arg
|
||||
)
|
||||
{
|
||||
int count;
|
||||
int maximum;
|
||||
rtems_libio_rw_args_t *rw_args;
|
||||
char *buffer;
|
||||
|
||||
rw_args = (rtems_libio_rw_args_t *) arg;
|
||||
|
||||
buffer = rw_args->buffer;
|
||||
maximum = rw_args->count;
|
||||
|
||||
if ( minor > 1 )
|
||||
return RTEMS_INVALID_NUMBER;
|
||||
|
||||
for (count = 0; count < maximum; count++) {
|
||||
if ( buffer[ count ] == '\n') {
|
||||
outbyte('\r', minor );
|
||||
}
|
||||
outbyte( buffer[ count ], minor );
|
||||
}
|
||||
|
||||
rw_args->bytes_moved = maximum;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* IO Control entry point
|
||||
*/
|
||||
rtems_device_driver console_control(
|
||||
rtems_device_major_number major,
|
||||
rtems_device_minor_number minor,
|
||||
void * arg
|
||||
)
|
||||
{
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
/*
|
||||
* _162Bug_output_char
|
||||
*
|
||||
* Output a single character using the 162Bug functions. The character
|
||||
* will be written to the default output port.
|
||||
*/
|
||||
static void _162Bug_output_char( char c )
|
||||
{
|
||||
asm volatile( "moveb %0, -(%%sp)\n\t" /* char to output */
|
||||
"trap #15\n\t" /* Trap to 162Bug */
|
||||
".short 0x20" /* Code for .OUTCHR */
|
||||
:: "d" (c) );
|
||||
}
|
||||
|
||||
/*
|
||||
* _BSP_output_char
|
||||
*
|
||||
* printk() function prototyped in bspIo.h. Does not use termios.
|
||||
*
|
||||
* If we have initialized the console device then use it, otherwise
|
||||
* use the 162Bug routines to send it to the default output port.
|
||||
*/
|
||||
static void _BSP_output_char(char c)
|
||||
{
|
||||
_162Bug_output_char(c);
|
||||
}
|
||||
|
||||
/* Printk function */
|
||||
BSP_output_char_function_type BSP_output_char = _BSP_output_char;
|
||||
BSP_polling_getchar_function_type BSP_poll_char = NULL;
|
||||
@@ -1,224 +0,0 @@
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup RTEMSBSPsM68kMVME162
|
||||
*
|
||||
* @brief Global BSP definitions.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This include file contains all MVME162fx board IO definitions.
|
||||
*/
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 1989-2014.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*
|
||||
* Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
|
||||
* EISCAT Scientific Association. M.Savitski
|
||||
*
|
||||
* This material is a part of the MVME162 Board Support Package
|
||||
* for the RTEMS executive. Its licensing policies are those of the
|
||||
* RTEMS above.
|
||||
*/
|
||||
|
||||
#ifndef LIBBSP_M68K_MVME162_BSP_H
|
||||
#define LIBBSP_M68K_MVME162_BSP_H
|
||||
|
||||
/**
|
||||
* @defgroup RTEMSBSPsM68kMVME162 MVME162
|
||||
*
|
||||
* @ingroup RTEMSBSPsM68k
|
||||
*
|
||||
* @brief MVME162 Board Support Package.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include <bspopts.h>
|
||||
#include <bsp/default-initial-extension.h>
|
||||
|
||||
#include <rtems.h>
|
||||
|
||||
#include <mvme16x_hw.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------*/
|
||||
|
||||
typedef volatile struct {
|
||||
|
||||
unsigned char chipID;
|
||||
unsigned char chipREV;
|
||||
unsigned char gen_control;
|
||||
unsigned char vector_base;
|
||||
|
||||
unsigned long timer_cmp_1;
|
||||
unsigned long timer_cnt_1;
|
||||
unsigned long timer_cmp_2;
|
||||
unsigned long timer_cnt_2;
|
||||
|
||||
unsigned char LSB_prescaler_count;
|
||||
unsigned char prescaler_clock_adjust;
|
||||
unsigned char time_ctl_2;
|
||||
unsigned char time_ctl_1;
|
||||
|
||||
unsigned char time_int_ctl_4;
|
||||
unsigned char time_int_ctl_3;
|
||||
unsigned char time_int_ctl_2;
|
||||
unsigned char time_int_ctl_1;
|
||||
|
||||
unsigned char dram_err_int_ctl;
|
||||
unsigned char SCC_int_ctl;
|
||||
unsigned char time_ctl_4;
|
||||
unsigned char time_ctl_3;
|
||||
|
||||
unsigned short DRAM_space_base;
|
||||
unsigned short SRAM_space_base;
|
||||
|
||||
unsigned char DRAM_size;
|
||||
unsigned char DRAM_SRAM_opt;
|
||||
unsigned char SRAM_size;
|
||||
unsigned char reserved;
|
||||
|
||||
unsigned char LANC_error;
|
||||
unsigned char reserved1;
|
||||
unsigned char LANC_int_ctl;
|
||||
unsigned char LANC_berr_ctl;
|
||||
|
||||
unsigned char SCSI_error;
|
||||
unsigned char general_inputs;
|
||||
unsigned char MVME_162_version;
|
||||
unsigned char SCSI_int_ctl;
|
||||
|
||||
unsigned long timer_cmp_3;
|
||||
unsigned long timer_cnt_3;
|
||||
unsigned long timer_cmp_4;
|
||||
unsigned long timer_cnt_4;
|
||||
|
||||
unsigned char bus_clk;
|
||||
unsigned char PROM_acc_time_ctl;
|
||||
unsigned char FLASH_acc_time_ctl;
|
||||
unsigned char ABORT_int_ctl;
|
||||
|
||||
unsigned char RESET_ctl;
|
||||
unsigned char watchdog_timer_ctl;
|
||||
unsigned char acc_watchdog_time_base_sel;
|
||||
unsigned char reserved2;
|
||||
|
||||
unsigned char DRAM_ctl;
|
||||
unsigned char reserved4;
|
||||
unsigned char MPU_status;
|
||||
unsigned char reserved3;
|
||||
|
||||
unsigned long prescaler_count;
|
||||
|
||||
} mcchip_regs;
|
||||
|
||||
#define mcchip ((mcchip_regs * const) 0xFFF42000)
|
||||
|
||||
/*----------------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* SCC Z8523(0) defines and macros
|
||||
* -------------------------------
|
||||
* Prototypes for the low-level serial io are also included here,
|
||||
* because such stuff is bsp-specific (yet). The function bodies
|
||||
* are in console.c
|
||||
*
|
||||
* NOTE from Eric Vaitl <evaitl@viasat.com>:
|
||||
*
|
||||
* I dropped RTEMS into a 162FX today (the MVME162-513). The 162FX has a
|
||||
* bug in the MC2 chip (revision 1) such that the SCC data register is
|
||||
* not accessible, it has to be accessed indirectly through the SCC
|
||||
* control register.
|
||||
*/
|
||||
|
||||
enum {portB, portA};
|
||||
|
||||
extern bool char_ready(int port, char *ch);
|
||||
extern char char_wait(int port);
|
||||
extern void char_put(int port, char ch);
|
||||
|
||||
#define TX_BUFFER_EMPTY 0x04
|
||||
#define RX_DATA_AVAILABLE 0x01
|
||||
#define SCC_VECTOR 0x40
|
||||
|
||||
typedef volatile struct {
|
||||
unsigned char pad1;
|
||||
volatile unsigned char csr;
|
||||
unsigned char pad2;
|
||||
volatile unsigned char buf;
|
||||
} scc_regs;
|
||||
|
||||
#define scc ((scc_regs * const) 0xFFF45000)
|
||||
|
||||
#define ZWRITE0(port, v) (scc[port].csr = (unsigned char)(v))
|
||||
#define ZREAD0(port) (scc[port].csr)
|
||||
|
||||
#define ZREAD(port, n) (ZWRITE0(port, n), (scc[port].csr))
|
||||
#define ZREADD(port) (scc[port].csr=0x08, scc[port].csr )
|
||||
|
||||
#define ZWRITE(port, n, v) (ZWRITE0(port, n), ZWRITE0(port, v))
|
||||
#define ZWRITED(port, v) (scc[port].csr = 0x08, \
|
||||
scc[port].csr = (unsigned char)(v))
|
||||
/*----------------------------------------------------------------*/
|
||||
|
||||
#ifdef M162_INIT
|
||||
#undef EXTERN
|
||||
#define EXTERN
|
||||
#else
|
||||
#undef EXTERN
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This value is the default address location of the 162Bug vector table
|
||||
* and is also the default start address of the boards DRAM. This value
|
||||
* may be different for your specific board based on a number of factors:
|
||||
*
|
||||
* Default DRAM address: 0x00000000
|
||||
* Default SRAM address: 0xFFE00000
|
||||
*
|
||||
* o If no DRAM can be found by the 162Bug program, it will use SRAM.
|
||||
* o The default SRAM address may be different if SRAM mezzanine boards
|
||||
* are installed on the main board.
|
||||
* o Both the DRAM and SRAM addresses can be modified by changing the
|
||||
* appropriate values in NVRAM using the ENV command at the 162Bug
|
||||
* prompt.
|
||||
*
|
||||
* If your board has different values than the defaults, change the value
|
||||
* of the following define.
|
||||
*
|
||||
*/
|
||||
#define MOT_162BUG_VEC_ADDRESS 0x00000000
|
||||
|
||||
extern rtems_isr_entry M68Kvec[]; /* vector table address */
|
||||
|
||||
/* functions */
|
||||
|
||||
rtems_isr_entry set_vector(
|
||||
rtems_isr_entry handler,
|
||||
rtems_vector_number vector,
|
||||
int type
|
||||
);
|
||||
|
||||
/*
|
||||
* Prototypes for methods in the BSP that cross file boundaries.
|
||||
*/
|
||||
bool char_ready(int port, char *ch);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif
|
||||
@@ -1 +0,0 @@
|
||||
#include <bsp/irq-default.h>
|
||||
@@ -1,27 +0,0 @@
|
||||
/*
|
||||
* This file was submitted by Eric Vaitl <vaitl@viasat.com> and
|
||||
* supports page table initialization.
|
||||
*/
|
||||
|
||||
#ifndef PAGE_TABLE_H
|
||||
#define PAGE_TABLE_H
|
||||
|
||||
extern void page_table_teardown(void);
|
||||
extern void page_table_init(void);
|
||||
extern int page_table_map(void *addr, unsigned long size, int cache_type);
|
||||
|
||||
enum {
|
||||
CACHE_WRITE_THROUGH,
|
||||
CACHE_COPYBACK,
|
||||
CACHE_NONE_SERIALIZED,
|
||||
CACHE_NONE
|
||||
};
|
||||
enum {
|
||||
PTM_SUCCESS,
|
||||
PTM_BAD_ADDR,
|
||||
PTM_BAD_SIZE,
|
||||
PTM_BAD_CACHE,
|
||||
PTM_NO_TABLE_SPACE
|
||||
};
|
||||
|
||||
#endif
|
||||
@@ -1,41 +0,0 @@
|
||||
/*
|
||||
* @file
|
||||
* @ingroup m68k_mvme162
|
||||
* @brief Implementations for interrupt mechanisms for Time Test 27
|
||||
*/
|
||||
|
||||
/*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifndef _RTEMS_TMTEST27
|
||||
#error "This is an RTEMS internal file you must not include directly."
|
||||
#endif
|
||||
|
||||
#ifndef __tm27_h
|
||||
#define __tm27_h
|
||||
|
||||
/*
|
||||
* Define the interrupt mechanism for Time Test 27
|
||||
*
|
||||
* NOTE: We use software interrupt 0
|
||||
*/
|
||||
|
||||
#define MUST_WAIT_FOR_INTERRUPT 0
|
||||
|
||||
#define TM27_USE_VECTOR_HANDLER
|
||||
|
||||
#define Install_tm27_vector( handler ) \
|
||||
set_vector( (handler), VBR1 * 0x10 + 0x8, 1 ); \
|
||||
lcsr->intr_level[2] |= 3; \
|
||||
lcsr->intr_ena |= 0x100;
|
||||
|
||||
#define Cause_tm27_intr() lcsr->intr_soft_set |= 0x100
|
||||
|
||||
#define Clear_tm27_intr() lcsr->intr_clear |= 0x100
|
||||
|
||||
#define Lower_tm27_intr() /* empty */
|
||||
|
||||
#endif
|
||||
@@ -1,88 +0,0 @@
|
||||
/*
|
||||
* Real Time Clock (MK48T08) for RTEMS on MVME162
|
||||
*
|
||||
* Author:
|
||||
* COPYRIGHT (C) 1997
|
||||
* by Katsutoshi Shibuya - BU Denken Co.,Ltd. - Sapporo - JAPAN
|
||||
* ALL RIGHTS RESERVED
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*
|
||||
* This material is a part of the MVME162 Board Support Package
|
||||
* for the RTEMS executive. Its licensing policies are those of the
|
||||
* RTEMS above.
|
||||
*/
|
||||
|
||||
#include <rtems.h>
|
||||
#include <rtems/tod.h>
|
||||
|
||||
#define tod ((volatile unsigned char *)0xfffc1ff8)
|
||||
|
||||
static int getTod(int n, unsigned char mask)
|
||||
{
|
||||
unsigned char x;
|
||||
|
||||
x = tod[n]&mask;
|
||||
return (x>>4)*10+(x&0x0f);
|
||||
}
|
||||
|
||||
static void setTod(int n, unsigned char d)
|
||||
{
|
||||
tod[n] = ((d/10)<<4)+(d%10);
|
||||
}
|
||||
|
||||
void setRealTimeToRTEMS(void)
|
||||
{
|
||||
rtems_time_of_day t;
|
||||
|
||||
tod[0] |= 0x40; /* Stop read register */
|
||||
t.year = 1900+getTod(7,0xff);
|
||||
t.month = getTod(6,0x1f);
|
||||
t.day = getTod(5,0x3f);
|
||||
t.hour = getTod(3,0x3f);
|
||||
t.minute = getTod(2,0x7f);
|
||||
t.second = getTod(1,0x7f);
|
||||
t.ticks = 0;
|
||||
tod[0] &= 0x3f; /* Release read register */
|
||||
|
||||
rtems_clock_set(&t);
|
||||
}
|
||||
|
||||
void setRealTimeFromRTEMS()
|
||||
{
|
||||
rtems_time_of_day t;
|
||||
|
||||
rtems_clock_get_tod(&t);
|
||||
t.year -= 1900;
|
||||
|
||||
tod[0] |= 0x80; /* Stop write register */
|
||||
setTod(7,t.year);
|
||||
setTod(6,t.month);
|
||||
setTod(5,t.day);
|
||||
setTod(4,1); /* I don't know which day of week is */
|
||||
setTod(3,t.hour);
|
||||
setTod(2,t.minute);
|
||||
setTod(1,t.second);
|
||||
tod[0] &= 0x3f; /* Write these parameters */
|
||||
}
|
||||
|
||||
int checkRealTime()
|
||||
{
|
||||
rtems_time_of_day t;
|
||||
int d;
|
||||
|
||||
tod[0] |= 0x40; /* Stop read register */
|
||||
rtems_clock_get_tod(&t);
|
||||
if((t.year != 1900+getTod(7,0xff))
|
||||
|| (t.month != getTod(6,0x1f))
|
||||
|| (t.day != getTod(5,0x3f)))
|
||||
d = 9999;
|
||||
else
|
||||
d = (t.hour-getTod(3,0x3f))*3600
|
||||
+ (t.minute-getTod(3,0x7f))*60
|
||||
+ (t.second - getTod(1,0x7f));
|
||||
tod[1] &= 0x3f;
|
||||
return d;
|
||||
}
|
||||
@@ -1,47 +0,0 @@
|
||||
/*
|
||||
* This routine returns control to 162Bug.
|
||||
*/
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 1989-2014.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*
|
||||
* Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
|
||||
* EISCAT Scientific Association. M.Savitski
|
||||
*
|
||||
* This material is a part of the MVME162 Board Support Package
|
||||
* for the RTEMS executive. Its licensing policies are those of the
|
||||
* RTEMS above.
|
||||
*/
|
||||
|
||||
#include <bsp.h>
|
||||
#include <bsp/bootcard.h>
|
||||
#include <rtems/zilog/z8036.h>
|
||||
#include <page_table.h>
|
||||
|
||||
static rtems_isr bsp_return_to_monitor_trap(
|
||||
rtems_vector_number vector
|
||||
)
|
||||
{
|
||||
page_table_teardown();
|
||||
|
||||
lcsr->intr_ena = 0; /* disable interrupts */
|
||||
m68k_set_vbr(MOT_162BUG_VEC_ADDRESS); /* restore 162Bug vectors */
|
||||
|
||||
__asm__ volatile( "trap #15" ); /* trap to 162Bug */
|
||||
__asm__ volatile( ".short 0x63" ); /* return to 162Bug (.RETURN) */
|
||||
}
|
||||
|
||||
void bsp_reset( rtems_fatal_source source, rtems_fatal_code code )
|
||||
{
|
||||
(void) source;
|
||||
(void) code;
|
||||
|
||||
M68Kvec[ 45 ] = bsp_return_to_monitor_trap; /* install handler */
|
||||
__asm__ volatile( "trap #13" ); /* ensures SUPV mode */
|
||||
RTEMS_UNREACHABLE();
|
||||
}
|
||||
@@ -1,58 +0,0 @@
|
||||
/*
|
||||
* This routine does the bulk of the system initialization.
|
||||
*/
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*
|
||||
* Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
|
||||
* EISCAT Scientific Association. M.Savitski
|
||||
*
|
||||
* This material is a part of the MVME162 Board Support Package
|
||||
* for the RTEMS executive. Its licensing policies are those of the
|
||||
* RTEMS above.
|
||||
*/
|
||||
|
||||
#include <bsp.h>
|
||||
#include <bsp/bootcard.h>
|
||||
#include <page_table.h>
|
||||
|
||||
/*
|
||||
* bsp_start
|
||||
*
|
||||
* This routine does the bulk of the system initialization.
|
||||
*/
|
||||
void bsp_start( void )
|
||||
{
|
||||
rtems_isr_entry *monitors_vector_table;
|
||||
int index;
|
||||
|
||||
monitors_vector_table = (rtems_isr_entry *)MOT_162BUG_VEC_ADDRESS;
|
||||
m68k_set_vbr( monitors_vector_table );
|
||||
|
||||
for ( index=2 ; index<=255 ; index++ )
|
||||
M68Kvec[ index ] = monitors_vector_table[ 32 ];
|
||||
|
||||
M68Kvec[ 2 ] = monitors_vector_table[ 2 ]; /* bus error vector */
|
||||
M68Kvec[ 4 ] = monitors_vector_table[ 4 ]; /* breakpoints vector */
|
||||
M68Kvec[ 9 ] = monitors_vector_table[ 9 ]; /* trace vector */
|
||||
M68Kvec[ 47 ] = monitors_vector_table[ 47 ]; /* system call vector */
|
||||
|
||||
m68k_set_vbr( &M68Kvec );
|
||||
|
||||
/*
|
||||
* You may wish to make the VME arbitration round-robin here, currently
|
||||
* we leave it as it is.
|
||||
*/
|
||||
|
||||
/* set the Interrupt Base Vectors */
|
||||
|
||||
lcsr->vector_base = (VBR0 << 28) | (VBR1 << 24);
|
||||
|
||||
page_table_init();
|
||||
}
|
||||
@@ -1,52 +0,0 @@
|
||||
/* SPDX-License-Identifier: BSD-2-Clause */
|
||||
|
||||
/*
|
||||
* This file contains directives for the GNU linker which are specific
|
||||
* to the Motorola MVME162 boards.
|
||||
*/
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 1989-2007,2016.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* MVME147 port for TNI - Telecom Bretagne
|
||||
* by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
|
||||
* May 1996
|
||||
*/
|
||||
|
||||
RamSize = DEFINED(RamSize) ? RamSize : 1M;
|
||||
RamEnd = RamBase + RamSize;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
bootrom_reserved : ORIGIN = 0x00000000, LENGTH = 0x20000
|
||||
ram : ORIGIN = 0x00020000, LENGTH = RamSize - 0x20000
|
||||
}
|
||||
|
||||
REGION_ALIAS ("REGION_TEXT", ram);
|
||||
REGION_ALIAS ("REGION_TEXT_LOAD", ram);
|
||||
REGION_ALIAS ("REGION_DATA", ram);
|
||||
REGION_ALIAS ("REGION_DATA_LOAD", ram);
|
||||
|
||||
INCLUDE linkcmds.base
|
||||
@@ -1,196 +0,0 @@
|
||||
/*
|
||||
* This file was submitted by Eric Vaitl <vaitl@viasat.com>.
|
||||
* The manipulation of the page table has a very positive impact on
|
||||
* the performance of the MVME162.
|
||||
*
|
||||
* The following history is included verbatim from the submitter.
|
||||
*
|
||||
* Revision 1.8 1995/11/18 00:07:25 vaitl
|
||||
* Modified asm-statements to get rid of the register hard-codes.
|
||||
*
|
||||
* Revision 1.7 1995/10/27 21:00:32 vaitl
|
||||
* Modified page table routines so application code can map
|
||||
* VME space.
|
||||
*
|
||||
* Revision 1.6 1995/10/26 17:40:01 vaitl
|
||||
* Two cache changes after reading the mvme162 users manual.
|
||||
*
|
||||
* 1) The users manual says that the MPU can act as a source for the
|
||||
* VME2 chip, so I made the VME accessable memory copy-back instead
|
||||
* of write through. I have't changed the comments yet. If this
|
||||
* causes problems, I'll change it back.
|
||||
*
|
||||
* 2) The 162 book also says that IO space should be serialized as well as
|
||||
* non-cacheable. I flipped the appropriate dttr0 and ittr0 registers. I
|
||||
* don't think this is really necessary because we don't recover from any
|
||||
* exceptions. If it slows down IO addresses too much, I'll change it back
|
||||
* and see what happens.
|
||||
*
|
||||
* Revision 1.5 1995/10/25 19:32:38 vaitl
|
||||
* Got it. Three problems:
|
||||
* 1) Must cpusha instead of cinva.
|
||||
* 2) On page descriptors the PDT field of 1 or 3 is resident. On pointer
|
||||
* descriptors resident is 2 or 3. I was using 2 for everything.
|
||||
* Changed it to 3 for everything.
|
||||
* 3) Forgot to do a pflusha.
|
||||
*
|
||||
* Revision 1.4 1995/10/25 17:47:11 vaitl
|
||||
* Still working on it.
|
||||
*
|
||||
* Revision 1.3 1995/10/25 17:16:05 vaitl
|
||||
* Working on page table. Caching partially set up, but can't currently
|
||||
* set tc register.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <string.h>
|
||||
#include <page_table.h>
|
||||
|
||||
/* All page table must fit between BASE_TABLE_ADDR and
|
||||
MAX_TABLE_ADDR. */
|
||||
|
||||
#define BASE_TABLE_ADDR 0x10000
|
||||
#define MAX_TABLE_ADDR 0x20000
|
||||
#define ROOT_TABLE_SIZE 512
|
||||
#define POINTER_TABLE_SIZE 512
|
||||
#define PAGE_TABLE_SIZE 256
|
||||
|
||||
static unsigned long *root_table;
|
||||
static unsigned long *next_avail;
|
||||
|
||||
/* Returns a zeroed out table. */
|
||||
static unsigned long *table_alloc(int size){
|
||||
unsigned long *addr=next_avail;
|
||||
if(((unsigned long)next_avail + size) > MAX_TABLE_ADDR){
|
||||
return 0;
|
||||
}
|
||||
memset((void *)addr,0, size);
|
||||
next_avail =(unsigned long *)((unsigned long)next_avail + size);
|
||||
return addr;
|
||||
}
|
||||
|
||||
/*
|
||||
void page_table_init();
|
||||
|
||||
This should transparently map the first 4 Meg of ram. Caching is
|
||||
turned off from 0x00000000 to 0x00020000 (this region is used by
|
||||
162Bug and contains the page tables). From 0x00020000 to 0x00400000
|
||||
we are using copy back caching. DTTR0 and ITTR0 are set up to
|
||||
directly translate from 0x80000000-0xffffffff with caching turned
|
||||
off and serialized. Addresses between 0x400000 and 0x80000000 are
|
||||
illegal.
|
||||
*/
|
||||
void page_table_init(){
|
||||
|
||||
/* put everything in a known state */
|
||||
page_table_teardown();
|
||||
|
||||
root_table=table_alloc(ROOT_TABLE_SIZE);
|
||||
|
||||
/* First set up TTR.
|
||||
base address = 0x80000000
|
||||
address mask = 0x7f
|
||||
Ignore FC2 for match.
|
||||
Noncachable.
|
||||
Not write protected.*/
|
||||
__asm__ volatile ("movec %0,%%dtt0\n\
|
||||
movec %0,%%itt0"
|
||||
:: "d" (0x807fc040));
|
||||
|
||||
/* Point urp and srp at root page table. */
|
||||
__asm__ volatile ("movec %0,%%urp\n\
|
||||
movec %0,%%srp"
|
||||
:: "d" (BASE_TABLE_ADDR));
|
||||
|
||||
page_table_map((void *)0,0x20000, CACHE_NONE);
|
||||
page_table_map((void *)0x20000,0x400000-0x20000,CACHE_COPYBACK);
|
||||
|
||||
/* Turn on paging with a 4 k page size.*/
|
||||
__asm__ volatile ("movec %0,%%tc"
|
||||
:: "d" (0x8000));
|
||||
|
||||
/* Turn on the cache. */
|
||||
__asm__ volatile ("movec %0,%%cacr"
|
||||
:: "d" (0x80008000));
|
||||
}
|
||||
|
||||
void page_table_teardown(){
|
||||
next_avail=(unsigned long *)BASE_TABLE_ADDR;
|
||||
/* Turn off paging. Turn off the cache. Flush the cache. Tear down
|
||||
the transparent translations. */
|
||||
__asm__ volatile ("movec %0,%%tc\n\
|
||||
movec %0,%%cacr\n\
|
||||
cpusha %%bc\n\
|
||||
movec %0,%%dtt0\n\
|
||||
movec %0,%%itt0\n\
|
||||
movec %0,%%dtt1\n\
|
||||
movec %0,%%itt1"
|
||||
:: "d" (0) );
|
||||
}
|
||||
|
||||
/* Identity maps addr to addr+size with caching cache_type. */
|
||||
int page_table_map(void *addr, unsigned long size, int cache_type){
|
||||
unsigned long *pointer_table;
|
||||
unsigned long *page_table;
|
||||
unsigned long root_index, pointer_index, page_index;
|
||||
/* addr must be a multiple of 4k */
|
||||
if((unsigned long)addr & 0xfff){
|
||||
return PTM_BAD_ADDR;
|
||||
}
|
||||
/* size must also be a multiple of 4k */
|
||||
if(size & 0xfff){
|
||||
return PTM_BAD_SIZE;
|
||||
}
|
||||
/* check for valid cache type */
|
||||
if( (cache_type>CACHE_NONE) || (cache_type<CACHE_WRITE_THROUGH)){
|
||||
return PTM_BAD_CACHE;
|
||||
}
|
||||
|
||||
while(size){
|
||||
root_index=(unsigned long)addr;
|
||||
root_index >>= 25;
|
||||
root_index &= 0x7f;
|
||||
|
||||
if(root_table[root_index]){
|
||||
pointer_table =
|
||||
(unsigned long *) (root_table[root_index] & 0xfffffe00);
|
||||
}else{
|
||||
if(!(pointer_table=table_alloc(POINTER_TABLE_SIZE))){
|
||||
return PTM_NO_TABLE_SPACE;
|
||||
}
|
||||
root_table[root_index]=((unsigned long)pointer_table) + 0x03;
|
||||
}
|
||||
|
||||
pointer_index=(unsigned long)addr;
|
||||
pointer_index >>=18;
|
||||
pointer_index &= 0x7f;
|
||||
|
||||
if(pointer_table[pointer_index]){
|
||||
page_table =
|
||||
(unsigned long *) (pointer_table[pointer_index] &
|
||||
0xffffff00);
|
||||
}else{
|
||||
if(!(page_table=table_alloc(PAGE_TABLE_SIZE))){
|
||||
return PTM_NO_TABLE_SPACE;
|
||||
}
|
||||
pointer_table[pointer_index]=
|
||||
((unsigned long)page_table) + 0x03;
|
||||
}
|
||||
|
||||
page_index=(unsigned long)addr;
|
||||
page_index >>=12;
|
||||
page_index &= 0x3f;
|
||||
|
||||
page_table[page_index] =
|
||||
((unsigned long) addr & 0xfffff000) + 0x03 + (cache_type << 5);
|
||||
|
||||
size -= 4096;
|
||||
addr = (void *) ((unsigned long)addr + 4096);
|
||||
}
|
||||
|
||||
/* Flush the ATC. Push and invalidate the cache. */
|
||||
__asm__ volatile ("pflusha\n\
|
||||
cpusha %bc");
|
||||
|
||||
return PTM_SUCCESS;
|
||||
}
|
||||
@@ -1,19 +0,0 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- get-string: null
|
||||
- split: null
|
||||
- env-append: null
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2020 embedded brains GmbH & Co. KG
|
||||
default:
|
||||
- enabled-by: true
|
||||
value:
|
||||
- -mcpu=68040
|
||||
- -msoft-float
|
||||
description: |
|
||||
ABI flags
|
||||
enabled-by: true
|
||||
links: []
|
||||
name: ABI_FLAGS
|
||||
type: build
|
||||
@@ -1,21 +0,0 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
arch: m68k
|
||||
bsp: mvme162
|
||||
build-type: bsp
|
||||
cflags: []
|
||||
copyrights:
|
||||
- Copyright (C) 2020 embedded brains GmbH & Co. KG
|
||||
cppflags: []
|
||||
enabled-by: true
|
||||
family: mvme162
|
||||
includes: []
|
||||
install: []
|
||||
links:
|
||||
- role: build-dependency
|
||||
uid: tstmvme162
|
||||
- role: build-dependency
|
||||
uid: ../../opto2
|
||||
- role: build-dependency
|
||||
uid: grp
|
||||
source: []
|
||||
type: build
|
||||
@@ -1,21 +0,0 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
arch: m68k
|
||||
bsp: mvme162lx
|
||||
build-type: bsp
|
||||
cflags: []
|
||||
copyrights:
|
||||
- Copyright (C) 2020 embedded brains GmbH & Co. KG
|
||||
cppflags: []
|
||||
enabled-by: true
|
||||
family: mvme162
|
||||
includes: []
|
||||
install: []
|
||||
links:
|
||||
- role: build-dependency
|
||||
uid: tstmvme162lx
|
||||
- role: build-dependency
|
||||
uid: ../../opto2
|
||||
- role: build-dependency
|
||||
uid: grp
|
||||
source: []
|
||||
type: build
|
||||
@@ -1,33 +0,0 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
build-type: group
|
||||
cflags: []
|
||||
copyrights:
|
||||
- Copyright (C) 2020 embedded brains GmbH & Co. KG
|
||||
cppflags: []
|
||||
cxxflags: []
|
||||
enabled-by: true
|
||||
includes: []
|
||||
install: []
|
||||
ldflags: []
|
||||
links:
|
||||
- role: build-dependency
|
||||
uid: ../grp
|
||||
- role: build-dependency
|
||||
uid: abi
|
||||
- role: build-dependency
|
||||
uid: obj
|
||||
- role: build-dependency
|
||||
uid: ../objfpsp
|
||||
- role: build-dependency
|
||||
uid: ../start
|
||||
- role: build-dependency
|
||||
uid: ../../obj
|
||||
- role: build-dependency
|
||||
uid: ../../objirqdflt
|
||||
- role: build-dependency
|
||||
uid: ../../objmem
|
||||
- role: build-dependency
|
||||
uid: ../../bspopts
|
||||
type: build
|
||||
use-after: []
|
||||
use-before: []
|
||||
@@ -1,39 +0,0 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
build-type: objects
|
||||
cflags: []
|
||||
copyrights:
|
||||
- Copyright (C) 2020 embedded brains GmbH & Co. KG
|
||||
cppflags: []
|
||||
cxxflags: []
|
||||
enabled-by: true
|
||||
includes: []
|
||||
install:
|
||||
- destination: ${BSP_INCLUDEDIR}
|
||||
source:
|
||||
- bsps/m68k/mvme162/include/bsp.h
|
||||
- bsps/m68k/mvme162/include/page_table.h
|
||||
- destination: ${BSP_INCLUDEDIR}/bsp
|
||||
source:
|
||||
- bsps/m68k/mvme162/include/bsp/irq.h
|
||||
- destination: ${BSP_LIBDIR}
|
||||
source:
|
||||
- bsps/m68k/mvme162/start/linkcmds
|
||||
- bsps/m68k/shared/start/linkcmds.base
|
||||
links: []
|
||||
source:
|
||||
- bsps/m68k/mvme162/btimer/btimer.c
|
||||
- bsps/m68k/mvme162/btimer/timerisr.S
|
||||
- bsps/m68k/mvme162/clock/ckinit.c
|
||||
- bsps/m68k/mvme162/console/console.c
|
||||
- bsps/m68k/mvme162/rtc/tod.c
|
||||
- bsps/m68k/mvme162/start/bspstart.c
|
||||
- bsps/m68k/mvme162/start/bspclean.c
|
||||
- bsps/m68k/mvme162/start/page_table.c
|
||||
- bsps/m68k/shared/cache/cache.c
|
||||
- bsps/m68k/shared/m68kidle.c
|
||||
- bsps/m68k/shared/memProbe.c
|
||||
- bsps/shared/dev/getentropy/getentropy-cpucounter.c
|
||||
- bsps/shared/start/gettargethash-default.c
|
||||
- bsps/shared/start/sbrk.c
|
||||
- bsps/shared/start/setvec.c
|
||||
type: build
|
||||
@@ -1,15 +0,0 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- set-test-state:
|
||||
reason: null
|
||||
state: exclude
|
||||
tests:
|
||||
- fsdosfsname01
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2020 embedded brains GmbH & Co. KG
|
||||
default: []
|
||||
description: ''
|
||||
enabled-by: true
|
||||
links: []
|
||||
type: build
|
||||
@@ -1,15 +0,0 @@
|
||||
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
|
||||
actions:
|
||||
- set-test-state:
|
||||
reason: null
|
||||
state: exclude
|
||||
tests:
|
||||
- fsdosfsname01
|
||||
build-type: option
|
||||
copyrights:
|
||||
- Copyright (C) 2020 embedded brains GmbH & Co. KG
|
||||
default: []
|
||||
description: ''
|
||||
enabled-by: true
|
||||
links: []
|
||||
type: build
|
||||
Reference in New Issue
Block a user