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bsps: Remove ARM GIC SGI target filter

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Remove the target filter for software-generated interrupts since this
feature is not supported by the affinity routing in GICv3.

Update #4202.
This commit is contained in:
Sebastian Huber
2020-12-10 08:08:00 +01:00
parent b6925e10c8
commit 105e52032e
5 changed files with 5 additions and 31 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
bsps/arm/shared/start/arm-a9mpcore-smp.c
View File

@@ -59,7 +59,6 @@ void _CPU_SMP_Send_interrupt( uint32_t target_processor_index )
{
arm_gic_irq_generate_software_irq(
ARM_GIC_IRQ_SGI_0,
ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST,
1U << target_processor_index
);
}

15
bsps/include/dev/irq/arm-gic-irq.h
View File

@@ -79,28 +79,17 @@ void bsp_interrupt_get_affinity(
Processor_mask *affinity
);
typedef enum {
ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST,
ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_EXCEPT_SELF,
ARM_GIC_IRQ_SOFTWARE_IRQ_TO_SELF
} arm_gic_irq_software_irq_target_filter;
void arm_gic_trigger_sgi(
rtems_vector_number vector,
arm_gic_irq_software_irq_target_filter filter,
uint32_t targets
);
void arm_gic_trigger_sgi(rtems_vector_number vector, uint32_t targets);
static inline rtems_status_code arm_gic_irq_generate_software_irq(
rtems_vector_number vector,
arm_gic_irq_software_irq_target_filter filter,
uint32_t targets
)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
if (vector <= ARM_GIC_IRQ_SGI_15) {
arm_gic_trigger_sgi(vector, filter, targets);
arm_gic_trigger_sgi(vector, targets);
} else {
sc = RTEMS_INVALID_ID;
}

2
bsps/include/dev/irq/arm-gic-tm27.h
View File

@@ -80,7 +80,6 @@ static inline void Cause_tm27_intr(void)
{
rtems_status_code sc = arm_gic_irq_generate_software_irq(
ARM_GIC_TM27_IRQ_LOW,
ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST,
1U << (arm_cp15_get_multiprocessor_affinity() & 0xff)
);
assert(sc == RTEMS_SUCCESSFUL);
@@ -95,7 +94,6 @@ static inline void Lower_tm27_intr(void)
{
rtems_status_code sc = arm_gic_irq_generate_software_irq(
ARM_GIC_TM27_IRQ_HIGH,
ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST,
1U << (arm_cp15_get_multiprocessor_affinity() & 0xff)
);
assert(sc == RTEMS_SUCCESSFUL);

8
bsps/shared/dev/irq/arm-gicv2.c
View File

@@ -258,15 +258,11 @@ void bsp_interrupt_get_affinity(
_Processor_mask_From_uint32_t(affinity, targets, 0);
}
void arm_gic_trigger_sgi(
rtems_vector_number vector,
arm_gic_irq_software_irq_target_filter filter,
uint32_t targets
)
void arm_gic_trigger_sgi(rtems_vector_number vector, uint32_t targets)
{
volatile gic_dist *dist = ARM_GIC_DIST;
dist->icdsgir = GIC_DIST_ICDSGIR_TARGET_LIST_FILTER(filter)
dist->icdsgir = GIC_DIST_ICDSGIR_TARGET_LIST_FILTER(0)
| GIC_DIST_ICDSGIR_CPU_TARGET_LIST(targets)
#ifdef BSP_ARM_GIC_ENABLE_FIQ_FOR_GROUP_0
| GIC_DIST_ICDSGIR_NSATT

10
bsps/shared/dev/irq/arm-gicv3.c
View File

@@ -337,16 +337,8 @@ void bsp_interrupt_get_affinity(
_Processor_mask_From_uint32_t(affinity, targets, 0);
}
void arm_gic_trigger_sgi(
rtems_vector_number vector,
arm_gic_irq_software_irq_target_filter filter,
uint32_t targets
)
void arm_gic_trigger_sgi(rtems_vector_number vector, uint32_t targets)
{
/* TODO(kmoore) Handle filter:
* ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST,
* ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_EXCEPT_SELF,
* ARM_GIC_IRQ_SOFTWARE_IRQ_TO_SELF */
#ifndef ARM_MULTILIB_ARCH_V4
uint64_t mpidr;
#else