bsps/shared: Extract PSCI target_cpu calculation

This adds a BSP-level function that returns the calculated PSCI target_cpu parameter for a given cpu_index. BSPs can override this function to use the correct affinity level for the calculation. Also updates _CPU_SMP_Start_processor() to make use of this function and remove code duplication.
2026-04-04 17:50:31 +00:00 · 2026-02-24 05:27:22 +05:30
parent 5e9f94ded9
commit 09343c8ff9
6 changed files with 136 additions and 14 deletions
--- a/bsps/include/bsp/bspsmp-arm-psci.h
+++ b/bsps/include/bsp/bspsmp-arm-psci.h
@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsShared
+ *
+ * @brief This header file provides the declaration for the
+ *   _AArch_Get_PSCI_target_cpu() function.
+ */
+
+/*
+ * Copyright (C) Preetam Das <riki10112001@gmail.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef LIBBSP_SHARED_PSCI_H
+#define LIBBSP_SHARED_PSCI_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/**
+ * @brief Returns the PSCI target_cpu parameter for a given cpu index.
+ *
+ * This function is provided by the BSP.  The default implementation assumes the
+ * core IDs to be in affinity level 0. BSPs that do not follow this convention
+ * can override this function to use the correct affinity level for the target_cpu
+ * calculation.
+ */
+uintptr_t _AArch_Get_PSCI_target_cpu( uint32_t );
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_SHARED_PSCI_H */
--- a/bsps/shared/start/bspsmp-arm-psci-targetcpu.c
+++ b/bsps/shared/start/bspsmp-arm-psci-targetcpu.c
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsShared
+ *
+ * @brief This source file contains the default implementation for the
+ *   _AArch_Get_PSCI_target_cpu() function.
+ */
+
+/*
+ * Copyright (C) 2026 Preetam Das <riki10112001@gmail.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <bsp/start.h>
+#include <bsp/bspsmp-arm-psci.h>
+#include <bsp.h>
+
+#if defined( AARCH64_MULTILIB_ARCH_V8 ) || \
+ defined( AARCH64_MULTILIB_ARCH_V8_ILP32 )
+#include <rtems/score/aarch64-system-registers.h>
+#else
+#include <rtems/score/aarch32-system-registers.h>
+#endif
+
+uintptr_t _AArch_Get_PSCI_target_cpu( uint32_t cpu_index )
+{
+  uintptr_t target_cpu;
+
+#if defined( AARCH64_MULTILIB_ARCH_V8 ) || \
+  defined( AARCH64_MULTILIB_ARCH_V8_ILP32 )
+  target_cpu = _AArch64_Read_mpidr_el1();
+  target_cpu &= ( 0x00ff00ffff00ULL );
+#else
+  target_cpu = _AArch32_Read_mpidr();
+  target_cpu &= ( 0x00ffff00UL );
+#endif
+
+  target_cpu |= cpu_index;
+
+  return target_cpu;
+}
--- a/bsps/shared/start/bspsmp-arm-psci.c
+++ b/bsps/shared/start/bspsmp-arm-psci.c
@@ -35,13 +35,8 @@
 */

 #include <bsp/start.h>
+#include <bsp/bspsmp-arm-psci.h>
 #include <bsp.h>
-#if defined( AARCH64_MULTILIB_ARCH_V8 ) || \
-  defined( AARCH64_MULTILIB_ARCH_V8_ILP32 )
-#include <rtems/score/aarch64-system-registers.h>
-#else
-#include <rtems/score/aarch32-system-registers.h>
-#endif

 #if defined( AARCH64_MULTILIB_ARCH_V8 ) || \
  defined( AARCH64_MULTILIB_ARCH_V8_ILP32 )
@@ -52,18 +47,18 @@

 bool _CPU_SMP_Start_processor( uint32_t cpu_index )
 {
+  uint32_t PSCI_FN_SYSTEM_CPU_ON;
+  uintptr_t target_cpu;
+  uintptr_t ret;
+
 #if defined( AARCH64_MULTILIB_ARCH_V8 ) || \
  defined( AARCH64_MULTILIB_ARCH_V8_ILP32 )
-  uint32_t PSCI_FN_SYSTEM_CPU_ON = 0xC4000003;
-  uint64_t target_cpu = _AArch64_Read_mpidr_el1();
-  uint64_t ret;
+  PSCI_FN_SYSTEM_CPU_ON = 0xC4000003;
 #else
-  uint32_t PSCI_FN_SYSTEM_CPU_ON = 0x84000003;
-  uint32_t target_cpu = _AArch32_Read_mpidr();
-  uint32_t ret;
+  PSCI_FN_SYSTEM_CPU_ON = 0x84000003;
 #endif
-  target_cpu &= ~( 0xff0000ffUL );
-  target_cpu |= cpu_index;
+
+  target_cpu = _AArch_Get_PSCI_target_cpu( cpu_index );

  __asm__ volatile (
    "mov " REGISTER_PREFIX "0, %1\n"
--- a/spec/build/bsps/aarch64/xen/objsmp.yml
+++ b/spec/build/bsps/aarch64/xen/objsmp.yml
@@ -13,4 +13,5 @@ links: []
 source:
 - bsps/aarch64/shared/start/aarch64-smp.c
 - bsps/shared/start/bspsmp-arm-psci.c
+- bsps/shared/start/bspsmp-arm-psci-targetcpu.c
 type: build
--- a/spec/build/bsps/aarch64/xilinx-zynqmp/objsmp.yml
+++ b/spec/build/bsps/aarch64/xilinx-zynqmp/objsmp.yml
@@ -13,4 +13,5 @@ links: []
 source:
 - bsps/aarch64/shared/start/aarch64-smp.c
 - bsps/shared/start/bspsmp-arm-psci.c
+- bsps/shared/start/bspsmp-arm-psci-targetcpu.c
 type: build
--- a/spec/build/bsps/obj.yml
+++ b/spec/build/bsps/obj.yml
@@ -11,6 +11,7 @@ install:
 - destination: ${BSP_INCLUDEDIR}/bsp
  source:
  - bsps/include/bsp/bootcard.h
+  - bsps/include/bsp/bspsmp-arm-psci.h
  - bsps/include/bsp/console-polled.h
  - bsps/include/bsp/console-termios.h
  - bsps/include/bsp/default-initial-extension.h