Imagelibrary/rtems-patmos
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Added exceptions status register to a thread's context structure

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This commit is contained in:
afpr
2014-03-27 16:00:16 +00:00
parent 96375e3bf4
commit b36bd54edb
3 changed files with 306 additions and 263 deletions
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296
c/src/lib/libbsp/patmos/pasim/clock/ckinit.c
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@@ -121,6 +121,28 @@ uint32_t bsp_clock_nanoseconds_since_last_tick(void)
//#define Clock_driver_nanoseconds_since_last_tick bsp_clock_nanoseconds_since_last_tick
/*
* C code to be executed in Clock_isr goes here
* This function cannot be inlined
*/
void __attribute__ ((noinline)) Clock_isr_no_inline(void){
//uint32_t level = patmos_disable_interrupts();
set_usec_timer(rtems_configuration_get_microseconds_per_tick());
/*
* Accurate count of ISRs
*/
Clock_driver_ticks += 1;
rtems_clock_tick();
//patmos_enable_interrupts(level);
}
/*
* Clock_isr
*
@@ -143,77 +165,80 @@ rtems_isr Clock_isr(
* copy the current stack to memory and save the stack size to the shadow stack
* save special-purpose registers to the shadow stack
*/
asm volatile("sub $r31 = $r31, %0 \n\t" // offset shadow stack pointer
"swm [ $r31 + %1 ] = $r0 \n\t" //save r0
"swm [ $r31 + %2 ] = $r1 \n\t" //save r1
"swm [ $r31 + %3 ] = $r2 \n\t" //save r2
"swm [ $r31 + %4 ] = $r3 \n\t" //save r3
"swm [ $r31 + %5 ] = $r4 \n\t" //save r4
"swm [ $r31 + %6 ] = $r5 \n\t" //save r5
"swm [ $r31 + %7 ] = $r6 \n\t" //save r6
"swm [ $r31 + %8 ] = $r7 \n\t" //save r7
"swm [ $r31 + %9 ] = $r8 \n\t" //save r8
"swm [ $r31 + %10 ] = $r9 \n\t" //save r9
"swm [ $r31 + %11 ] = $r10 \n\t" //save r10
"swm [ $r31 + %12 ] = $r11 \n\t" //save r11
"swm [ $r31 + %13 ] = $r12 \n\t" //save r12
"swm [ $r31 + %14 ] = $r13 \n\t" //save r13
"swm [ $r31 + %15 ] = $r14 \n\t" //save r14
"swm [ $r31 + %16 ] = $r15 \n\t" //save r15
"swm [ $r31 + %17 ] = $r16 \n\t" //save r16
"swm [ $r31 + %18 ] = $r17 \n\t" //save r17
"swm [ $r31 + %19 ] = $r18 \n\t" //save r18
"swm [ $r31 + %20 ] = $r19 \n\t" //save r19
"swm [ $r31 + %21 ] = $r20 \n\t" //save r20
"swm [ $r31 + %22 ] = $r21 \n\t" //save r21
"swm [ $r31 + %23 ] = $r22 \n\t" //save r22
"swm [ $r31 + %24 ] = $r23 \n\t" //save r23
"swm [ $r31 + %25 ] = $r24 \n\t" //save r24
"swm [ $r31 + %26 ] = $r25 \n\t" //save r25
"swm [ $r31 + %27 ] = $r26 \n\t" //save r26
"swm [ $r31 + %28 ] = $r27 \n\t" //save r27
"swm [ $r31 + %29 ] = $r28 \n\t" //save r28
"swm [ $r31 + %30 ] = $r29 \n\t" //save r29
"swm [ $r31 + %31 ] = $r30 \n\t" //save r30
"swm [ $r31 + %32 ] = $r31 \n\t" //save r31
asm volatile("sub $r31 = $r31, %0 \n\t" // offset shadow stack pointer
"swm [ $r31 + %1 ] = $r0 \n\t" //save r0
"swm [ $r31 + %2 ] = $r1 \n\t" //save r1
"swm [ $r31 + %3 ] = $r2 \n\t" //save r2
"swm [ $r31 + %4 ] = $r3 \n\t" //save r3
"swm [ $r31 + %5 ] = $r4 \n\t" //save r4
"swm [ $r31 + %6 ] = $r5 \n\t" //save r5
"swm [ $r31 + %7 ] = $r6 \n\t" //save r6
"swm [ $r31 + %8 ] = $r7 \n\t" //save r7
"swm [ $r31 + %9 ] = $r8 \n\t" //save r8
"swm [ $r31 + %10 ] = $r9 \n\t" //save r9
"swm [ $r31 + %11 ] = $r10 \n\t" //save r10
"swm [ $r31 + %12 ] = $r11 \n\t" //save r11
"swm [ $r31 + %13 ] = $r12 \n\t" //save r12
"swm [ $r31 + %14 ] = $r13 \n\t" //save r13
"swm [ $r31 + %15 ] = $r14 \n\t" //save r14
"swm [ $r31 + %16 ] = $r15 \n\t" //save r15
"swm [ $r31 + %17 ] = $r16 \n\t" //save r16
"swm [ $r31 + %18 ] = $r17 \n\t" //save r17
"swm [ $r31 + %19 ] = $r18 \n\t" //save r18
"swm [ $r31 + %20 ] = $r19 \n\t" //save r19
"swm [ $r31 + %21 ] = $r20 \n\t" //save r20
"swm [ $r31 + %22 ] = $r21 \n\t" //save r21
"swm [ $r31 + %23 ] = $r22 \n\t" //save r22
"swm [ $r31 + %24 ] = $r23 \n\t" //save r23
"swm [ $r31 + %25 ] = $r24 \n\t" //save r24
"swm [ $r31 + %26 ] = $r25 \n\t" //save r25
"swm [ $r31 + %27 ] = $r26 \n\t" //save r26
"swm [ $r31 + %28 ] = $r27 \n\t" //save r27
"swm [ $r31 + %29 ] = $r28 \n\t" //save r28
"swm [ $r31 + %30 ] = $r29 \n\t" //save r29
"swm [ $r31 + %31 ] = $r30 \n\t" //save r30
"swm [ $r31 + %32 ] = $r31 \n\t" //save r31
"mfs $r5 = $ss \n\t"
"mfs $r6 = $st \n\t"
"sub $r2 = $r5, $r6 \n\t" // get stack size
"sub $r2 = $r5, $r6 \n\t" // get stack size
"sspill $r2 \n\t"
"swm [ $r31 + %33 ] = $r2 \n\t" //save stack size to memory
"mfs $r1 = $s0 \n\t" //move s0 to r1
"swm [ $r31 + %34 ] = $r1 \n\t" //save s0
"mfs $r1 = $s1 \n\t" //move s1 to r1
"swm [ $r31 + %35 ] = $r1 \n\t" //save s1
"mfs $r1 = $s2 \n\t" //move s2 to r1
"swm [ $r31 + %36 ] = $r1 \n\t" //save s2
"mfs $r1 = $s3 \n\t" //move s3 to r1
"swm [ $r31 + %37 ] = $r1 \n\t" //save s3
"mfs $r1 = $s4 \n\t" //move s4 to r1
"swm [ $r31 + %38 ] = $r1 \n\t" //save s4
"mfs $r1 = $s5 \n\t" //move s5 to r1
"swm [ $r31 + %39 ] = $r1 \n\t" //save s5
"mfs $r1 = $s6 \n\t" //move s6 to r1
"swm [ $r31 + %40 ] = $r1 \n\t" //save s6
"mfs $r1 = $s7 \n\t" //move s7 to r1
"swm [ $r31 + %41 ] = $r1 \n\t" //save s7
"mfs $r1 = $s8 \n\t" //move s8 to r1
"swm [ $r31 + %42 ] = $r1 \n\t" //save s8
"mfs $r1 = $s9 \n\t" //move s9 to r1
"swm [ $r31 + %43 ] = $r1 \n\t" //save s9
"mfs $r1 = $s10 \n\t" //move s10 to r1
"swm [ $r31 + %44 ] = $r1 \n\t" //save s10
"mfs $r1 = $s11 \n\t" //move s11 to r1
"swm [ $r31 + %45 ] = $r1 \n\t" //save s11
"mfs $r1 = $s12 \n\t" //move s12 to r1
"swm [ $r31 + %46 ] = $r1 \n\t" //save s12
"mfs $r1 = $s13 \n\t" //move s13 to r1
"swm [ $r31 + %47 ] = $r1 \n\t" //save s13
"mfs $r1 = $s14 \n\t" //move s14 to r1
"swm [ $r31 + %48 ] = $r1 \n\t" //save s14
"mfs $r1 = $s15 \n\t" //move s15 to r1
"swm [ $r31 + %49 ] = $r1 \n\t" //save s15
"and $r0 = $r0, 0\n\t" //reset r0
"swm [ $r31 + %33 ] = $r2 \n\t" //save stack size to memory
"mfs $r1 = $s0 \n\t" //move s0 to r1
"swm [ $r31 + %34 ] = $r1 \n\t" //save s0
"mfs $r1 = $s1 \n\t" //move s1 to r1
"swm [ $r31 + %35 ] = $r1 \n\t" //save s1
"mfs $r1 = $s2 \n\t" //move s2 to r1
"swm [ $r31 + %36 ] = $r1 \n\t" //save s2
"mfs $r1 = $s3 \n\t" //move s3 to r1
"swm [ $r31 + %37 ] = $r1 \n\t" //save s3
"mfs $r1 = $s4 \n\t" //move s4 to r1
"swm [ $r31 + %38 ] = $r1 \n\t" //save s4
"mfs $r1 = $s5 \n\t" //move s5 to r1
"swm [ $r31 + %39 ] = $r1 \n\t" //save s5
"mfs $r1 = $s6 \n\t" //move s6 to r1
"swm [ $r31 + %40 ] = $r1 \n\t" //save s6
"mfs $r1 = $s7 \n\t" //move s7 to r1
"swm [ $r31 + %41 ] = $r1 \n\t" //save s7
"mfs $r1 = $s8 \n\t" //move s8 to r1
"swm [ $r31 + %42 ] = $r1 \n\t" //save s8
"mfs $r1 = $s9 \n\t" //move s9 to r1
"swm [ $r31 + %43 ] = $r1 \n\t" //save s9
"mfs $r1 = $s10 \n\t" //move s10 to r1
"swm [ $r31 + %44 ] = $r1 \n\t" //save s10
"mfs $r1 = $s11 \n\t" //move s11 to r1
"swm [ $r31 + %45 ] = $r1 \n\t" //save s11
"mfs $r1 = $s12 \n\t" //move s12 to r1
"swm [ $r31 + %46 ] = $r1 \n\t" //save s12
"mfs $r1 = $s13 \n\t" //move s13 to r1
"swm [ $r31 + %47 ] = $r1 \n\t" //save s13
"mfs $r1 = $s14 \n\t" //move s14 to r1
"swm [ $r31 + %48 ] = $r1 \n\t" //save s14
"mfs $r1 = $s15 \n\t" //move s15 to r1
"swm [ $r31 + %49 ] = $r1 \n\t" //save s15
"li $r2 = %50 \n\t"
"lwl $r1 = [ $r2 + 0 ] \n\t nop \n\t" //load exceptions status register to r1
"swm [ $r31 + %51 ] = $r1 \n\t" //save exceptions status register
"and $r0 = $r0, 0\n\t" //reset r0
: : "i" (CONTEXT_OFFSET), "i" (r0_OFFSET), "i" (r1_OFFSET),"i" (r2_OFFSET), "i" (r3_OFFSET),
"i" (r4_OFFSET), "i" (r5_OFFSET), "i" (r6_OFFSET), "i" (r7_OFFSET), "i" (r8_OFFSET),
"i" (r9_OFFSET), "i" (r10_OFFSET), "i" (r11_OFFSET), "i" (r12_OFFSET), "i" (r13_OFFSET),
@@ -223,100 +248,99 @@ rtems_isr Clock_isr(
"i" (r29_OFFSET), "i" (r30_OFFSET), "i" (r31_OFFSET), "i" (ssize_OFFSET), "i" (s0_OFFSET),
"i" (s1_OFFSET), "i" (s2_OFFSET), "i" (s3_OFFSET), "i" (s4_OFFSET), "i" (s5_OFFSET),
"i" (s6_OFFSET), "i" (s7_OFFSET), "i" (s8_OFFSET), "i" (s9_OFFSET), "i" (s10_OFFSET),
"i" (s11_OFFSET), "i" (s12_OFFSET), "i" (s13_OFFSET), "i" (s14_OFFSET), "i" (s15_OFFSET));
"i" (s11_OFFSET), "i" (s12_OFFSET), "i" (s13_OFFSET), "i" (s14_OFFSET), "i" (s15_OFFSET),
"i" (&_excunit_base), "i" (exc_OFFSET));
set_usec_timer(rtems_configuration_get_microseconds_per_tick());
/*
* Accurate count of ISRs
*/
Clock_driver_ticks += 1;
rtems_clock_tick();
Clock_isr_no_inline();
/*
* load general-purpose registers from the shadow stack
* load special-purpose registers from the shadow stack cache
*/
asm volatile("lwc $r0 = [ $r31 + %0 ] \n\t" //load r0
"lwc $r2 = [ $r31 + %1 ] \n\t" //load r2
"lwc $r3 = [ $r31 + %2 ] \n\t" //load r3
"lwc $r4 = [ $r31 + %3 ] \n\t" //load r4
"lwc $r5 = [ $r31 + %4 ] \n\t" //load r5
"lwc $r6 = [ $r31 + %5 ] \n\t" //load r6
"lwc $r7 = [ $r31 + %6 ] \n\t" //load r7
"lwc $r8 = [ $r31 + %7 ] \n\t" //load r8
"lwc $r9 = [ $r31 + %8 ] \n\t" //load r9
"lwc $r10 = [ $r31 + %9 ] \n\t" //load r10
"lwc $r11 = [ $r31 + %10 ] \n\t" //load r11
"lwc $r12 = [ $r31 + %11 ] \n\t" //load r12
"lwc $r13 = [ $r31 + %12 ] \n\t" //load r13
"lwc $r14 = [ $r31 + %13 ] \n\t" //load r14
"lwc $r15 = [ $r31 + %14 ] \n\t" //load r15
"lwc $r16 = [ $r31 + %15 ] \n\t" //load r16
"lwc $r17 = [ $r31 + %16 ] \n\t" //load r17
"lwc $r18 = [ $r31 + %17 ] \n\t" //load r18
"lwc $r19 = [ $r31 + %18 ] \n\t" //load r19
"lwc $r20 = [ $r31 + %19 ] \n\t" //load r20
"lwc $r21 = [ $r31 + %20 ] \n\t" //load r21
"lwc $r22 = [ $r31 + %21 ] \n\t" //load r22
"lwc $r23 = [ $r31 + %22 ] \n\t" //load r23
"lwc $r24 = [ $r31 + %23 ] \n\t" //load r24
"lwc $r25 = [ $r31 + %24 ] \n\t" //load r25
"lwc $r26 = [ $r31 + %25 ] \n\t" //load r26
"lwc $r27 = [ $r31 + %26 ] \n\t" //load r27
"lwc $r28 = [ $r31 + %27 ] \n\t" //load r28
"lwc $r29 = [ $r31 + %28 ] \n\t" //load r30
"lwc $r30 = [ $r31 + %29 ] \n\t" //load r31
"lwc $r1 = [ $r31 + %30 ] \n\t nop \n\t" //load s0
"lwc $r3 = [ $r31 + %1 ] \n\t" //load r3
"lwc $r4 = [ $r31 + %2 ] \n\t" //load r4
"lwc $r5 = [ $r31 + %3 ] \n\t" //load r5
"lwc $r6 = [ $r31 + %4 ] \n\t" //load r6
"lwc $r7 = [ $r31 + %5 ] \n\t" //load r7
"lwc $r8 = [ $r31 + %6 ] \n\t" //load r8
"lwc $r9 = [ $r31 + %7 ] \n\t" //load r9
"lwc $r10 = [ $r31 + %8 ] \n\t" //load r10
"lwc $r11 = [ $r31 + %9 ] \n\t" //load r11
"lwc $r12 = [ $r31 + %10 ] \n\t" //load r12
"lwc $r13 = [ $r31 + %11 ] \n\t" //load r13
"lwc $r14 = [ $r31 + %12 ] \n\t" //load r14
"lwc $r15 = [ $r31 + %13 ] \n\t" //load r15
"lwc $r16 = [ $r31 + %14 ] \n\t" //load r16
"lwc $r17 = [ $r31 + %15 ] \n\t" //load r17
"lwc $r18 = [ $r31 + %16 ] \n\t" //load r18
"lwc $r19 = [ $r31 + %17 ] \n\t" //load r19
"lwc $r20 = [ $r31 + %18 ] \n\t" //load r20
"lwc $r21 = [ $r31 + %19 ] \n\t" //load r21
"lwc $r22 = [ $r31 + %20 ] \n\t" //load r22
"lwc $r23 = [ $r31 + %21 ] \n\t" //load r23
"lwc $r24 = [ $r31 + %22 ] \n\t" //load r24
"lwc $r25 = [ $r31 + %23 ] \n\t" //load r25
"lwc $r26 = [ $r31 + %24 ] \n\t" //load r26
"lwc $r27 = [ $r31 + %25 ] \n\t" //load r27
"lwc $r28 = [ $r31 + %26 ] \n\t" //load r28
"lwc $r29 = [ $r31 + %27 ] \n\t" //load r30
"lwc $r30 = [ $r31 + %28 ] \n\t" //load r31
"lwc $r1 = [ $r31 + %29 ] \n\t nop \n\t" //load s0
"mts $s0 = $r1 \n\t" //move r1 to s0
"lwc $r1 = [ $r31 + %31 ] \n\t nop \n\t" //load s1
"lwc $r1 = [ $r31 + %30 ] \n\t nop \n\t" //load s1
"mts $s1 = $r1 \n\t" //move r1 to s1
"lwc $r1 = [ $r31 + %32 ] \n\t nop \n\t" //load s2
"lwc $r1 = [ $r31 + %31 ] \n\t nop \n\t" //load s2
"mts $s2 = $r1 \n\t" //move r1 to s2
"lwc $r1 = [ $r31 + %33 ] \n\t nop \n\t" //load s3
"lwc $r1 = [ $r31 + %32 ] \n\t nop \n\t" //load s3
"mts $s3 = $r1 \n\t" //move r1 to s3
"lwc $r1 = [ $r31 + %34 ] \n\t nop \n\t" //load s4
"lwc $r1 = [ $r31 + %33 ] \n\t nop \n\t" //load s4
"mts $s4 = $r1 \n\t" //move r1 to s4
"lwc $r1 = [ $r31 + %35 ] \n\t nop \n\t" //load s5
"lwc $r1 = [ $r31 + %34 ] \n\t nop \n\t" //load s5
"mts $s5 = $r1 \n\t" //move r1 to s5
"lwc $r1 = [ $r31 + %36 ] \n\t nop \n\t" //load s6
"lwc $r1 = [ $r31 + %35 ] \n\t nop \n\t" //load s6
"mts $s6 = $r1 \n\t" //move r1 to s6
"lwc $r1 = [ $r31 + %37 ] \n\t nop \n\t" //load s7
"lwc $r1 = [ $r31 + %36 ] \n\t nop \n\t" //load s7
"mts $s7 = $r1 \n\t" //move r1 to s7
"lwc $r1 = [ $r31 + %38 ] \n\t nop \n\t" //load s8
"lwc $r1 = [ $r31 + %37 ] \n\t nop \n\t" //load s8
"mts $s8 = $r1 \n\t" //move r1 to s8
"lwc $r1 = [ $r31 + %39 ] \n\t nop \n\t" //load s9
"lwc $r1 = [ $r31 + %38 ] \n\t nop \n\t" //load s9
"mts $s9 = $r1 \n\t" //move r1 to s9
"lwc $r1 = [ $r31 + %40 ] \n\t nop \n\t" //load s10
"lwc $r1 = [ $r31 + %39 ] \n\t nop \n\t" //load s10
"mts $s10 = $r1 \n\t" //move r1 to s10
"lwc $r1 = [ $r31 + %41 ] \n\t nop \n\t" //load s11
"lwc $r1 = [ $r31 + %40 ] \n\t nop \n\t" //load s11
"mts $s11 = $r1 \n\t" //move r1 to s11
"lwc $r1 = [ $r31 + %42 ] \n\t nop \n\t" //load s12
"lwc $r1 = [ $r31 + %41 ] \n\t nop \n\t" //load s12
"mts $s12 = $r1 \n\t" //move r1 to s12
"lwc $r1 = [ $r31 + %43 ] \n\t nop \n\t" //load s13
"lwc $r1 = [ $r31 + %42 ] \n\t nop \n\t" //load s13
"mts $s13 = $r1 \n\t" //move r1 to s13
"lwc $r1 = [ $r31 + %44 ] \n\t nop \n\t" //load s14
"lwc $r1 = [ $r31 + %43 ] \n\t nop \n\t" //load s14
"mts $s14 = $r1 \n\t" //move r1 to s14
"lwc $r1 = [ $r31 + %45 ] \n\t nop \n\t" //load s15
"lwc $r1 = [ $r31 + %44 ] \n\t nop \n\t" //load s15
"mts $s15 = $r1 \n\t" //move r1 to s15
"lwm $r1 = [ $r31 + %46 ] \n\t nop \n\t" //load ssize
"lwm $r1 = [ $r31 + %45 ] \n\t nop \n\t" //load ssize
"sens $r1 \n\t" //ensure the stack size in the stack cache
"lwm $r1 = [ $r31 + %46 ] \n\t" //load exceptions status register
"li $r2 = %47 \n\t"
"swl [ $r2 + 0 ] = $r1 \n\t" //restore exceptions status register
"lwc $r1 = [ $r31 + %48 ] \n\t" //load r1
"lwc $r2 = [ $r31 + %49 ] \n\t" //load r2
"xret \n\t" //return to sxb, sxo
"lwc $r31 = [ $r31 + %47 ] \n\t" //load r31
"lwc $r31 = [ $r31 + %50 ] \n\t" //load r31
"nop \n\t" //load delay slot
"add $r31 = $r31, %49 \n\t" // reset shadow stack pointer
: : "i" (r0_OFFSET), "i" (r2_OFFSET), "i" (r3_OFFSET), "i" (r4_OFFSET), "i" (r5_OFFSET),
"i" (r6_OFFSET), "i" (r7_OFFSET), "i" (r8_OFFSET), "i" (r9_OFFSET), "i" (r10_OFFSET),
"i" (r11_OFFSET), "i" (r12_OFFSET), "i" (r13_OFFSET), "i" (r14_OFFSET), "i" (r15_OFFSET),
"i" (r16_OFFSET), "i" (r17_OFFSET), "i" (r18_OFFSET), "i" (r19_OFFSET), "i" (r20_OFFSET),
"i" (r21_OFFSET), "i" (r22_OFFSET), "i" (r23_OFFSET), "i" (r24_OFFSET), "i" (r25_OFFSET),
"i" (r26_OFFSET), "i" (r27_OFFSET), "i" (r28_OFFSET), "i" (r29_OFFSET), "i" (r30_OFFSET),
"i" (s0_OFFSET), "i" (s1_OFFSET), "i" (s2_OFFSET), "i" (s3_OFFSET), "i" (s4_OFFSET),
"i" (s5_OFFSET), "i" (s6_OFFSET), "i" (s7_OFFSET), "i" (s8_OFFSET), "i" (s9_OFFSET),
"i" (s10_OFFSET), "i" (s11_OFFSET), "i" (s12_OFFSET), "i" (s13_OFFSET), "i" (s14_OFFSET),
"i" (s15_OFFSET), "i" (ssize_OFFSET), "i" (r31_OFFSET), "i" (r1_OFFSET), "i" (CONTEXT_OFFSET));
"add $r31 = $r31, %51 \n\t" // reset shadow stack pointer
: : "i" (r0_OFFSET), "i" (r3_OFFSET), "i" (r4_OFFSET), "i" (r5_OFFSET), "i" (r6_OFFSET),
"i" (r7_OFFSET), "i" (r8_OFFSET), "i" (r9_OFFSET), "i" (r10_OFFSET), "i" (r11_OFFSET),
"i" (r12_OFFSET), "i" (r13_OFFSET), "i" (r14_OFFSET), "i" (r15_OFFSET), "i" (r16_OFFSET),
"i" (r17_OFFSET), "i" (r18_OFFSET), "i" (r19_OFFSET), "i" (r20_OFFSET), "i" (r21_OFFSET),
"i" (r22_OFFSET), "i" (r23_OFFSET), "i" (r24_OFFSET), "i" (r25_OFFSET), "i" (r26_OFFSET),
"i" (r27_OFFSET), "i" (r28_OFFSET), "i" (r29_OFFSET), "i" (r30_OFFSET), "i" (s0_OFFSET),
"i" (s1_OFFSET), "i" (s2_OFFSET), "i" (s3_OFFSET), "i" (s4_OFFSET), "i" (s5_OFFSET),
"i" (s6_OFFSET), "i" (s7_OFFSET), "i" (s8_OFFSET), "i" (s9_OFFSET), "i" (s10_OFFSET),
"i" (s11_OFFSET), "i" (s12_OFFSET), "i" (s13_OFFSET), "i" (s14_OFFSET), "i" (s15_OFFSET),
"i" (ssize_OFFSET), "i" (exc_OFFSET), "i" (&_excunit_base), "i" (r1_OFFSET), "i" (r2_OFFSET),
"i" (r31_OFFSET), "i" (CONTEXT_OFFSET));
}
@@ -345,7 +369,7 @@ void Install_clock(
// unmask interrupt
intr_unmask(EXC_INTR_USEC);
// enable interrupts
patmos_enable_interrupts();
patmos_enable_interrupts(EXC_STATUS|CPU_MODES_INTERRUPT_MASK);
#if defined(Clock_driver_nanoseconds_since_last_tick)
rtems_clock_set_nanoseconds_extension(
@@ -375,7 +399,7 @@ void Install_clock(
void Clock_exit( void )
{
/* XXX: turn off the timer interrupts */
/* turn off the timer interrupts */
patmos_disable_interrupts();

256
cpukit/score/cpu/patmos/cpu.c
View File

@@ -1,10 +1,10 @@
/*
* PATMOS Dependent Source
* Patmos Dependent Source
*
* Project: T-CREST - Time-Predictable Multi-Core Architecture for Embedded Systems
*
* Copyright (C) GMVIS Skysoft S.A., 2013
* @author André Rocha
* @author Andre Rocha
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
@@ -44,12 +44,16 @@ void _CPU_Initialize(void)
* Input Parameters: NONE
*
* Output Parameters:
* returns the current interrupt level (PIL field of the PSR)
* returns the current interrupt level
*/
uint32_t _CPU_ISR_Get_level( void )
{
return 0;
uint32_t level;
patmos_get_interrupt_level( level );
return level;
}
/*PAGE
@@ -103,8 +107,7 @@ void _CPU_ISR_install_vector(
{
}
/*PAGE
*
/*
* _CPU_Context_Initialize
*
* This kernel routine initializes the basic non-FP context area associated
@@ -133,7 +136,7 @@ void _CPU_Context_Initialize(
uint32_t stack_high; /* highest "stack aligned" address */
/*
* On CPUs with stacks which grow down (i.e. PATMOS), we build the stack
* On CPUs with stacks which grow down (i.e. Patmos), we build the stack
* based on the stack_high address.
*/
@@ -153,6 +156,9 @@ void _CPU_Context_Initialize(
/* set the stack size */
the_context->ssize = 0;
/* set the interrupt level */
the_context->exc_status = new_level ^ CPU_MODES_INTERRUPT_MASK;
}
void _CPU_Context_switch(
@@ -218,86 +224,88 @@ void _CPU_Context_switch(
* save special-purpose registers
* use r1 as intermediate register to save special-purpose registers (no instruction to do it directly)
*/
asm volatile("mfs $r1 = $s0 \n\t" //move s0 to r1
"swm [ %0 + %1 ] = $r1 \n\t" //save s0
"mfs $r1 = $s1 \n\t" //move s1 to r1
"swm [ %0 + %2 ] = $r1 \n\t" //save s1
"mfs $r1 = $s2 \n\t" //move s2 to r1
"swm [ %0 + %3 ] = $r1 \n\t" //save s2
"mfs $r1 = $s3 \n\t" //move s3 to r1
"swm [ %0 + %4 ] = $r1 \n\t" //save s3
"mfs $r1 = $s4 \n\t" //move s4 to r1
"swm [ %0 + %5 ] = $r1 \n\t" //save s4
"mfs $r1 = $s5 \n\t" //move s5 to r1
"swm [ %0 + %6 ] = $r1 \n\t" //save s5
"mfs $r1 = $s6 \n\t" //move s6 to r1
"swm [ %0 + %7 ] = $r1 \n\t" //save s6
"mfs $r1 = $s7 \n\t" //move s7 to r1
"swm [ %0 + %8 ] = $r1 \n\t" //save s7
"mfs $r1 = $s8 \n\t" //move s8 to r1
"swm [ %0 + %9 ] = $r1 \n\t" //save s8
"mfs $r1 = $s9 \n\t" //move s9 to r1
"swm [ %0 + %10 ] = $r1 \n\t" //save s9
"mfs $r1 = $s10 \n\t" //move s10 to r1
"swm [ %0 + %11 ] = $r1 \n\t" //save s10
"mfs $r1 = $s11 \n\t" //move s11 to r1
"swm [ %0 + %12 ] = $r1 \n\t" //save s11
"mfs $r1 = $s12 \n\t" //move s12 to r1
"swm [ %0 + %13 ] = $r1 \n\t" //save s12
"mfs $r1 = $s13 \n\t" //move s13 to r1
"swm [ %0 + %14 ] = $r1 \n\t" //save s13
"mfs $r1 = $s14 \n\t" //move s14 to r1
"swm [ %0 + %15 ] = $r1 \n\t" //save s14
"mfs $r1 = $s15 \n\t" //move s15 to r1
"swm [ %0 + %16 ] = $r1 \n\t" //save s15
asm volatile("mfs $r1 = $s0 \n\t" //move s0 to r1
"swm [ %0 + %1 ] = $r1 \n\t" //save s0
"mfs $r1 = $s1 \n\t" //move s1 to r1
"swm [ %0 + %2 ] = $r1 \n\t" //save s1
"mfs $r1 = $s2 \n\t" //move s2 to r1
"swm [ %0 + %3 ] = $r1 \n\t" //save s2
"mfs $r1 = $s3 \n\t" //move s3 to r1
"swm [ %0 + %4 ] = $r1 \n\t" //save s3
"mfs $r1 = $s4 \n\t" //move s4 to r1
"swm [ %0 + %5 ] = $r1 \n\t" //save s4
"mfs $r1 = $s5 \n\t" //move s5 to r1
"swm [ %0 + %6 ] = $r1 \n\t" //save s5
"mfs $r1 = $s6 \n\t" //move s6 to r1
"swm [ %0 + %7 ] = $r1 \n\t" //save s6
"mfs $r1 = $s7 \n\t" //move s7 to r1
"swm [ %0 + %8 ] = $r1 \n\t" //save s7
"mfs $r1 = $s8 \n\t" //move s8 to r1
"swm [ %0 + %9 ] = $r1 \n\t" //save s8
"mfs $r1 = $s9 \n\t" //move s9 to r1
"swm [ %0 + %10 ] = $r1 \n\t" //save s9
"mfs $r1 = $s10 \n\t" //move s10 to r1
"swm [ %0 + %11 ] = $r1 \n\t" //save s10
"mfs $r1 = $s11 \n\t" //move s11 to r1
"swm [ %0 + %12 ] = $r1 \n\t" //save s11
"mfs $r1 = $s12 \n\t" //move s12 to r1
"swm [ %0 + %13 ] = $r1 \n\t" //save s12
"mfs $r1 = $s13 \n\t" //move s13 to r1
"swm [ %0 + %14 ] = $r1 \n\t" //save s13
"mfs $r1 = $s14 \n\t" //move s14 to r1
"swm [ %0 + %15 ] = $r1 \n\t" //save s14
"mfs $r1 = $s15 \n\t" //move s15 to r1
"swm [ %0 + %16 ] = $r1 \n\t" //save s15
"li $r2 = %17 \n\t"
"lwl $r1 = [ $r2 + 0 ] \n\t nop \n\t" //load exceptions status register to r1
"swm [ %0 + %18 ] = $r1 \n\t" //save exceptions status register
: : "{$r3}" (run), "i" (s0_OFFSET), "i" (s1_OFFSET), "i" (s2_OFFSET), "i" (s3_OFFSET),
"i" (s4_OFFSET), "i" (s5_OFFSET), "i" (s6_OFFSET), "i" (s7_OFFSET), "i" (s8_OFFSET),
"i" (s9_OFFSET), "i" (s10_OFFSET),"i" (s11_OFFSET), "i" (s12_OFFSET), "i" (s13_OFFSET),
"i" (s14_OFFSET), "i" (s15_OFFSET)
"i" (s14_OFFSET), "i" (s15_OFFSET), "i" (&_excunit_base), "i" (exc_OFFSET)
// clobber r1 so that the compiler does not use it for %0
: "$r1" );
: "$r1");
/*
* load general-purpose registers (skip r0 which is always 0)
* address of the current task is passed as function argument in register r4
* r4 is the last register to be loaded so that the memory address of the current task is not lost
* r1 will be used as auxiliary register, so it is not loaded yet
* r1 and r2 will be used as auxiliary registers, so they are not loaded yet
*/
asm volatile("lwc $r2 = [ %0 + %1 ] \n\t" //load r2
"lwc $r3 = [ %0 + %2 ] \n\t" //load r3
"lwc $r5 = [ %0 + %3 ] \n\t" //load r5
"lwc $r6 = [ %0 + %4 ] \n\t" //load r6
"lwc $r7 = [ %0 + %5 ] \n\t" //load r7
"lwc $r8 = [ %0 + %6 ] \n\t" //load r8
"lwc $r9 = [ %0 + %7 ] \n\t" //load r9
"lwc $r10 = [ %0 + %8 ] \n\t" //load r10
"lwc $r11 = [ %0 + %9 ] \n\t" //load r11
"lwc $r12 = [ %0 + %10 ] \n\t" //load r12
"lwc $r13 = [ %0 + %11 ] \n\t" //load r13
"lwc $r14 = [ %0 + %12 ] \n\t" //load r14
"lwc $r15 = [ %0 + %13 ] \n\t" //load r15
"lwc $r16 = [ %0 + %14 ] \n\t" //load r16
"lwc $r17 = [ %0 + %15 ] \n\t" //load r17
"lwc $r18 = [ %0 + %16 ] \n\t" //load r18
"lwc $r19 = [ %0 + %17 ] \n\t" //load r19
"lwc $r20 = [ %0 + %18 ] \n\t" //load r20
"lwc $r21 = [ %0 + %19 ] \n\t" //load r21
"lwc $r22 = [ %0 + %20 ] \n\t" //load r22
"lwc $r23 = [ %0 + %21 ] \n\t" //load r23
"lwc $r24 = [ %0 + %22 ] \n\t" //load r24
"lwc $r25 = [ %0 + %23 ] \n\t" //load r25
"lwc $r26 = [ %0 + %24 ] \n\t" //load r26
"lwc $r27 = [ %0 + %25 ] \n\t" //load r27
"lwc $r28 = [ %0 + %26 ] \n\t" //load r28
"lwc $r29 = [ %0 + %27 ] \n\t" //load r29
"lwc $r30 = [ %0 + %28 ] \n\t" //load r30
"lwc $r31 = [ %0 + %29 ] \n\t" //load r31
: : "{$r4}" (heir), "i" (r2_OFFSET), "i" (r3_OFFSET), "i" (r5_OFFSET), "i" (r6_OFFSET),
"i" (r7_OFFSET), "i" (r8_OFFSET), "i" (r9_OFFSET), "i" (r10_OFFSET), "i" (r11_OFFSET),
"i" (r12_OFFSET), "i" (r13_OFFSET), "i" (r14_OFFSET), "i" (r15_OFFSET), "i" (r16_OFFSET),
"i" (r17_OFFSET), "i" (r18_OFFSET), "i" (r19_OFFSET), "i" (r20_OFFSET), "i" (r21_OFFSET),
"i" (r22_OFFSET), "i" (r23_OFFSET), "i" (r24_OFFSET), "i" (r25_OFFSET), "i" (r26_OFFSET),
"i" (r27_OFFSET), "i" (r28_OFFSET), "i" (r29_OFFSET), "i" (r30_OFFSET), "i" (r31_OFFSET));
asm volatile("lwc $r3 = [ %0 + %1 ] \n\t" //load r3
"lwc $r5 = [ %0 + %2 ] \n\t" //load r5
"lwc $r6 = [ %0 + %3 ] \n\t" //load r6
"lwc $r7 = [ %0 + %4 ] \n\t" //load r7
"lwc $r8 = [ %0 + %5 ] \n\t" //load r8
"lwc $r9 = [ %0 + %6 ] \n\t" //load r9
"lwc $r10 = [ %0 + %7 ] \n\t" //load r10
"lwc $r11 = [ %0 + %8 ] \n\t" //load r11
"lwc $r12 = [ %0 + %9 ] \n\t" //load r12
"lwc $r13 = [ %0 + %10 ] \n\t" //load r13
"lwc $r14 = [ %0 + %11 ] \n\t" //load r14
"lwc $r15 = [ %0 + %12 ] \n\t" //load r15
"lwc $r16 = [ %0 + %13 ] \n\t" //load r16
"lwc $r17 = [ %0 + %14 ] \n\t" //load r17
"lwc $r18 = [ %0 + %15 ] \n\t" //load r18
"lwc $r19 = [ %0 + %16 ] \n\t" //load r19
"lwc $r20 = [ %0 + %17 ] \n\t" //load r20
"lwc $r21 = [ %0 + %18 ] \n\t" //load r21
"lwc $r22 = [ %0 + %19 ] \n\t" //load r22
"lwc $r23 = [ %0 + %20 ] \n\t" //load r23
"lwc $r24 = [ %0 + %21 ] \n\t" //load r24
"lwc $r25 = [ %0 + %22 ] \n\t" //load r25
"lwc $r26 = [ %0 + %23 ] \n\t" //load r26
"lwc $r27 = [ %0 + %24 ] \n\t" //load r27
"lwc $r28 = [ %0 + %25 ] \n\t" //load r28
"lwc $r29 = [ %0 + %26 ] \n\t" //load r29
"lwc $r30 = [ %0 + %27 ] \n\t" //load r30
"lwc $r31 = [ %0 + %28 ] \n\t" //load r31
: : "{$r4}" (heir), "i" (r3_OFFSET), "i" (r5_OFFSET), "i" (r6_OFFSET), "i" (r7_OFFSET),
"i" (r8_OFFSET), "i" (r9_OFFSET), "i" (r10_OFFSET), "i" (r11_OFFSET), "i" (r12_OFFSET),
"i" (r13_OFFSET), "i" (r14_OFFSET), "i" (r15_OFFSET), "i" (r16_OFFSET), "i" (r17_OFFSET),
"i" (r18_OFFSET), "i" (r19_OFFSET), "i" (r20_OFFSET), "i" (r21_OFFSET), "i" (r22_OFFSET),
"i" (r23_OFFSET), "i" (r24_OFFSET), "i" (r25_OFFSET), "i" (r26_OFFSET), "i" (r27_OFFSET),
"i" (r28_OFFSET), "i" (r29_OFFSET), "i" (r30_OFFSET), "i" (r31_OFFSET));
/*
* load special-purpose registers
@@ -343,9 +351,14 @@ void _CPU_Context_switch(
asm volatile("lwm $r1 = [ %0 + %1 ] \n\t nop \n\t" //load ssize
"sens $r1 \n\t" //ensure the stack size in the stack cache
"lwc $r1 = [ %0 + %2 ] \n\t" //load r1
"lwc $r4 = [ %0 + %3 ] \n\t" //load r4
: : "{$r4}" (heir), "i" (ssize_OFFSET), "i" (r1_OFFSET), "i" (r4_OFFSET));
"lwm $r1 = [ %0 + %2 ] \n\t" //load exceptions status register
"li $r2 = %3 \n\t"
"swl [ $r2 + 0 ] = $r1 \n\t" //restore exceptions status register
"lwc $r1 = [ %0 + %4 ] \n\t" //load r1
"lwc $r2 = [ %0 + %5 ] \n\t" //load r2
"lwc $r4 = [ %0 + %6 ] \n\t" //load r4
: : "{$r4}" (heir), "i" (ssize_OFFSET), "i" (exc_OFFSET), "i" (&_excunit_base), "i" (r1_OFFSET),
"i" (r2_OFFSET), "i" (r4_OFFSET));
}
@@ -357,43 +370,42 @@ void _CPU_Context_restore(
* load general-purpose registers (skip r0 which is always 0)
* address of the current task is passed as function argument in register r3
* r3 is the last register to be loaded so that the memory address of the current task is not lost
* r1 will be used as auxiliary register, so it is not loaded yet
* r1 and r2 will be used as auxiliary registers, so they are not loaded yet
*/
asm volatile("lwc $r2 = [ %0 + %1 ] \n\t" //load r2
"lwc $r4 = [ %0 + %2 ] \n\t" //load r4
"lwc $r5 = [ %0 + %3 ] \n\t" //load r5
"lwc $r6 = [ %0 + %4 ] \n\t" //load r6
"lwc $r7 = [ %0 + %5 ] \n\t" //load r7
"lwc $r8 = [ %0 + %6 ] \n\t" //load r8
"lwc $r9 = [ %0 + %7 ] \n\t" //load r9
"lwc $r10 = [ %0 + %8 ] \n\t" //load r10
"lwc $r11 = [ %0 + %9 ] \n\t" //load r11
"lwc $r12 = [ %0 + %10 ] \n\t" //load r12
"lwc $r13 = [ %0 + %11 ] \n\t" //load r13
"lwc $r14 = [ %0 + %12 ] \n\t" //load r14
"lwc $r15 = [ %0 + %13 ] \n\t" //load r15
"lwc $r16 = [ %0 + %14 ] \n\t" //load r16
"lwc $r17 = [ %0 + %15 ] \n\t" //load r17
"lwc $r18 = [ %0 + %16 ] \n\t" //load r18
"lwc $r19 = [ %0 + %17 ] \n\t" //load r19
"lwc $r20 = [ %0 + %18 ] \n\t" //load r20
"lwc $r21 = [ %0 + %19 ] \n\t" //load r21
"lwc $r22 = [ %0 + %20 ] \n\t" //load r22
"lwc $r23 = [ %0 + %21 ] \n\t" //load r23
"lwc $r24 = [ %0 + %22 ] \n\t" //load r24
"lwc $r25 = [ %0 + %23 ] \n\t" //load r25
"lwc $r26 = [ %0 + %24 ] \n\t" //load r26
"lwc $r27 = [ %0 + %25 ] \n\t" //load r27
"lwc $r28 = [ %0 + %26 ] \n\t" //load r28
"lwc $r29 = [ %0 + %27 ] \n\t" //load r29
"lwc $r30 = [ %0 + %28 ] \n\t" //load r30
"lwc $r31 = [ %0 + %29 ] \n\t" //load r31
: : "{$r3}" (new_context), "i" (r2_OFFSET), "i" (r4_OFFSET), "i" (r5_OFFSET), "i" (r6_OFFSET),
"i" (r7_OFFSET), "i" (r8_OFFSET), "i" (r9_OFFSET), "i" (r10_OFFSET), "i" (r11_OFFSET),
"i" (r12_OFFSET), "i" (r13_OFFSET), "i" (r14_OFFSET), "i" (r15_OFFSET), "i" (r16_OFFSET),
"i" (r17_OFFSET), "i" (r18_OFFSET), "i" (r19_OFFSET), "i" (r20_OFFSET), "i" (r21_OFFSET),
"i" (r22_OFFSET), "i" (r23_OFFSET), "i" (r24_OFFSET), "i" (r25_OFFSET), "i" (r26_OFFSET),
"i" (r27_OFFSET), "i" (r28_OFFSET), "i" (r29_OFFSET), "i" (r30_OFFSET), "i" (r31_OFFSET));
asm volatile("lwc $r4 = [ %0 + %1 ] \n\t" //load r4
"lwc $r5 = [ %0 + %2 ] \n\t" //load r5
"lwc $r6 = [ %0 + %3 ] \n\t" //load r6
"lwc $r7 = [ %0 + %4 ] \n\t" //load r7
"lwc $r8 = [ %0 + %5 ] \n\t" //load r8
"lwc $r9 = [ %0 + %6 ] \n\t" //load r9
"lwc $r10 = [ %0 + %7 ] \n\t" //load r10
"lwc $r11 = [ %0 + %8 ] \n\t" //load r11
"lwc $r12 = [ %0 + %9 ] \n\t" //load r12
"lwc $r13 = [ %0 + %10 ] \n\t" //load r13
"lwc $r14 = [ %0 + %11 ] \n\t" //load r14
"lwc $r15 = [ %0 + %12 ] \n\t" //load r15
"lwc $r16 = [ %0 + %13 ] \n\t" //load r16
"lwc $r17 = [ %0 + %14 ] \n\t" //load r17
"lwc $r18 = [ %0 + %15 ] \n\t" //load r18
"lwc $r19 = [ %0 + %16 ] \n\t" //load r19
"lwc $r20 = [ %0 + %17 ] \n\t" //load r20
"lwc $r21 = [ %0 + %18 ] \n\t" //load r21
"lwc $r22 = [ %0 + %19 ] \n\t" //load r22
"lwc $r23 = [ %0 + %20 ] \n\t" //load r23
"lwc $r24 = [ %0 + %21 ] \n\t" //load r24
"lwc $r25 = [ %0 + %22 ] \n\t" //load r25
"lwc $r26 = [ %0 + %23 ] \n\t" //load r26
"lwc $r27 = [ %0 + %24 ] \n\t" //load r27
"lwc $r28 = [ %0 + %25 ] \n\t" //load r28
"lwc $r29 = [ %0 + %26 ] \n\t" //load r29
"lwc $r30 = [ %0 + %27 ] \n\t" //load r30
"lwc $r31 = [ %0 + %28 ] \n\t" //load r31
: : "{$r3}" (new_context), "i" (r4_OFFSET), "i" (r5_OFFSET), "i" (r6_OFFSET), "i" (r7_OFFSET),
"i" (r8_OFFSET), "i" (r9_OFFSET), "i" (r10_OFFSET), "i" (r11_OFFSET), "i" (r12_OFFSET),
"i" (r13_OFFSET), "i" (r14_OFFSET), "i" (r15_OFFSET), "i" (r16_OFFSET), "i" (r17_OFFSET),
"i" (r18_OFFSET), "i" (r19_OFFSET), "i" (r20_OFFSET), "i" (r21_OFFSET), "i" (r22_OFFSET),
"i" (r23_OFFSET), "i" (r24_OFFSET), "i" (r25_OFFSET), "i" (r26_OFFSET), "i" (r27_OFFSET),
"i" (r28_OFFSET), "i" (r29_OFFSET), "i" (r30_OFFSET), "i" (r31_OFFSET));
/*
* load special-purpose registers
@@ -439,13 +451,17 @@ void _CPU_Context_restore(
asm volatile("lwm $r1 = [ %0 + %1 ] \n\t nop \n\t" //load ssize
"sens $r1 \n\t" //ensure the stack size in the stack cache
"lwc $r1 = [ %0 + %2 ] \n\t" //load r1
"lwc $r3 = [ %0 + %3 ] \n\t" //load r3
: : "{$r3}" (new_context), "i" (ssize_OFFSET), "i" (r1_OFFSET), "i" (r3_OFFSET));
"lwm $r1 = [ %0 + %2 ] \n\t" //load exceptions status register
"li $r2 = %3 \n\t"
"swl [ $r2 + 0 ] = $r1 \n\t" //restore exceptions status register
"lwc $r1 = [ %0 + %4 ] \n\t" //load r1
"lwc $r2 = [ %0 + %5 ] \n\t" //load r2
"lwc $r3 = [ %0 + %6 ] \n\t" //load r3
: : "{$r3}" (new_context), "i" (ssize_OFFSET), "i" (exc_OFFSET), "i" (&_excunit_base), "i" (r1_OFFSET),
"i" (r2_OFFSET), "i" (r3_OFFSET));
}
void abort_trap()
{
}

17
cpukit/score/cpu/patmos/rtems/score/cpu.h
View File

@@ -270,6 +270,7 @@ typedef struct {
uint32_t s15;
uint32_t ssize;
uint32_t exc_status;
} Context_Control;
@@ -334,14 +335,14 @@ typedef struct {
#define s15_OFFSET 46
#define ssize_OFFSET 47
#define r0_OFFSET 48
#define exc_OFFSET 48
#define r0_OFFSET 49
/*
* context control size (in number of bytes)
*/
#define CONTEXT_CONTROL_SIZE 192
#define CONTEXT_CONTROL_SIZE 196
#define CONTEXT_OFFSET 200
@@ -565,7 +566,7 @@ SCORE_EXTERN volatile uint32_t _CPU_ISR_Dispatch_disable;
*/
#define _CPU_ISR_Disable( _level ) \
patmos_disable_interrupts()
(_level) = patmos_disable_interrupts()
/*
* Enable interrupts to the previous level (returned by _CPU_ISR_Disable).
@@ -574,7 +575,7 @@ SCORE_EXTERN volatile uint32_t _CPU_ISR_Dispatch_disable;
*/
#define _CPU_ISR_Enable( _level ) \
patmos_enable_interrupts()
patmos_enable_interrupts( _level )
/*
* This temporarily restores the interrupt to _level before immediately
@@ -583,7 +584,8 @@ SCORE_EXTERN volatile uint32_t _CPU_ISR_Dispatch_disable;
* modified.
*/
#define _CPU_ISR_Flash( _level )
#define _CPU_ISR_Flash( _level ) \
patmos_flash_interrupts( _level )
/*
* Map interrupt level in task mode onto the hardware that the CPU
@@ -596,7 +598,8 @@ SCORE_EXTERN volatile uint32_t _CPU_ISR_Dispatch_disable;
* via the rtems_task_mode directive.
*/
#define _CPU_ISR_Set_level( _newlevel )
#define _CPU_ISR_Set_level( _newlevel ) \
patmos_enable_interrupts( _newlevel ^ CPU_MODES_INTERRUPT_MASK)
/*
* Return the current interrupt disable level for this task in